ARM: Tegra12: Clocks: Decode SKU information for clocks
Krishna Sitaraman [Thu, 5 Sep 2013 18:20:01 +0000 (11:20 -0700)]
Update the speedo and procees ids for cpu to reflect the
appropriate SKU.

Bug 1342499

Change-Id: I79ec4ef57b8f8af27469900ac42f0a04cb3e3a69
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-on: http://git-master/r/270933
Reviewed-by: Chao Xu <cxu@nvidia.com>

arch/arm/mach-tegra/tegra12_speedo.c

index a3b6fca..6104c96 100644 (file)
@@ -33,7 +33,9 @@
 
 #define TEGRA124_CPU_SPEEDO 2271 /* FIXME: Get Correct Value */
 
+#define CPU_PROCESS_CORNERS_NUM                2
 #define GPU_PROCESS_CORNERS_NUM                2
+#define CORE_PROCESS_CORNERS_NUM               2
 
 #define FUSE_CPU_SPEEDO_0      0x114
 #define FUSE_CPU_SPEEDO_1      0x12c
@@ -69,29 +71,47 @@ static int gpu_speedo_value;
 
 static int enable_app_profiles;
 
+static const u32 cpu_process_speedos[][CPU_PROCESS_CORNERS_NUM] = {
+/* proc_id  0, 1 */
+       {2190,  UINT_MAX}, /* [0]: threshold_index 0 */
+       {0,     UINT_MAX}, /* [1]: threshold_index 0 */
+};
+
 static const u32 gpu_process_speedos[][GPU_PROCESS_CORNERS_NUM] = {
 /* proc_id  0, 1 */
-       {1950,  UINT_MAX}, /* [0]: threshold_index 0 */
+       {1965,  UINT_MAX}, /* [0]: threshold_index 0 */
+       {0,     UINT_MAX}, /* [1]: threshold_index 0 */
+};
+
+static const u32 core_process_speedos[][CORE_PROCESS_CORNERS_NUM] = {
+/* proc_id  0, 1 */
+       {2101,  UINT_MAX}, /* [0]: threshold_index 0 */
        {0,     UINT_MAX}, /* [1]: threshold_index 0 */
 };
 
 static void rev_sku_to_speedo_ids(int rev, int sku)
 {
-
        switch (sku) {
-       case 0x00: /* Eng */
+       case 0x00: /* Engg sku */
        case 0x0F:
+               cpu_speedo_id = 0;
+               soc_speedo_id = 0;
                gpu_speedo_id = 0;
+               threshold_index = 0;
                break;
-
        case 0x07:
        case 0x81:
+               cpu_speedo_id = 1;
+               soc_speedo_id = 1;
                gpu_speedo_id = 1;
+               threshold_index = 1;
                break;
-
        default:
-               pr_err("Tegra12 Unknown SKU %d\n", sku);
+               pr_warn("Tegra12: Unknown SKU %d\n", sku);
+               cpu_speedo_id = 0;
+               soc_speedo_id = 0;
                gpu_speedo_id = 0;
+               threshold_index = 0;
                break;
        }
 }
@@ -119,9 +139,6 @@ void tegra_init_speedo_data(void)
                return;
        }
 
-       rev_sku_to_speedo_ids(tegra_revision, tegra_sku_id);
-
-       cpu_speedo_value = TEGRA124_CPU_SPEEDO;
        cpu_speedo_0_value = tegra_fuse_readl(FUSE_CPU_SPEEDO_0);
        cpu_speedo_1_value = tegra_fuse_readl(FUSE_CPU_SPEEDO_1);
 
@@ -136,32 +153,45 @@ void tegra_init_speedo_data(void)
        soc_iddq_value = tegra_fuse_readl(FUSE_SOC_IDDQ);
        gpu_iddq_value = tegra_fuse_readl(FUSE_GPU_IDDQ);
 
+       /* cpu_speedo_value = TEGRA124_CPU_SPEEDO; */
+       cpu_speedo_value = cpu_speedo_0_value;
+
+       if (cpu_speedo_value == 0) {
+               cpu_speedo_value = 1900;
+               pr_warn("Tegra12: Warning: Speedo value not fused. PLEASE FIX!!!!!!!!!!!\n");
+               pr_warn("Tegra12: Warning: PLEASE USE BOARD WITH FUSED SPEEDO VALUE !!!!\n");
+       }
+
+       rev_sku_to_speedo_ids(tegra_revision, tegra_sku_id);
+
        for (i = 0; i < GPU_PROCESS_CORNERS_NUM; i++) {
                if (gpu_speedo_value <
                        gpu_process_speedos[threshold_index][i]) {
                        break;
                }
        }
-
        gpu_process_id = i;
-       pr_info("Tegra12: GPU Speedo %d", gpu_speedo_value);
-
-       /* cpu_speedo_value = TEGRA124_CPU_SPEEDO; */
-       cpu_speedo_value = cpu_speedo_0_value;
-
-       if (cpu_speedo_value > 2200)
-               cpu_process_id = 1;
-       else
-               cpu_process_id = 0;
 
-       pr_info("Tegra12: CPU Speedo ID %d, Soc Speedo ID %d, Gpu Speedo ID %d",
+       for (i = 0; i < CPU_PROCESS_CORNERS_NUM; i++) {
+                if (cpu_speedo_value <
+                        cpu_process_speedos[threshold_index][i]) {
+                        break;
+                }
+        }
+       cpu_process_id = i;
+
+       for (i = 0; i < CORE_PROCESS_CORNERS_NUM; i++) {
+                if (soc_speedo_0_value <
+                        core_process_speedos[threshold_index][i]) {
+                        break;
+                }
+        }
+       core_process_id = i;
+
+       pr_info("Tegra12: CPU Speedo ID %d, Soc Speedo ID %d, Gpu Speedo ID %d\n",
                cpu_speedo_id, soc_speedo_id, gpu_speedo_id);
-
-       if (cpu_speedo_value == 0) {
-               cpu_speedo_value = 1900;
-               pr_warn("Tegra12: Warning: Speedo value not fused. PLEASE FIX!!!!!!!!!!!\n");
-               pr_warn("Tegra12: Warning: PLEASE USE BOARD WITH FUSED SPEEDO VALUE !!!!\n");
-       }
+       pr_info("Tegra12: CPU Process ID %d,Soc Process ID %d,Gpu Process ID %d\n",
+                cpu_process_id, core_process_id, gpu_process_id);
 }
 
 int tegra_cpu_process_id(void)
@@ -249,6 +279,8 @@ int tegra_core_speedo_mv(void)
        switch (soc_speedo_id) {
        case 0:
                return 1100;
+       case 1:
+               return 1100;
        default:
                BUG();
        }