Merge tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Linus Torvalds [Sat, 26 May 2012 19:31:49 +0000 (12:31 -0700)]
Pull arm-soc cleanups (part 2) from Olof Johansson:
 "More cleanups, continuing an earlier set with omap and samsung
  specific cleanups.  These could not go into the first set because they
  have dependencies on various other series that in turn depend on the
  first cleanups."

Fixed up conflicts in arch/arm/plat-omap/counter_32k.c due to commit
bd0493eaaf5c: "move read_{boot,persistent}_clock to the architecture
level" that changed how the persistent clocks were handled.  And trivial
conflicts in arch/arm/mach-omap1/common.h due to just independent
changes close to each other.

* tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (35 commits)
  ARM: SAMSUNG: merge plat-s5p into plat-samsung
  ARM: SAMSUNG: move options for common s5p into plat-samsung/Kconfig
  ARM: SAMSUNG: move setup code for s5p mfc and mipiphy into plat-samsung
  ARM: SAMSUNG: move platform device for s5p uart into plat-samsung
  ARM: SAMSUNG: move hr timer for common s5p into plat-samsung
  ARM: SAMSUNG: move pm part for common s5p into plat-samsung
  ARM: SAMSUNG: move interrupt part for common s5p into plat-samsung
  ARM: SAMSUNG: move clock part for common s5p into plat-samsung
  ARM: S3C24XX: Use common macro to define resources on dev-uart.c
  ARM: S3C24XX: move common clock init into common.c
  ARM: S3C24XX: move common power-management code to mach-s3c24xx
  ARM: S3C24XX: move plat-s3c24xx/dev-uart.c into common.c
  ARM: S3C24XX: move plat-s3c24xx/cpu.c
  ARM: OMAP2+: Kconfig: convert SOC_OMAPAM33XX to SOC_AM33XX
  ARM: OMAP2+: Kconfig: convert SOC_OMAPTI81XX to SOC_TI81XX
  GPMC: add ECC control definitions
  ARM: OMAP2+: dmtimer: remove redundant sysconfig context restore
  ARM: OMAP: AM35xx: convert 3517 detection/flags to AM35xx
  ARM: OMAP: AM35xx: remove redunant cpu_is checks for AM3505
  ARM: OMAP1: Pass dma request lines in platform data to MMC driver
  ...

57 files changed:
arch/arm/Kconfig
arch/arm/Makefile
arch/arm/mach-omap1/common.h
arch/arm/mach-omap1/devices.c
arch/arm/mach-omap1/time.c
arch/arm/mach-omap1/timer32k.c
arch/arm/mach-omap2/Kconfig
arch/arm/mach-omap2/Makefile
arch/arm/mach-omap2/common.h
arch/arm/mach-omap2/devices.c
arch/arm/mach-omap2/dma.c
arch/arm/mach-omap2/dsp.c
arch/arm/mach-omap2/gpmc.c
arch/arm/mach-omap2/hsmmc.c
arch/arm/mach-omap2/id.c
arch/arm/mach-omap2/include/mach/omap-wakeupgen.h
arch/arm/mach-omap2/io.c
arch/arm/mach-omap2/iomap.h
arch/arm/mach-omap2/irq.c
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
arch/arm/mach-omap2/powerdomains3xxx_data.c
arch/arm/mach-omap2/timer.c
arch/arm/mach-omap2/usb-musb.c
arch/arm/mach-omap2/voltagedomains3xxx_data.c
arch/arm/mach-s3c24xx/Makefile
arch/arm/mach-s3c24xx/common.c [moved from arch/arm/plat-s3c24xx/cpu.c with 76% similarity]
arch/arm/mach-s3c24xx/irq-pm.c [moved from arch/arm/plat-s3c24xx/irq-pm.c with 100% similarity]
arch/arm/mach-s3c24xx/pm.c [moved from arch/arm/plat-s3c24xx/pm.c with 100% similarity]
arch/arm/mach-s3c24xx/sleep.S [moved from arch/arm/plat-s3c24xx/sleep.S with 100% similarity]
arch/arm/plat-omap/counter_32k.c
arch/arm/plat-omap/devices.c
arch/arm/plat-omap/dma.c
arch/arm/plat-omap/dmtimer.c
arch/arm/plat-omap/include/plat/common.h
arch/arm/plat-omap/include/plat/cpu.h
arch/arm/plat-omap/include/plat/dma.h
arch/arm/plat-omap/include/plat/dmtimer.h
arch/arm/plat-omap/include/plat/mmc.h
arch/arm/plat-s3c24xx/Makefile
arch/arm/plat-s3c24xx/clock.c [deleted file]
arch/arm/plat-s3c24xx/dev-uart.c [deleted file]
arch/arm/plat-s5p/Kconfig [deleted file]
arch/arm/plat-s5p/Makefile [deleted file]
arch/arm/plat-samsung/Kconfig
arch/arm/plat-samsung/Makefile
arch/arm/plat-samsung/s5p-clock.c [moved from arch/arm/plat-s5p/clock.c with 99% similarity]
arch/arm/plat-samsung/s5p-dev-mfc.c [moved from arch/arm/plat-s5p/dev-mfc.c with 97% similarity]
arch/arm/plat-samsung/s5p-dev-uart.c [moved from arch/arm/plat-s5p/dev-uart.c with 57% similarity]
arch/arm/plat-samsung/s5p-irq-eint.c [moved from arch/arm/plat-s5p/irq-eint.c with 99% similarity]
arch/arm/plat-samsung/s5p-irq-gpioint.c [moved from arch/arm/plat-s5p/irq-gpioint.c with 99% similarity]
arch/arm/plat-samsung/s5p-irq-pm.c [moved from arch/arm/plat-s5p/irq-pm.c with 98% similarity]
arch/arm/plat-samsung/s5p-irq.c [moved from arch/arm/plat-s5p/irq.c with 96% similarity]
arch/arm/plat-samsung/s5p-pm.c [moved from arch/arm/plat-s5p/pm.c with 95% similarity]
arch/arm/plat-samsung/s5p-sleep.S [moved from arch/arm/plat-s5p/sleep.S with 98% similarity]
arch/arm/plat-samsung/s5p-time.c [moved from arch/arm/plat-s5p/s5p-time.c with 99% similarity]
arch/arm/plat-samsung/setup-mipiphy.c [moved from arch/arm/plat-s5p/setup-mipiphy.c with 100% similarity]
drivers/net/ethernet/ti/Kconfig

index 3ca1ba9..4c3e10c 100644 (file)
@@ -1051,7 +1051,6 @@ source "arch/arm/mach-sa1100/Kconfig"
 
 source "arch/arm/plat-samsung/Kconfig"
 source "arch/arm/plat-s3c24xx/Kconfig"
-source "arch/arm/plat-s5p/Kconfig"
 
 source "arch/arm/plat-spear/Kconfig"
 
index 157900d..18194ac 100644 (file)
@@ -160,9 +160,7 @@ machine-$(CONFIG_ARCH_MXS)          := mxs
 machine-$(CONFIG_ARCH_NETX)            := netx
 machine-$(CONFIG_ARCH_NOMADIK)         := nomadik
 machine-$(CONFIG_ARCH_OMAP1)           := omap1
-machine-$(CONFIG_ARCH_OMAP2)           := omap2
-machine-$(CONFIG_ARCH_OMAP3)           := omap2
-machine-$(CONFIG_ARCH_OMAP4)           := omap2
+machine-$(CONFIG_ARCH_OMAP2PLUS)       := omap2
 machine-$(CONFIG_ARCH_ORION5X)         := orion5x
 machine-$(CONFIG_ARCH_PICOXCELL)       := picoxcell
 machine-$(CONFIG_ARCH_PNX4008)         := pnx4008
@@ -205,7 +203,7 @@ plat-$(CONFIG_PLAT_NOMADIK) := nomadik
 plat-$(CONFIG_PLAT_ORION)      := orion
 plat-$(CONFIG_PLAT_PXA)                := pxa
 plat-$(CONFIG_PLAT_S3C24XX)    := s3c24xx samsung
-plat-$(CONFIG_PLAT_S5P)                := s5p samsung
+plat-$(CONFIG_PLAT_S5P)                := samsung
 plat-$(CONFIG_PLAT_SPEAR)      := spear
 plat-$(CONFIG_PLAT_VERSATILE)  := versatile
 
index bb7779b..64ce3bb 100644 (file)
@@ -63,7 +63,14 @@ extern void omap1_nand_cmd_ctl(struct mtd_info *mtd, int cmd,
                               unsigned int ctrl);
 
 extern struct sys_timer omap1_timer;
-extern bool omap_32k_timer_init(void);
+#ifdef CONFIG_OMAP_32K_TIMER
+extern int omap_32k_timer_init(void);
+#else
+static inline int __init omap_32k_timer_init(void)
+{
+       return -ENODEV;
+}
+#endif
 
 extern u32 omap_irq_flags;
 
index dcd8ddb..fa1fa4d 100644 (file)
@@ -22,6 +22,7 @@
 #include <plat/tc.h>
 #include <plat/board.h>
 #include <plat/mux.h>
+#include <plat/dma.h>
 #include <plat/mmc.h>
 #include <plat/omap7xx.h>
 
 #include "common.h"
 #include "clock.h"
 
+#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
+
+static struct platform_device omap_pcm = {
+       .name   = "omap-pcm-audio",
+       .id     = -1,
+};
+
+static void omap_init_audio(void)
+{
+       platform_device_register(&omap_pcm);
+}
+
+#else
+static inline void omap_init_audio(void) {}
+#endif
+
 /*-------------------------------------------------------------------------*/
 
 #if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE)
@@ -128,6 +145,56 @@ static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
        }
 }
 
+#define OMAP_MMC_NR_RES                4
+
+/*
+ * Register MMC devices.
+ */
+static int __init omap_mmc_add(const char *name, int id, unsigned long base,
+                               unsigned long size, unsigned int irq,
+                               unsigned rx_req, unsigned tx_req,
+                               struct omap_mmc_platform_data *data)
+{
+       struct platform_device *pdev;
+       struct resource res[OMAP_MMC_NR_RES];
+       int ret;
+
+       pdev = platform_device_alloc(name, id);
+       if (!pdev)
+               return -ENOMEM;
+
+       memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
+       res[0].start = base;
+       res[0].end = base + size - 1;
+       res[0].flags = IORESOURCE_MEM;
+       res[1].start = res[1].end = irq;
+       res[1].flags = IORESOURCE_IRQ;
+       res[2].start = rx_req;
+       res[2].name = "rx";
+       res[2].flags = IORESOURCE_DMA;
+       res[3].start = tx_req;
+       res[3].name = "tx";
+       res[3].flags = IORESOURCE_DMA;
+
+       ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
+       if (ret == 0)
+               ret = platform_device_add_data(pdev, data, sizeof(*data));
+       if (ret)
+               goto fail;
+
+       ret = platform_device_add(pdev);
+       if (ret)
+               goto fail;
+
+       /* return device handle to board setup code */
+       data->dev = &pdev->dev;
+       return 0;
+
+fail:
+       platform_device_put(pdev);
+       return ret;
+}
+
 void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
                        int nr_controllers)
 {
@@ -135,6 +202,7 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
 
        for (i = 0; i < nr_controllers; i++) {
                unsigned long base, size;
+               unsigned rx_req, tx_req;
                unsigned int irq = 0;
 
                if (!mmc_data[i])
@@ -146,19 +214,24 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
                case 0:
                        base = OMAP1_MMC1_BASE;
                        irq = INT_MMC;
+                       rx_req = OMAP_DMA_MMC_RX;
+                       tx_req = OMAP_DMA_MMC_TX;
                        break;
                case 1:
                        if (!cpu_is_omap16xx())
                                return;
                        base = OMAP1_MMC2_BASE;
                        irq = INT_1610_MMC2;
+                       rx_req = OMAP_DMA_MMC2_RX;
+                       tx_req = OMAP_DMA_MMC2_TX;
                        break;
                default:
                        continue;
                }
                size = OMAP1_MMC_SIZE;
 
-               omap_mmc_add("mmci-omap", i, base, size, irq, mmc_data[i]);
+               omap_mmc_add("mmci-omap", i, base, size, irq,
+                               rx_req, tx_req, mmc_data[i]);
        };
 }
 
@@ -242,23 +315,48 @@ void __init omap1_camera_init(void *info)
 
 static inline void omap_init_sti(void) {}
 
-#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
+/* Numbering for the SPI-capable controllers when used for SPI:
+ * spi         = 1
+ * uwire       = 2
+ * mmc1..2     = 3..4
+ * mcbsp1..3   = 5..7
+ */
 
-static struct platform_device omap_pcm = {
-       .name   = "omap-pcm-audio",
-       .id     = -1,
+#if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
+
+#define        OMAP_UWIRE_BASE         0xfffb3000
+
+static struct resource uwire_resources[] = {
+       {
+               .start          = OMAP_UWIRE_BASE,
+               .end            = OMAP_UWIRE_BASE + 0x20,
+               .flags          = IORESOURCE_MEM,
+       },
 };
 
-static void omap_init_audio(void)
+static struct platform_device omap_uwire_device = {
+       .name      = "omap_uwire",
+       .id          = -1,
+       .num_resources  = ARRAY_SIZE(uwire_resources),
+       .resource       = uwire_resources,
+};
+
+static void omap_init_uwire(void)
 {
-       platform_device_register(&omap_pcm);
-}
+       /* FIXME define and use a boot tag; not all boards will be hooking
+        * up devices to the microwire controller, and multi-board configs
+        * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
+        */
 
+       /* board-specific code must configure chipselects (only a few
+        * are normally used) and SCLK/SDI/SDO (each has two choices).
+        */
+       (void) platform_device_register(&omap_uwire_device);
+}
 #else
-static inline void omap_init_audio(void) {}
+static inline void omap_init_uwire(void) {}
 #endif
 
-/*-------------------------------------------------------------------------*/
 
 /*
  * This gets called after board-specific INIT_MACHINE, and initializes most
@@ -292,11 +390,12 @@ static int __init omap1_init_devices(void)
         * in alphabetical order so they're easier to sort through.
         */
 
+       omap_init_audio();
        omap_init_mbox();
        omap_init_rtc();
        omap_init_spi100k();
        omap_init_sti();
-       omap_init_audio();
+       omap_init_uwire();
 
        return 0;
 }
index 4d8dd9a..4062480 100644 (file)
@@ -232,20 +232,6 @@ static inline void omap_mpu_timer_init(void)
 }
 #endif /* CONFIG_OMAP_MPU_TIMER */
 
-static inline int omap_32k_timer_usable(void)
-{
-       int res = false;
-
-       if (cpu_is_omap730() || cpu_is_omap15xx())
-               return res;
-
-#ifdef CONFIG_OMAP_32K_TIMER
-       res = omap_32k_timer_init();
-#endif
-
-       return res;
-}
-
 /*
  * ---------------------------------------------------------------------------
  * Timer initialization
@@ -253,7 +239,7 @@ static inline int omap_32k_timer_usable(void)
  */
 static void __init omap1_timer_init(void)
 {
-       if (!omap_32k_timer_usable())
+       if (omap_32k_timer_init() != 0)
                omap_mpu_timer_init();
 }
 
index 325b9a0..eae49c3 100644 (file)
@@ -71,6 +71,7 @@
 
 /* 16xx specific defines */
 #define OMAP1_32K_TIMER_BASE           0xfffb9000
+#define OMAP1_32KSYNC_TIMER_BASE       0xfffbc400
 #define OMAP1_32K_TIMER_CR             0x08
 #define OMAP1_32K_TIMER_TVR            0x00
 #define OMAP1_32K_TIMER_TCR            0x04
@@ -182,10 +183,29 @@ static __init void omap_init_32k_timer(void)
  * Timer initialization
  * ---------------------------------------------------------------------------
  */
-bool __init omap_32k_timer_init(void)
+int __init omap_32k_timer_init(void)
 {
-       omap_init_clocksource_32k();
-       omap_init_32k_timer();
+       int ret = -ENODEV;
 
-       return true;
+       if (cpu_is_omap16xx()) {
+               void __iomem *base;
+               struct clk *sync32k_ick;
+
+               base = ioremap(OMAP1_32KSYNC_TIMER_BASE, SZ_1K);
+               if (!base) {
+                       pr_err("32k_counter: failed to map base addr\n");
+                       return -ENODEV;
+               }
+
+               sync32k_ick = clk_get(NULL, "omap_32ksync_ick");
+               if (!IS_ERR(sync32k_ick))
+                       clk_enable(sync32k_ick);
+
+               ret = omap_init_clocksource_32k(base);
+       }
+
+       if (!ret)
+               omap_init_32k_timer();
+
+       return ret;
 }
index 964ee67..4cf5142 100644 (file)
@@ -78,12 +78,12 @@ config SOC_OMAP3430
        default y
        select ARCH_OMAP_OTG
 
-config SOC_OMAPTI81XX
+config SOC_TI81XX
        bool "TI81XX support"
        depends on ARCH_OMAP3
        default y
 
-config SOC_OMAPAM33XX
+config SOC_AM33XX
        bool "AM33XX support"
        depends on ARCH_OMAP3
        default y
@@ -320,12 +320,12 @@ config MACH_OMAP_3630SDP
 
 config MACH_TI8168EVM
        bool "TI8168 Evaluation Module"
-       depends on SOC_OMAPTI81XX
+       depends on SOC_TI81XX
        default y
 
 config MACH_TI8148EVM
        bool "TI8148 Evaluation Module"
-       depends on SOC_OMAPTI81XX
+       depends on SOC_TI81XX
        default y
 
 config MACH_OMAP_4430SDP
index 385c083..fa742f3 100644 (file)
@@ -24,10 +24,11 @@ endif
 obj-$(CONFIG_TWL4030_CORE) += omap_twl.o
 
 # SMP support ONLY available for OMAP4
+
 obj-$(CONFIG_SMP)                      += omap-smp.o omap-headsmp.o
 obj-$(CONFIG_HOTPLUG_CPU)              += omap-hotplug.o
-obj-$(CONFIG_ARCH_OMAP4)               += omap4-common.o omap-wakeupgen.o \
-                                          sleep44xx.o
+obj-$(CONFIG_ARCH_OMAP4)               += omap4-common.o omap-wakeupgen.o
+obj-$(CONFIG_ARCH_OMAP4)               += sleep44xx.o
 
 plus_sec := $(call as-instr,.arch_extension sec,+sec)
 AFLAGS_omap-headsmp.o                  :=-Wa,-march=armv7-a$(plus_sec)
@@ -64,10 +65,10 @@ endif
 ifeq ($(CONFIG_PM),y)
 obj-$(CONFIG_ARCH_OMAP2)               += pm24xx.o
 obj-$(CONFIG_ARCH_OMAP2)               += sleep24xx.o
-obj-$(CONFIG_ARCH_OMAP3)               += pm34xx.o sleep34xx.o \
-                                          cpuidle34xx.o
-obj-$(CONFIG_ARCH_OMAP4)               += pm44xx.o omap-mpuss-lowpower.o \
-                                          cpuidle44xx.o
+obj-$(CONFIG_ARCH_OMAP3)               += pm34xx.o sleep34xx.o
+obj-$(CONFIG_ARCH_OMAP3)               += cpuidle34xx.o
+obj-$(CONFIG_ARCH_OMAP4)               += pm44xx.o omap-mpuss-lowpower.o
+obj-$(CONFIG_ARCH_OMAP4)               += cpuidle44xx.o
 obj-$(CONFIG_PM_DEBUG)                 += pm-debug.o
 obj-$(CONFIG_OMAP_SMARTREFLEX)          += sr_device.o smartreflex.o
 obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3)  += smartreflex-class3.o
@@ -84,90 +85,86 @@ endif
 # PRCM
 obj-y                                  += prm_common.o
 obj-$(CONFIG_ARCH_OMAP2)               += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o
-obj-$(CONFIG_ARCH_OMAP3)               += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o \
-                                          vc3xxx_data.o vp3xxx_data.o
-# XXX The presence of cm2xxx_3xxx.o on the line below is temporary and
-# will be removed once the OMAP4 part of the codebase is converted to
-# use OMAP4-specific PRCM functions.
-obj-$(CONFIG_ARCH_OMAP4)               += prcm.o cm2xxx_3xxx.o cminst44xx.o \
-                                          cm44xx.o prcm_mpu44xx.o \
-                                          prminst44xx.o vc44xx_data.o \
-                                          vp44xx_data.o prm44xx.o
+obj-$(CONFIG_ARCH_OMAP3)               += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o
+obj-$(CONFIG_ARCH_OMAP3)               += vc3xxx_data.o vp3xxx_data.o
+obj-$(CONFIG_ARCH_OMAP4)               += prcm.o cminst44xx.o cm44xx.o
+obj-$(CONFIG_ARCH_OMAP4)               += prcm_mpu44xx.o prminst44xx.o
+obj-$(CONFIG_ARCH_OMAP4)               += vc44xx_data.o vp44xx_data.o prm44xx.o
 
 # OMAP voltage domains
 voltagedomain-common                   := voltage.o vc.o vp.o
-obj-$(CONFIG_ARCH_OMAP2)               += $(voltagedomain-common) \
-                                          voltagedomains2xxx_data.o
-obj-$(CONFIG_ARCH_OMAP3)               += $(voltagedomain-common) \
-                                          voltagedomains3xxx_data.o
-obj-$(CONFIG_ARCH_OMAP4)               += $(voltagedomain-common) \
-                                          voltagedomains44xx_data.o
+obj-$(CONFIG_ARCH_OMAP2)               += $(voltagedomain-common)
+obj-$(CONFIG_ARCH_OMAP2)               += voltagedomains2xxx_data.o
+obj-$(CONFIG_ARCH_OMAP3)               += $(voltagedomain-common)
+obj-$(CONFIG_ARCH_OMAP3)               += voltagedomains3xxx_data.o
+obj-$(CONFIG_ARCH_OMAP4)               += $(voltagedomain-common)
+obj-$(CONFIG_ARCH_OMAP4)               += voltagedomains44xx_data.o
 
 # OMAP powerdomain framework
 powerdomain-common                     += powerdomain.o powerdomain-common.o
-obj-$(CONFIG_ARCH_OMAP2)               += $(powerdomain-common) \
-                                          powerdomain2xxx_3xxx.o \
-                                          powerdomains2xxx_data.o \
-                                          powerdomains2xxx_3xxx_data.o
-obj-$(CONFIG_ARCH_OMAP3)               += $(powerdomain-common) \
-                                          powerdomain2xxx_3xxx.o \
-                                          powerdomains3xxx_data.o \
-                                          powerdomains2xxx_3xxx_data.o
-obj-$(CONFIG_ARCH_OMAP4)               += $(powerdomain-common) \
-                                          powerdomain44xx.o \
-                                          powerdomains44xx_data.o
+obj-$(CONFIG_ARCH_OMAP2)               += $(powerdomain-common)
+obj-$(CONFIG_ARCH_OMAP2)               += powerdomains2xxx_data.o
+obj-$(CONFIG_ARCH_OMAP2)               += powerdomain2xxx_3xxx.o
+obj-$(CONFIG_ARCH_OMAP2)               += powerdomains2xxx_3xxx_data.o
+obj-$(CONFIG_ARCH_OMAP3)               += $(powerdomain-common)
+obj-$(CONFIG_ARCH_OMAP3)               += powerdomain2xxx_3xxx.o
+obj-$(CONFIG_ARCH_OMAP3)               += powerdomains3xxx_data.o
+obj-$(CONFIG_ARCH_OMAP3)               += powerdomains2xxx_3xxx_data.o
+obj-$(CONFIG_ARCH_OMAP4)               += $(powerdomain-common)
+obj-$(CONFIG_ARCH_OMAP4)               += powerdomain44xx.o
+obj-$(CONFIG_ARCH_OMAP4)               += powerdomains44xx_data.o
 
 # PRCM clockdomain control
-clockdomain-common                     += clockdomain.o \
-                                          clockdomains_common_data.o
-obj-$(CONFIG_ARCH_OMAP2)               += $(clockdomain-common) \
-                                          clockdomain2xxx_3xxx.o \
-                                          clockdomains2xxx_3xxx_data.o
+clockdomain-common                     += clockdomain.o
+clockdomain-common                     += clockdomains_common_data.o
+obj-$(CONFIG_ARCH_OMAP2)               += $(clockdomain-common)
+obj-$(CONFIG_ARCH_OMAP2)               += clockdomain2xxx_3xxx.o
+obj-$(CONFIG_ARCH_OMAP2)               += clockdomains2xxx_3xxx_data.o
 obj-$(CONFIG_SOC_OMAP2420)             += clockdomains2420_data.o
 obj-$(CONFIG_SOC_OMAP2430)             += clockdomains2430_data.o
-obj-$(CONFIG_ARCH_OMAP3)               += $(clockdomain-common) \
-                                          clockdomain2xxx_3xxx.o \
-                                          clockdomains2xxx_3xxx_data.o \
-                                          clockdomains3xxx_data.o
-obj-$(CONFIG_ARCH_OMAP4)               += $(clockdomain-common) \
-                                          clockdomain44xx.o \
-                                          clockdomains44xx_data.o
+obj-$(CONFIG_ARCH_OMAP3)               += $(clockdomain-common)
+obj-$(CONFIG_ARCH_OMAP3)               += clockdomain2xxx_3xxx.o
+obj-$(CONFIG_ARCH_OMAP3)               += clockdomains2xxx_3xxx_data.o
+obj-$(CONFIG_ARCH_OMAP3)               += clockdomains3xxx_data.o
+obj-$(CONFIG_ARCH_OMAP4)               += $(clockdomain-common)
+obj-$(CONFIG_ARCH_OMAP4)               += clockdomain44xx.o
+obj-$(CONFIG_ARCH_OMAP4)               += clockdomains44xx_data.o
 
 # Clock framework
-obj-$(CONFIG_ARCH_OMAP2)               += $(clock-common) clock2xxx.o \
-                                          clkt2xxx_sys.o \
-                                          clkt2xxx_dpllcore.o \
-                                          clkt2xxx_virt_prcm_set.o \
-                                          clkt2xxx_apll.o clkt2xxx_osc.o \
-                                          clkt2xxx_dpll.o clkt_iclk.o
+obj-$(CONFIG_ARCH_OMAP2)               += $(clock-common) clock2xxx.o
+obj-$(CONFIG_ARCH_OMAP2)               += clkt2xxx_sys.o
+obj-$(CONFIG_ARCH_OMAP2)               += clkt2xxx_dpllcore.o
+obj-$(CONFIG_ARCH_OMAP2)               += clkt2xxx_virt_prcm_set.o
+obj-$(CONFIG_ARCH_OMAP2)               += clkt2xxx_apll.o clkt2xxx_osc.o
+obj-$(CONFIG_ARCH_OMAP2)               += clkt2xxx_dpll.o clkt_iclk.o
 obj-$(CONFIG_SOC_OMAP2420)             += clock2420_data.o
 obj-$(CONFIG_SOC_OMAP2430)             += clock2430.o clock2430_data.o
-obj-$(CONFIG_ARCH_OMAP3)               += $(clock-common) clock3xxx.o \
-                                          clock34xx.o clkt34xx_dpll3m2.o \
-                                          clock3517.o clock36xx.o \
-                                          dpll3xxx.o clock3xxx_data.o \
-                                          clkt_iclk.o
-obj-$(CONFIG_ARCH_OMAP4)               += $(clock-common) clock44xx_data.o \
-                                          dpll3xxx.o dpll44xx.o
+obj-$(CONFIG_ARCH_OMAP3)               += $(clock-common) clock3xxx.o
+obj-$(CONFIG_ARCH_OMAP3)               += clock34xx.o clkt34xx_dpll3m2.o
+obj-$(CONFIG_ARCH_OMAP3)               += clock3517.o clock36xx.o
+obj-$(CONFIG_ARCH_OMAP3)               += dpll3xxx.o clock3xxx_data.o
+obj-$(CONFIG_ARCH_OMAP3)               += clkt_iclk.o
+obj-$(CONFIG_ARCH_OMAP4)               += $(clock-common) clock44xx_data.o
+obj-$(CONFIG_ARCH_OMAP4)               += dpll3xxx.o dpll44xx.o
 
 # OMAP2 clock rate set data (old "OPP" data)
 obj-$(CONFIG_SOC_OMAP2420)             += opp2420_data.o
 obj-$(CONFIG_SOC_OMAP2430)             += opp2430_data.o
 
 # hwmod data
-obj-$(CONFIG_SOC_OMAP2420)             += omap_hwmod_2xxx_ipblock_data.o \
-                                          omap_hwmod_2xxx_3xxx_ipblock_data.o \
-                                          omap_hwmod_2xxx_interconnect_data.o \
-                                          omap_hwmod_2xxx_3xxx_interconnect_data.o \
-                                          omap_hwmod_2420_data.o
-obj-$(CONFIG_SOC_OMAP2430)             += omap_hwmod_2xxx_ipblock_data.o \
-                                          omap_hwmod_2xxx_3xxx_ipblock_data.o \
-                                          omap_hwmod_2xxx_interconnect_data.o \
-                                          omap_hwmod_2xxx_3xxx_interconnect_data.o \
-                                          omap_hwmod_2430_data.o
-obj-$(CONFIG_ARCH_OMAP3)               += omap_hwmod_2xxx_3xxx_ipblock_data.o \
-                                          omap_hwmod_2xxx_3xxx_interconnect_data.o \
-                                          omap_hwmod_3xxx_data.o
+obj-$(CONFIG_SOC_OMAP2420)             += omap_hwmod_2xxx_ipblock_data.o
+obj-$(CONFIG_SOC_OMAP2420)             += omap_hwmod_2xxx_3xxx_ipblock_data.o
+obj-$(CONFIG_SOC_OMAP2420)             += omap_hwmod_2xxx_interconnect_data.o
+obj-$(CONFIG_SOC_OMAP2420)             += omap_hwmod_2xxx_3xxx_interconnect_data.o
+obj-$(CONFIG_SOC_OMAP2420)             += omap_hwmod_2420_data.o
+obj-$(CONFIG_SOC_OMAP2430)             += omap_hwmod_2xxx_ipblock_data.o
+obj-$(CONFIG_SOC_OMAP2430)             += omap_hwmod_2xxx_3xxx_ipblock_data.o
+obj-$(CONFIG_SOC_OMAP2430)             += omap_hwmod_2xxx_interconnect_data.o
+obj-$(CONFIG_SOC_OMAP2430)             += omap_hwmod_2xxx_3xxx_interconnect_data.o
+obj-$(CONFIG_SOC_OMAP2430)             += omap_hwmod_2430_data.o
+obj-$(CONFIG_ARCH_OMAP3)               += omap_hwmod_2xxx_3xxx_ipblock_data.o
+obj-$(CONFIG_ARCH_OMAP3)               += omap_hwmod_2xxx_3xxx_interconnect_data.o
+obj-$(CONFIG_ARCH_OMAP3)               += omap_hwmod_3xxx_data.o
 obj-$(CONFIG_ARCH_OMAP4)               += omap_hwmod_44xx_data.o
 
 # EMU peripherals
@@ -208,23 +205,19 @@ obj-$(CONFIG_MACH_OMAP3EVM)               += board-omap3evm.o
 obj-$(CONFIG_MACH_OMAP3_PANDORA)       += board-omap3pandora.o
 obj-$(CONFIG_MACH_OMAP_3430SDP)                += board-3430sdp.o
 obj-$(CONFIG_MACH_NOKIA_N8X0)          += board-n8x0.o
-obj-$(CONFIG_MACH_NOKIA_RM680)         += board-rm680.o \
-                                          sdram-nokia.o
-obj-$(CONFIG_MACH_NOKIA_RX51)          += board-rx51.o \
-                                          sdram-nokia.o \
-                                          board-rx51-peripherals.o \
-                                          board-rx51-video.o
-obj-$(CONFIG_MACH_OMAP_ZOOM2)          += board-zoom.o \
-                                          board-zoom-peripherals.o \
-                                          board-zoom-display.o \
-                                          board-zoom-debugboard.o
-obj-$(CONFIG_MACH_OMAP_ZOOM3)          += board-zoom.o \
-                                          board-zoom-peripherals.o \
-                                          board-zoom-display.o \
-                                          board-zoom-debugboard.o
-obj-$(CONFIG_MACH_OMAP_3630SDP)                += board-3630sdp.o \
-                                          board-zoom-peripherals.o \
-                                          board-zoom-display.o
+obj-$(CONFIG_MACH_NOKIA_RM680)         += board-rm680.o sdram-nokia.o
+obj-$(CONFIG_MACH_NOKIA_RX51)          += board-rx51.o sdram-nokia.o
+obj-$(CONFIG_MACH_NOKIA_RX51)          += board-rx51-peripherals.o
+obj-$(CONFIG_MACH_NOKIA_RX51)          += board-rx51-video.o
+obj-$(CONFIG_MACH_OMAP_ZOOM2)          += board-zoom.o board-zoom-peripherals.o
+obj-$(CONFIG_MACH_OMAP_ZOOM2)          += board-zoom-display.o
+obj-$(CONFIG_MACH_OMAP_ZOOM2)          += board-zoom-debugboard.o
+obj-$(CONFIG_MACH_OMAP_ZOOM3)          += board-zoom.o board-zoom-peripherals.o
+obj-$(CONFIG_MACH_OMAP_ZOOM3)          += board-zoom-display.o
+obj-$(CONFIG_MACH_OMAP_ZOOM3)          += board-zoom-debugboard.o
+obj-$(CONFIG_MACH_OMAP_3630SDP)                += board-3630sdp.o
+obj-$(CONFIG_MACH_OMAP_3630SDP)                += board-zoom-peripherals.o
+obj-$(CONFIG_MACH_OMAP_3630SDP)                += board-zoom-display.o
 obj-$(CONFIG_MACH_CM_T35)              += board-cm-t35.o
 obj-$(CONFIG_MACH_CM_T3517)            += board-cm-t3517.o
 obj-$(CONFIG_MACH_IGEP0020)            += board-igep0020.o
index d6c9e61..4cb1fe6 100644 (file)
@@ -55,7 +55,7 @@ static inline void omap34xx_map_common_io(void)
 }
 #endif
 
-#ifdef CONFIG_SOC_OMAPTI81XX
+#ifdef CONFIG_SOC_TI81XX
 extern void omapti81xx_map_common_io(void);
 #else
 static inline void omapti81xx_map_common_io(void)
@@ -63,7 +63,7 @@ static inline void omapti81xx_map_common_io(void)
 }
 #endif
 
-#ifdef CONFIG_SOC_OMAPAM33XX
+#ifdef CONFIG_SOC_AM33XX
 extern void omapam33xx_map_common_io(void);
 #else
 static inline void omapam33xx_map_common_io(void)
index ae62ece..7b4b932 100644 (file)
@@ -645,7 +645,11 @@ static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
 
 void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
 {
-       char *name = "mmci-omap";
+       struct platform_device *pdev;
+       struct omap_hwmod *oh;
+       int id = 0;
+       char *oh_name = "msdi1";
+       char *dev_name = "mmci-omap";
 
        if (!mmc_data[0]) {
                pr_err("%s fails: Incomplete platform data\n", __func__);
@@ -653,8 +657,17 @@ void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
        }
 
        omap242x_mmc_mux(mmc_data[0]);
-       omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE,
-                                       INT_24XX_MMC_IRQ, mmc_data[0]);
+
+       oh = omap_hwmod_lookup(oh_name);
+       if (!oh) {
+               pr_err("Could not look up %s\n", oh_name);
+               return;
+       }
+       pdev = omap_device_build(dev_name, id, oh, mmc_data[0],
+                                sizeof(struct omap_mmc_platform_data), NULL, 0, 0);
+       if (IS_ERR(pdev))
+               WARN(1, "Can'd build omap_device for %s:%s.\n",
+                                       dev_name, oh->name);
 }
 
 #endif
index b19d849..ff75abe 100644 (file)
@@ -227,10 +227,6 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
 
        dma_stride              = OMAP2_DMA_STRIDE;
        dma_common_ch_start     = CSDP;
-       if (cpu_is_omap3630() || cpu_is_omap44xx())
-               dma_common_ch_end = CCDN;
-       else
-               dma_common_ch_end = CCFN;
 
        p = kzalloc(sizeof(struct omap_system_dma_plat_info), GFP_KERNEL);
        if (!p) {
@@ -277,6 +273,13 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
                dev_err(&pdev->dev, "%s: kzalloc fail\n", __func__);
                return -ENOMEM;
        }
+
+       /* Check the capabilities register for descriptor loading feature */
+       if (dma_read(CAPS_0, 0) & DMA_HAS_DESCRIPTOR_CAPS)
+               dma_common_ch_end = CCDN;
+       else
+               dma_common_ch_end = CCFN;
+
        return 0;
 }
 
index 3376388..845309f 100644 (file)
@@ -28,8 +28,6 @@
 
 #include <plat/dsp.h>
 
-extern phys_addr_t omap_dsp_get_mempool_base(void);
-
 static struct platform_device *omap_dsp_pdev;
 
 static struct omap_dsp_platform_data omap_dsp_pdata __initdata = {
@@ -47,6 +45,31 @@ static struct omap_dsp_platform_data omap_dsp_pdata __initdata = {
        .dsp_cm_rmw_bits = omap2_cm_rmw_mod_reg_bits,
 };
 
+static phys_addr_t omap_dsp_phys_mempool_base;
+
+void __init omap_dsp_reserve_sdram_memblock(void)
+{
+       phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE;
+       phys_addr_t paddr;
+
+       if (!size)
+               return;
+
+       paddr = arm_memblock_steal(size, SZ_1M);
+       if (!paddr) {
+               pr_err("%s: failed to reserve %llx bytes\n",
+                               __func__, (unsigned long long)size);
+               return;
+       }
+
+       omap_dsp_phys_mempool_base = paddr;
+}
+
+static phys_addr_t omap_dsp_get_mempool_base(void)
+{
+       return omap_dsp_phys_mempool_base;
+}
+
 static int __init omap_dsp_init(void)
 {
        struct platform_device *pdev;
index 580e684..46b09da 100644 (file)
 #define GPMC_ECC_SIZE_CONFIG   0x1fc
 #define GPMC_ECC1_RESULT        0x200
 
+/* GPMC ECC control settings */
+#define GPMC_ECC_CTRL_ECCCLEAR         0x100
+#define GPMC_ECC_CTRL_ECCDISABLE       0x000
+#define GPMC_ECC_CTRL_ECCREG1          0x001
+#define GPMC_ECC_CTRL_ECCREG2          0x002
+#define GPMC_ECC_CTRL_ECCREG3          0x003
+#define GPMC_ECC_CTRL_ECCREG4          0x004
+#define GPMC_ECC_CTRL_ECCREG5          0x005
+#define GPMC_ECC_CTRL_ECCREG6          0x006
+#define GPMC_ECC_CTRL_ECCREG7          0x007
+#define GPMC_ECC_CTRL_ECCREG8          0x008
+#define GPMC_ECC_CTRL_ECCREG9          0x009
+
 #define GPMC_CS0_OFFSET                0x60
 #define GPMC_CS_SIZE           0x30
 
@@ -860,8 +873,9 @@ int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size)
        gpmc_ecc_used = cs;
 
        /* clear ecc and enable bits */
-       val = ((0x00000001<<8) | 0x00000001);
-       gpmc_write_reg(GPMC_ECC_CONTROL, val);
+       gpmc_write_reg(GPMC_ECC_CONTROL,
+                       GPMC_ECC_CTRL_ECCCLEAR |
+                       GPMC_ECC_CTRL_ECCREG1);
 
        /* program ecc and result sizes */
        val = ((((ecc_size >> 1) - 1) << 22) | (0x0000000F));
@@ -869,13 +883,15 @@ int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size)
 
        switch (mode) {
        case GPMC_ECC_READ:
-               gpmc_write_reg(GPMC_ECC_CONTROL, 0x101);
+       case GPMC_ECC_WRITE:
+               gpmc_write_reg(GPMC_ECC_CONTROL,
+                               GPMC_ECC_CTRL_ECCCLEAR |
+                               GPMC_ECC_CTRL_ECCREG1);
                break;
        case GPMC_ECC_READSYN:
-                gpmc_write_reg(GPMC_ECC_CONTROL, 0x100);
-               break;
-       case GPMC_ECC_WRITE:
-               gpmc_write_reg(GPMC_ECC_CONTROL, 0x101);
+               gpmc_write_reg(GPMC_ECC_CONTROL,
+                               GPMC_ECC_CTRL_ECCCLEAR |
+                               GPMC_ECC_CTRL_ECCDISABLE);
                break;
        default:
                printk(KERN_INFO "Error: Unrecognized Mode[%d]!\n", mode);
index b0268ea..be697d4 100644 (file)
@@ -355,7 +355,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
         *
         * temporary HACK: ocr_mask instead of fixed supply
         */
-       if (cpu_is_omap3505() || cpu_is_omap3517())
+       if (soc_is_am35xx())
                mmc->slots[0].ocr_mask = MMC_VDD_165_195 |
                                         MMC_VDD_26_27 |
                                         MMC_VDD_27_28 |
@@ -365,7 +365,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
        else
                mmc->slots[0].ocr_mask = c->ocr_mask;
 
-       if (!cpu_is_omap3517() && !cpu_is_omap3505())
+       if (!soc_is_am35xx())
                mmc->slots[0].features |= HSMMC_HAS_PBIAS;
 
        if (cpu_is_omap44xx() && (omap_rev() > OMAP4430_REV_ES1_0))
@@ -388,7 +388,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
                        }
                }
 
-               if (cpu_is_omap3517() || cpu_is_omap3505())
+               if (soc_is_am35xx())
                        mmc->slots[0].set_power = nop_mmc_set_power;
 
                /* OMAP3630 HSMMC1 supports only 4-bit */
@@ -400,7 +400,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
                }
                break;
        case 2:
-               if (cpu_is_omap3517() || cpu_is_omap3505())
+               if (soc_is_am35xx())
                        mmc->slots[0].set_power = am35x_hsmmc2_set_power;
 
                if (c->ext_clock)
index f139817..0389b32 100644 (file)
@@ -185,8 +185,7 @@ static void __init omap3_cpuinfo(void)
         */
        if (cpu_is_omap3630()) {
                cpu_name = "OMAP3630";
-       } else if (cpu_is_omap3517()) {
-               /* AM35xx devices */
+       } else if (soc_is_am35xx()) {
                cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
        } else if (cpu_is_ti816x()) {
                cpu_name = "TI816X";
@@ -352,13 +351,13 @@ void __init omap3xxx_check_revision(void)
                 */
                switch (rev) {
                case 0:
-                       omap_revision = OMAP3517_REV_ES1_0;
+                       omap_revision = AM35XX_REV_ES1_0;
                        cpu_rev = "1.0";
                        break;
                case 1:
                /* FALLTHROUGH */
                default:
-                       omap_revision = OMAP3517_REV_ES1_1;
+                       omap_revision = AM35XX_REV_ES1_1;
                        cpu_rev = "1.1";
                }
                break;
index d79321b..548de90 100644 (file)
 #define OMAP_WKG_ENB_B_0                       0x14
 #define OMAP_WKG_ENB_C_0                       0x18
 #define OMAP_WKG_ENB_D_0                       0x1c
-#define OMAP_WKG_ENB_SECURE_A_0                        0x20
-#define OMAP_WKG_ENB_SECURE_B_0                        0x24
-#define OMAP_WKG_ENB_SECURE_C_0                        0x28
-#define OMAP_WKG_ENB_SECURE_D_0                        0x2c
 #define OMAP_WKG_ENB_A_1                       0x410
 #define OMAP_WKG_ENB_B_1                       0x414
 #define OMAP_WKG_ENB_C_1                       0x418
 #define OMAP_WKG_ENB_D_1                       0x41c
-#define OMAP_WKG_ENB_SECURE_A_1                        0x420
-#define OMAP_WKG_ENB_SECURE_B_1                        0x424
-#define OMAP_WKG_ENB_SECURE_C_1                        0x428
-#define OMAP_WKG_ENB_SECURE_D_1                        0x42c
 #define OMAP_AUX_CORE_BOOT_0                   0x800
 #define OMAP_AUX_CORE_BOOT_1                   0x804
 #define OMAP_PTMSYNCREQ_MASK                   0xc00
index 4b9491a..e1f9c6f 100644 (file)
@@ -173,7 +173,7 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
 };
 #endif
 
-#ifdef CONFIG_SOC_OMAPTI81XX
+#ifdef CONFIG_SOC_TI81XX
 static struct map_desc omapti81xx_io_desc[] __initdata = {
        {
                .virtual        = L4_34XX_VIRT,
@@ -184,7 +184,7 @@ static struct map_desc omapti81xx_io_desc[] __initdata = {
 };
 #endif
 
-#ifdef CONFIG_SOC_OMAPAM33XX
+#ifdef CONFIG_SOC_AM33XX
 static struct map_desc omapam33xx_io_desc[] __initdata = {
        {
                .virtual        = L4_34XX_VIRT,
@@ -216,41 +216,11 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
                .type           = MT_DEVICE,
        },
        {
-               .virtual        = OMAP44XX_GPMC_VIRT,
-               .pfn            = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
-               .length         = OMAP44XX_GPMC_SIZE,
-               .type           = MT_DEVICE,
-       },
-       {
-               .virtual        = OMAP44XX_EMIF1_VIRT,
-               .pfn            = __phys_to_pfn(OMAP44XX_EMIF1_PHYS),
-               .length         = OMAP44XX_EMIF1_SIZE,
-               .type           = MT_DEVICE,
-       },
-       {
-               .virtual        = OMAP44XX_EMIF2_VIRT,
-               .pfn            = __phys_to_pfn(OMAP44XX_EMIF2_PHYS),
-               .length         = OMAP44XX_EMIF2_SIZE,
-               .type           = MT_DEVICE,
-       },
-       {
-               .virtual        = OMAP44XX_DMM_VIRT,
-               .pfn            = __phys_to_pfn(OMAP44XX_DMM_PHYS),
-               .length         = OMAP44XX_DMM_SIZE,
-               .type           = MT_DEVICE,
-       },
-       {
                .virtual        = L4_PER_44XX_VIRT,
                .pfn            = __phys_to_pfn(L4_PER_44XX_PHYS),
                .length         = L4_PER_44XX_SIZE,
                .type           = MT_DEVICE,
        },
-       {
-               .virtual        = L4_EMU_44XX_VIRT,
-               .pfn            = __phys_to_pfn(L4_EMU_44XX_PHYS),
-               .length         = L4_EMU_44XX_SIZE,
-               .type           = MT_DEVICE,
-       },
 #ifdef CONFIG_OMAP4_ERRATA_I688
        {
                .virtual        = OMAP4_SRAM_VA,
@@ -286,14 +256,14 @@ void __init omap34xx_map_common_io(void)
 }
 #endif
 
-#ifdef CONFIG_SOC_OMAPTI81XX
+#ifdef CONFIG_SOC_TI81XX
 void __init omapti81xx_map_common_io(void)
 {
        iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
 }
 #endif
 
-#ifdef CONFIG_SOC_OMAPAM33XX
+#ifdef CONFIG_SOC_AM33XX
 void __init omapam33xx_map_common_io(void)
 {
        iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
index 0812b15..80b8892 100644 (file)
@@ -37,9 +37,6 @@
 #define OMAP4_L3_PER_IO_OFFSET 0xb1100000
 #define OMAP4_L3_PER_IO_ADDRESS(pa)    IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
 
-#define OMAP4_GPMC_IO_OFFSET           0xa9000000
-#define OMAP4_GPMC_IO_ADDRESS(pa)      IOMEM((pa) + OMAP4_GPMC_IO_OFFSET)
-
 #define OMAP2_EMU_IO_OFFSET            0xaa800000      /* Emulation */
 #define OMAP2_EMU_IO_ADDRESS(pa)       IOMEM((pa) + OMAP2_EMU_IO_OFFSET)
 
 #define L4_ABE_44XX_VIRT       (L4_ABE_44XX_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_ABE_44XX_SIZE       SZ_1M
 
-#define L4_EMU_44XX_PHYS       L4_EMU_44XX_BASE
-                                               /* 0x54000000 --> 0xfe800000 */
-#define L4_EMU_44XX_VIRT       (L4_EMU_44XX_PHYS + OMAP2_EMU_IO_OFFSET)
-#define L4_EMU_44XX_SIZE       SZ_8M
-
-#define OMAP44XX_GPMC_PHYS     OMAP44XX_GPMC_BASE
-                                               /* 0x50000000 --> 0xf9000000 */
-#define OMAP44XX_GPMC_VIRT     (OMAP44XX_GPMC_PHYS + OMAP4_GPMC_IO_OFFSET)
-#define OMAP44XX_GPMC_SIZE     SZ_1M
-
-
-#define OMAP44XX_EMIF1_PHYS    OMAP44XX_EMIF1_BASE
-                                               /* 0x4c000000 --> 0xfd100000 */
-#define OMAP44XX_EMIF1_VIRT    (OMAP44XX_EMIF1_PHYS + OMAP4_L3_PER_IO_OFFSET)
-#define OMAP44XX_EMIF1_SIZE    SZ_1M
-
-#define OMAP44XX_EMIF2_PHYS    OMAP44XX_EMIF2_BASE
-                                               /* 0x4d000000 --> 0xfd200000 */
-#define OMAP44XX_EMIF2_SIZE    SZ_1M
-#define OMAP44XX_EMIF2_VIRT    (OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF1_SIZE)
-
-#define OMAP44XX_DMM_PHYS      OMAP44XX_DMM_BASE
-                                               /* 0x4e000000 --> 0xfd300000 */
-#define OMAP44XX_DMM_SIZE      SZ_1M
-#define OMAP44XX_DMM_VIRT      (OMAP44XX_EMIF2_VIRT + OMAP44XX_EMIF2_SIZE)
index 1ecf545..fdc4303 100644 (file)
@@ -231,7 +231,7 @@ static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs
                        goto out;
 
                irqnr = readl_relaxed(base_addr + 0xd8);
-#ifdef CONFIG_SOC_OMAPTI81XX
+#ifdef CONFIG_SOC_TI81XX
                if (irqnr)
                        goto out;
                irqnr = readl_relaxed(base_addr + 0xf8);
index fd48797..b26d3c9 100644 (file)
@@ -3306,7 +3306,7 @@ int __init omap3xxx_hwmod_init(void)
            rev == OMAP3430_REV_ES2_1 || rev == OMAP3430_REV_ES3_0 ||
            rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) {
                h = omap34xx_hwmod_ocp_ifs;
-       } else if (rev == OMAP3517_REV_ES1_0 || rev == OMAP3517_REV_ES1_1) {
+       } else if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) {
                h = am35xx_hwmod_ocp_ifs;
        } else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 ||
                   rev == OMAP3630_REV_ES1_2) {
index b7ea468..fb0a0a6 100644 (file)
@@ -311,7 +311,7 @@ void __init omap3xxx_powerdomains_init(void)
                 rev == OMAP3430_REV_ES3_0 || rev == OMAP3630_REV_ES1_0)
                pwrdm_register_pwrdms(powerdomains_omap3430es2_es3_0);
        else if (rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2 ||
-                rev == OMAP3517_REV_ES1_0 || rev == OMAP3517_REV_ES1_1 ||
+                rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1 ||
                 rev == OMAP3630_REV_ES1_1 || rev == OMAP3630_REV_ES1_2)
                pwrdm_register_pwrdms(powerdomains_omap3430es3_1plus);
        else
index 1b78358..840929b 100644 (file)
@@ -90,7 +90,7 @@ static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
 }
 
 static struct irqaction omap2_gp_timer_irq = {
-       .name           = "gp timer",
+       .name           = "gp_timer",
        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
        .handler        = omap2_gp_timer_interrupt,
 };
@@ -132,7 +132,7 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
 }
 
 static struct clock_event_device clockevent_gpt = {
-       .name           = "gp timer",
+       .name           = "gp_timer",
        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
        .shift          = 32,
        .set_next_event = omap2_gp_timer_set_next_event,
@@ -236,22 +236,8 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
 }
 
 /* Clocksource code */
-
-#ifdef CONFIG_OMAP_32K_TIMER
-/*
- * When 32k-timer is enabled, don't use GPTimer for clocksource
- * instead, just leave default clocksource which uses the 32k
- * sync counter.  See clocksource setup in plat-omap/counter_32k.c
- */
-
-static void __init omap2_gp_clocksource_init(int unused, const char *dummy)
-{
-       omap_init_clocksource_32k();
-}
-
-#else
-
 static struct omap_dm_timer clksrc;
+static bool use_gptimer_clksrc;
 
 /*
  * clocksource
@@ -262,7 +248,7 @@ static cycle_t clocksource_read_cycles(struct clocksource *cs)
 }
 
 static struct clocksource clocksource_gpt = {
-       .name           = "gp timer",
+       .name           = "gp_timer",
        .rating         = 300,
        .read           = clocksource_read_cycles,
        .mask           = CLOCKSOURCE_MASK(32),
@@ -278,7 +264,46 @@ static u32 notrace dmtimer_read_sched_clock(void)
 }
 
 /* Setup free-running counter for clocksource */
-static void __init omap2_gp_clocksource_init(int gptimer_id,
+static int __init omap2_sync32k_clocksource_init(void)
+{
+       int ret;
+       struct omap_hwmod *oh;
+       void __iomem *vbase;
+       const char *oh_name = "counter_32k";
+
+       /*
+        * First check hwmod data is available for sync32k counter
+        */
+       oh = omap_hwmod_lookup(oh_name);
+       if (!oh || oh->slaves_cnt == 0)
+               return -ENODEV;
+
+       omap_hwmod_setup_one(oh_name);
+
+       vbase = omap_hwmod_get_mpu_rt_va(oh);
+       if (!vbase) {
+               pr_warn("%s: failed to get counter_32k resource\n", __func__);
+               return -ENXIO;
+       }
+
+       ret = omap_hwmod_enable(oh);
+       if (ret) {
+               pr_warn("%s: failed to enable counter_32k module (%d)\n",
+                                                       __func__, ret);
+               return ret;
+       }
+
+       ret = omap_init_clocksource_32k(vbase);
+       if (ret) {
+               pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n",
+                                                       __func__, ret);
+               omap_hwmod_idle(oh);
+       }
+
+       return ret;
+}
+
+static void __init omap2_gptimer_clocksource_init(int gptimer_id,
                                                const char *fck_source)
 {
        int res;
@@ -286,9 +311,6 @@ static void __init omap2_gp_clocksource_init(int gptimer_id,
        res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source);
        BUG_ON(res);
 
-       pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n",
-               gptimer_id, clksrc.rate);
-
        __omap_dm_timer_load_start(&clksrc,
                        OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
        setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
@@ -296,15 +318,36 @@ static void __init omap2_gp_clocksource_init(int gptimer_id,
        if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
                pr_err("Could not register clocksource %s\n",
                        clocksource_gpt.name);
+       else
+               pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n",
+                       gptimer_id, clksrc.rate);
+}
+
+static void __init omap2_clocksource_init(int gptimer_id,
+                                               const char *fck_source)
+{
+       /*
+        * First give preference to kernel parameter configuration
+        * by user (clocksource="gp_timer").
+        *
+        * In case of missing kernel parameter for clocksource,
+        * first check for availability for 32k-sync timer, in case
+        * of failure in finding 32k_counter module or registering
+        * it as clocksource, execution will fallback to gp-timer.
+        */
+       if (use_gptimer_clksrc == true)
+               omap2_gptimer_clocksource_init(gptimer_id, fck_source);
+       else if (omap2_sync32k_clocksource_init())
+               /* Fall back to gp-timer code */
+               omap2_gptimer_clocksource_init(gptimer_id, fck_source);
 }
-#endif
 
 #define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src,                 \
                                clksrc_nr, clksrc_src)                  \
 static void __init omap##name##_timer_init(void)                       \
 {                                                                      \
        omap2_gp_clockevent_init((clkev_nr), clkev_src);                \
-       omap2_gp_clocksource_init((clksrc_nr), clksrc_src);             \
+       omap2_clocksource_init((clksrc_nr), clksrc_src);                \
 }
 
 #define OMAP_SYS_TIMER(name)                                           \
@@ -335,7 +378,7 @@ static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
 static void __init omap4_timer_init(void)
 {
        omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
-       omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE);
+       omap2_clocksource_init(2, OMAP4_MPU_SOURCE);
 #ifdef CONFIG_LOCAL_TIMERS
        /* Local timers are not supprted on OMAP4430 ES1.0 */
        if (omap_rev() != OMAP4430_REV_ES1_0) {
@@ -503,3 +546,28 @@ static int __init omap2_dm_timer_init(void)
        return 0;
 }
 arch_initcall(omap2_dm_timer_init);
+
+/**
+ * omap2_override_clocksource - clocksource override with user configuration
+ *
+ * Allows user to override default clocksource, using kernel parameter
+ *   clocksource="gp_timer"    (For all OMAP2PLUS architectures)
+ *
+ * Note that, here we are using same standard kernel parameter "clocksource=",
+ * and not introducing any OMAP specific interface.
+ */
+static int __init omap2_override_clocksource(char *str)
+{
+       if (!str)
+               return 0;
+       /*
+        * For OMAP architecture, we only have two options
+        *    - sync_32k (default)
+        *    - gp_timer (sys_clk based)
+        */
+       if (!strcmp(str, "gp_timer"))
+               use_gptimer_clksrc = true;
+
+       return 0;
+}
+early_param("clocksource", omap2_override_clocksource);
index 8d5ed77..b19d1b4 100644 (file)
@@ -90,7 +90,7 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
        musb_plat.mode = board_data->mode;
        musb_plat.extvbus = board_data->extvbus;
 
-       if (cpu_is_omap3517() || cpu_is_omap3505()) {
+       if (soc_is_am35xx()) {
                oh_name = "am35x_otg_hs";
                name = "musb-am35x";
        } else if (cpu_is_ti81xx()) {
index 57db203..d0103c8 100644 (file)
@@ -118,7 +118,7 @@ void __init omap3xxx_voltagedomains_init(void)
        }
 #endif
 
-       if (cpu_is_omap3517() || cpu_is_omap3505())
+       if (soc_is_am35xx())
                voltdms = voltagedomains_am35xx;
        else
                voltdms = voltagedomains_omap3;
index 3518fe8..270a0b6 100644 (file)
@@ -14,6 +14,8 @@ obj-                          :=
 
 # core
 
+obj-y                          += common.o
+
 obj-$(CONFIG_CPU_S3C2410)      += s3c2410.o
 obj-$(CONFIG_S3C2410_DMA)      += dma-s3c2410.o
 obj-$(CONFIG_S3C2410_PM)       += pm-s3c2410.o sleep-s3c2410.o
@@ -33,6 +35,10 @@ obj-$(CONFIG_S3C2440_DMA)    += dma-s3c2440.o
 
 obj-$(CONFIG_CPU_S3C2443)      += s3c2443.o irq-s3c2443.o clock-s3c2443.o
 
+# PM
+
+obj-$(CONFIG_PM)               += pm.o irq-pm.o sleep.o
+
 # common code
 
 obj-$(CONFIG_S3C2443_COMMON)   += common-s3c2443.o
similarity index 76%
rename from arch/arm/plat-s3c24xx/cpu.c
rename to arch/arm/mach-s3c24xx/common.c
index 290942d..56cdd34 100644 (file)
@@ -4,7 +4,7 @@
  *     http://www.simtec.co.uk/products/SWLINUX/
  *     Ben Dooks <ben@simtec.co.uk>
  *
- * S3C24XX CPU Support
+ * Common code for S3C24XX machines
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -41,6 +41,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
+#include <mach/regs-clock.h>
 #include <mach/regs-gpio.h>
 #include <plat/regs-serial.h>
 
@@ -52,6 +53,8 @@
 #include <plat/s3c2416.h>
 #include <plat/s3c244x.h>
 #include <plat/s3c2443.h>
+#include <plat/cpu-freq.h>
+#include <plat/pll.h>
 
 /* table of supported CPUs */
 
@@ -234,3 +237,67 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
 
        s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
 }
+
+/* Serial port registrations */
+
+static struct resource s3c2410_uart0_resource[] = {
+       [0] = DEFINE_RES_MEM(S3C2410_PA_UART0, SZ_16K),
+       [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX0, \
+                       IRQ_S3CUART_ERR0 - IRQ_S3CUART_RX0 + 1, \
+                       NULL, IORESOURCE_IRQ)
+};
+
+static struct resource s3c2410_uart1_resource[] = {
+       [0] = DEFINE_RES_MEM(S3C2410_PA_UART1, SZ_16K),
+       [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX1, \
+                       IRQ_S3CUART_ERR1 - IRQ_S3CUART_RX1 + 1, \
+                       NULL, IORESOURCE_IRQ)
+};
+
+static struct resource s3c2410_uart2_resource[] = {
+       [0] = DEFINE_RES_MEM(S3C2410_PA_UART2, SZ_16K),
+       [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX2, \
+                       IRQ_S3CUART_ERR2 - IRQ_S3CUART_RX2 + 1, \
+                       NULL, IORESOURCE_IRQ)
+};
+
+static struct resource s3c2410_uart3_resource[] = {
+       [0] = DEFINE_RES_MEM(S3C2443_PA_UART3, SZ_16K),
+       [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX3, \
+                       IRQ_S3CUART_ERR3 - IRQ_S3CUART_RX3 + 1, \
+                       NULL, IORESOURCE_IRQ)
+};
+
+struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
+       [0] = {
+               .resources      = s3c2410_uart0_resource,
+               .nr_resources   = ARRAY_SIZE(s3c2410_uart0_resource),
+       },
+       [1] = {
+               .resources      = s3c2410_uart1_resource,
+               .nr_resources   = ARRAY_SIZE(s3c2410_uart1_resource),
+       },
+       [2] = {
+               .resources      = s3c2410_uart2_resource,
+               .nr_resources   = ARRAY_SIZE(s3c2410_uart2_resource),
+       },
+       [3] = {
+               .resources      = s3c2410_uart3_resource,
+               .nr_resources   = ARRAY_SIZE(s3c2410_uart3_resource),
+       },
+};
+
+/* initialise all the clocks */
+
+void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk,
+                                          unsigned long hclk,
+                                          unsigned long pclk)
+{
+       clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON),
+                                       clk_xtal.rate);
+
+       clk_mpll.rate = fclk;
+       clk_h.rate = hclk;
+       clk_p.rate = pclk;
+       clk_f.rate = fclk;
+}
index 44ae077..2132c4f 100644 (file)
 
 #include <plat/clock.h>
 
+/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
+#define OMAP2_32KSYNCNT_CR_OFF         0x10
+
 /*
  * 32KHz clocksource ... always available, on pretty most chips except
  * OMAP 730 and 1510.  Other timers could be used as clocksources, with
  * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
  * but systems won't necessarily want to spend resources that way.
  */
-static void __iomem *timer_32k_base;
-
-#define OMAP16XX_TIMER_32K_SYNCHRONIZED                0xfffbc410
+static void __iomem *sync32k_cnt_reg;
 
 static u32 notrace omap_32k_read_sched_clock(void)
 {
-       return timer_32k_base ? __raw_readl(timer_32k_base) : 0;
+       return sync32k_cnt_reg ? __raw_readl(sync32k_cnt_reg) : 0;
 }
 
 /**
@@ -60,7 +61,7 @@ static void omap_read_persistent_clock(struct timespec *ts)
        struct timespec *tsp = &persistent_ts;
 
        last_cycles = cycles;
-       cycles = timer_32k_base ? __raw_readl(timer_32k_base) : 0;
+       cycles = sync32k_cnt_reg ? __raw_readl(sync32k_cnt_reg) : 0;
        delta = cycles - last_cycles;
 
        nsecs = clocksource_cyc2ns(delta, persistent_mult, persistent_shift);
@@ -69,55 +70,41 @@ static void omap_read_persistent_clock(struct timespec *ts)
        *ts = *tsp;
 }
 
-int __init omap_init_clocksource_32k(void)
+/**
+ * omap_init_clocksource_32k - setup and register counter 32k as a
+ * kernel clocksource
+ * @pbase: base addr of counter_32k module
+ * @size: size of counter_32k to map
+ *
+ * Returns 0 upon success or negative error code upon failure.
+ *
+ */
+int __init omap_init_clocksource_32k(void __iomem *vbase)
 {
-       static char err[] __initdata = KERN_ERR
-                       "%s: can't register clocksource!\n";
-
-       if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
-               u32 pbase;
-               unsigned long size = SZ_4K;
-               void __iomem *base;
-               struct clk *sync_32k_ick;
-
-               if (cpu_is_omap16xx()) {
-                       pbase = OMAP16XX_TIMER_32K_SYNCHRONIZED;
-                       size = SZ_1K;
-               } else if (cpu_is_omap2420())
-                       pbase = OMAP2420_32KSYNCT_BASE + 0x10;
-               else if (cpu_is_omap2430())
-                       pbase = OMAP2430_32KSYNCT_BASE + 0x10;
-               else if (cpu_is_omap34xx())
-                       pbase = OMAP3430_32KSYNCT_BASE + 0x10;
-               else if (cpu_is_omap44xx())
-                       pbase = OMAP4430_32KSYNCT_BASE + 0x10;
-               else
-                       return -ENODEV;
-
-               /* For this to work we must have a static mapping in io.c for this area */
-               base = ioremap(pbase, size);
-               if (!base)
-                       return -ENODEV;
-
-               sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
-               if (!IS_ERR(sync_32k_ick))
-                       clk_enable(sync_32k_ick);
-
-               timer_32k_base = base;
-
-               /*
-                * 120000 rough estimate from the calculations in
-                * __clocksource_updatefreq_scale.
-                */
-               clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
-                               32768, NSEC_PER_SEC, 120000);
-
-               if (clocksource_mmio_init(base, "32k_counter", 32768, 250, 32,
-                                         clocksource_mmio_readl_up))
-                       printk(err, "32k_counter");
-
-               setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);
-               register_persistent_clock(NULL, omap_read_persistent_clock);
+       int ret;
+
+       /*
+        * 32k sync Counter register offset is at 0x10
+        */
+       sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF;
+
+       /*
+        * 120000 rough estimate from the calculations in
+        * __clocksource_updatefreq_scale.
+        */
+       clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
+                       32768, NSEC_PER_SEC, 120000);
+
+       ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768,
+                               250, 32, clocksource_mmio_readl_up);
+       if (ret) {
+               pr_err("32k_counter: can't register clocksource\n");
+               return ret;
        }
+
+       setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);
+       register_persistent_clock(NULL, omap_read_persistent_clock);
+       pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");
+
        return 0;
 }
index 09b07d2..1cba927 100644 (file)
 #include <plat/menelaus.h>
 #include <plat/omap44xx.h>
 
-#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
-       defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
-
-#define OMAP_MMC_NR_RES                2
-
-/*
- * Register MMC devices. Called from mach-omap1 and mach-omap2 device init.
- */
-int __init omap_mmc_add(const char *name, int id, unsigned long base,
-                               unsigned long size, unsigned int irq,
-                               struct omap_mmc_platform_data *data)
-{
-       struct platform_device *pdev;
-       struct resource res[OMAP_MMC_NR_RES];
-       int ret;
-
-       pdev = platform_device_alloc(name, id);
-       if (!pdev)
-               return -ENOMEM;
-
-       memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
-       res[0].start = base;
-       res[0].end = base + size - 1;
-       res[0].flags = IORESOURCE_MEM;
-       res[1].start = res[1].end = irq;
-       res[1].flags = IORESOURCE_IRQ;
-
-       ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
-       if (ret == 0)
-               ret = platform_device_add_data(pdev, data, sizeof(*data));
-       if (ret)
-               goto fail;
-
-       ret = platform_device_add(pdev);
-       if (ret)
-               goto fail;
-
-       /* return device handle to board setup code */
-       data->dev = &pdev->dev;
-       return 0;
-
-fail:
-       platform_device_put(pdev);
-       return ret;
-}
-
-#endif
-
 /*-------------------------------------------------------------------------*/
 
 #if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)
@@ -109,79 +61,6 @@ static void omap_init_rng(void)
 static inline void omap_init_rng(void) {}
 #endif
 
-/*-------------------------------------------------------------------------*/
-
-/* Numbering for the SPI-capable controllers when used for SPI:
- * spi         = 1
- * uwire       = 2
- * mmc1..2     = 3..4
- * mcbsp1..3   = 5..7
- */
-
-#if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
-
-#define        OMAP_UWIRE_BASE         0xfffb3000
-
-static struct resource uwire_resources[] = {
-       {
-               .start          = OMAP_UWIRE_BASE,
-               .end            = OMAP_UWIRE_BASE + 0x20,
-               .flags          = IORESOURCE_MEM,
-       },
-};
-
-static struct platform_device omap_uwire_device = {
-       .name      = "omap_uwire",
-       .id          = -1,
-       .num_resources  = ARRAY_SIZE(uwire_resources),
-       .resource       = uwire_resources,
-};
-
-static void omap_init_uwire(void)
-{
-       /* FIXME define and use a boot tag; not all boards will be hooking
-        * up devices to the microwire controller, and multi-board configs
-        * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
-        */
-
-       /* board-specific code must configure chipselects (only a few
-        * are normally used) and SCLK/SDI/SDO (each has two choices).
-        */
-       (void) platform_device_register(&omap_uwire_device);
-}
-#else
-static inline void omap_init_uwire(void) {}
-#endif
-
-#if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE)
-
-static phys_addr_t omap_dsp_phys_mempool_base;
-
-void __init omap_dsp_reserve_sdram_memblock(void)
-{
-       phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE;
-       phys_addr_t paddr;
-
-       if (!size)
-               return;
-
-       paddr = arm_memblock_steal(size, SZ_1M);
-       if (!paddr) {
-               pr_err("%s: failed to reserve %llx bytes\n",
-                               __func__, (unsigned long long)size);
-               return;
-       }
-
-       omap_dsp_phys_mempool_base = paddr;
-}
-
-phys_addr_t omap_dsp_get_mempool_base(void)
-{
-       return omap_dsp_phys_mempool_base;
-}
-EXPORT_SYMBOL(omap_dsp_get_mempool_base);
-#endif
-
 /*
  * This gets called after board-specific INIT_MACHINE, and initializes most
  * on-chip peripherals accessible on this board (except for few like USB):
@@ -208,7 +87,6 @@ static int __init omap_init_devices(void)
         * in alphabetical order so they're easier to sort through.
         */
        omap_init_rng();
-       omap_init_uwire();
        return 0;
 }
 arch_initcall(omap_init_devices);
index 987e610..cb16ade 100644 (file)
@@ -852,7 +852,7 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio,
        }
        l = p->dma_read(CCR, lch);
        l &= ~((1 << 6) | (1 << 26));
-       if (cpu_is_omap2430() || cpu_is_omap34xx() ||  cpu_is_omap44xx())
+       if (cpu_class_is_omap2() && !cpu_is_omap242x())
                l |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26);
        else
                l |= ((read_prio & 0x1) << 6);
@@ -2080,7 +2080,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
                }
        }
 
-       if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx())
+       if (cpu_class_is_omap2() && !cpu_is_omap242x())
                omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
                                DMA_DEFAULT_FIFO_DEPTH, 0);
 
index c4ed35e..3b0cfeb 100644 (file)
@@ -82,8 +82,6 @@ static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
 
 static void omap_timer_restore_context(struct omap_dm_timer *timer)
 {
-       __raw_writel(timer->context.tiocp_cfg,
-                       timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET);
        if (timer->revision == 1)
                __raw_writel(timer->context.tistat, timer->sys_stat);
 
index a557b84..d1cb6f5 100644 (file)
@@ -30,7 +30,7 @@
 #include <plat/i2c.h>
 #include <plat/omap_hwmod.h>
 
-extern int __init omap_init_clocksource_32k(void);
+extern int __init omap_init_clocksource_32k(void __iomem *vbase);
 
 extern void __init omap_check_revision(void);
 
index 4bdf14e..297245d 100644 (file)
@@ -121,6 +121,7 @@ IS_OMAP_CLASS(16xx, 0x16)
 IS_OMAP_CLASS(24xx, 0x24)
 IS_OMAP_CLASS(34xx, 0x34)
 IS_OMAP_CLASS(44xx, 0x44)
+IS_AM_CLASS(35xx, 0x35)
 IS_AM_CLASS(33xx, 0x33)
 
 IS_TI_CLASS(81xx, 0x81)
@@ -148,6 +149,7 @@ IS_AM_SUBCLASS(335x, 0x335)
 #define cpu_is_ti81xx()                        0
 #define cpu_is_ti816x()                        0
 #define cpu_is_ti814x()                        0
+#define soc_is_am35xx()                        0
 #define cpu_is_am33xx()                        0
 #define cpu_is_am335x()                        0
 #define cpu_is_omap44xx()              0
@@ -357,6 +359,7 @@ IS_OMAP_TYPE(3517, 0x3517)
 # undef cpu_is_ti81xx
 # undef cpu_is_ti816x
 # undef cpu_is_ti814x
+# undef soc_is_am35xx
 # undef cpu_is_am33xx
 # undef cpu_is_am335x
 # define cpu_is_omap3430()             is_omap3430()
@@ -378,6 +381,7 @@ IS_OMAP_TYPE(3517, 0x3517)
 # define cpu_is_ti81xx()               is_ti81xx()
 # define cpu_is_ti816x()               is_ti816x()
 # define cpu_is_ti814x()               is_ti814x()
+# define soc_is_am35xx()               is_am35xx()
 # define cpu_is_am33xx()               is_am33xx()
 # define cpu_is_am335x()               is_am335x()
 #endif
@@ -433,6 +437,10 @@ IS_OMAP_TYPE(3517, 0x3517)
 #define TI8148_REV_ES2_0       (TI814X_CLASS | (0x1 << 8))
 #define TI8148_REV_ES2_1       (TI814X_CLASS | (0x2 << 8))
 
+#define AM35XX_CLASS           0x35170034
+#define AM35XX_REV_ES1_0       AM35XX_CLASS
+#define AM35XX_REV_ES1_1       (AM35XX_CLASS | (0x1 << 8))
+
 #define AM335X_CLASS           0x33500034
 #define AM335X_REV_ES1_0       AM335X_CLASS
 
index 42afb4c..c5811d4 100644 (file)
 #define CLEAR_CSR_ON_READ              BIT(0xC)
 #define IS_WORD_16                     BIT(0xD)
 
+/* Defines for DMA Capabilities */
+#define DMA_HAS_TRANSPARENT_CAPS       (0x1 << 18)
+#define DMA_HAS_CONSTANT_FILL_CAPS     (0x1 << 19)
+#define DMA_HAS_DESCRIPTOR_CAPS                (0x3 << 20)
+
 enum omap_reg_offsets {
 
 GCR,           GSCR,           GRST1,          HW_ID,
index bdf871a..5da7356 100644 (file)
@@ -75,7 +75,6 @@ struct clk;
 
 struct timer_regs {
        u32 tidr;
-       u32 tiocp_cfg;
        u32 tistat;
        u32 tisr;
        u32 tier;
index 3e7ae0f..a7754a8 100644 (file)
@@ -177,9 +177,6 @@ extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
 void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
                                int nr_controllers);
 void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data);
-int omap_mmc_add(const char *name, int id, unsigned long base,
-                               unsigned long size, unsigned int irq,
-                               struct omap_mmc_platform_data *data);
 #else
 static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
                                int nr_controllers)
@@ -188,12 +185,6 @@ static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
 static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
 {
 }
-static inline int omap_mmc_add(const char *name, int id, unsigned long base,
-                               unsigned long size, unsigned int irq,
-                               struct omap_mmc_platform_data *data)
-{
-       return 0;
-}
 
 #endif
 
index 2467b80..9f60549 100644 (file)
@@ -12,10 +12,7 @@ obj-                         :=
 
 # Core files
 
-obj-y                          += cpu.o
 obj-y                          += irq.o
-obj-y                          += dev-uart.o
-obj-y                          += clock.o
 obj-$(CONFIG_S3C24XX_DCLK)     += clock-dclk.o
 
 obj-$(CONFIG_CPU_FREQ_S3C24XX) += cpu-freq.o
@@ -23,9 +20,6 @@ obj-$(CONFIG_CPU_FREQ_S3C24XX_DEBUGFS) += cpu-freq-debugfs.o
 
 # Architecture dependent builds
 
-obj-$(CONFIG_PM)               += pm.o
-obj-$(CONFIG_PM)               += irq-pm.o
-obj-$(CONFIG_PM)               += sleep.o
 obj-$(CONFIG_S3C2410_CLOCK)    += s3c2410-clock.o
 obj-$(CONFIG_S3C24XX_DMA)      += dma.o
 obj-$(CONFIG_S3C2410_IOTIMING) += s3c2410-iotiming.o
diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c
deleted file mode 100644 (file)
index 931d26d..0000000
+++ /dev/null
@@ -1,59 +0,0 @@
-/* linux/arch/arm/plat-s3c24xx/clock.c
- *
- * Copyright (c) 2004-2005 Simtec Electronics
- *     Ben Dooks <ben@simtec.co.uk>
- *
- * S3C24XX Core clock control support
- *
- * Based on, and code from linux/arch/arm/mach-versatile/clock.c
- **
- **  Copyright (C) 2004 ARM Limited.
- **  Written by Deep Blue Solutions Limited.
- *
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*/
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <asm/irq.h>
-
-#include <mach/regs-clock.h>
-#include <mach/regs-gpio.h>
-
-#include <plat/cpu-freq.h>
-
-#include <plat/clock.h>
-#include <plat/cpu.h>
-#include <plat/pll.h>
-
-/* initialise all the clocks */
-
-void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk,
-                                          unsigned long hclk,
-                                          unsigned long pclk)
-{
-       clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON),
-                                       clk_xtal.rate);
-
-       clk_mpll.rate = fclk;
-       clk_h.rate = hclk;
-       clk_p.rate = pclk;
-       clk_f.rate = fclk;
-}
diff --git a/arch/arm/plat-s3c24xx/dev-uart.c b/arch/arm/plat-s3c24xx/dev-uart.c
deleted file mode 100644 (file)
index 9ab22e6..0000000
+++ /dev/null
@@ -1,100 +0,0 @@
-/* linux/arch/arm/plat-s3c24xx/dev-uart.c
- *
- * Copyright (c) 2004 Simtec Electronics
- *     Ben Dooks <ben@simtec.co.uk>
- *
- * Base S3C24XX UART resource and platform device definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/list.h>
-#include <linux/serial_core.h>
-#include <linux/platform_device.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-#include <mach/hardware.h>
-#include <mach/map.h>
-
-#include <plat/devs.h>
-#include <plat/regs-serial.h>
-
-/* Serial port registrations */
-
-static struct resource s3c2410_uart0_resource[] = {
-       [0] = {
-               .start = S3C2410_PA_UART0,
-               .end   = S3C2410_PA_UART0 + 0x3fff,
-               .flags = IORESOURCE_MEM,
-       },
-       [1] = {
-               .start = IRQ_S3CUART_RX0,
-               .end   = IRQ_S3CUART_ERR0,
-               .flags = IORESOURCE_IRQ,
-       }
-};
-
-static struct resource s3c2410_uart1_resource[] = {
-       [0] = {
-               .start = S3C2410_PA_UART1,
-               .end   = S3C2410_PA_UART1 + 0x3fff,
-               .flags = IORESOURCE_MEM,
-       },
-       [1] = {
-               .start = IRQ_S3CUART_RX1,
-               .end   = IRQ_S3CUART_ERR1,
-               .flags = IORESOURCE_IRQ,
-       }
-};
-
-static struct resource s3c2410_uart2_resource[] = {
-       [0] = {
-               .start = S3C2410_PA_UART2,
-               .end   = S3C2410_PA_UART2 + 0x3fff,
-               .flags = IORESOURCE_MEM,
-       },
-       [1] = {
-               .start = IRQ_S3CUART_RX2,
-               .end   = IRQ_S3CUART_ERR2,
-               .flags = IORESOURCE_IRQ,
-       }
-};
-
-static struct resource s3c2410_uart3_resource[] = {
-       [0] = {
-               .start = S3C2443_PA_UART3,
-               .end   = S3C2443_PA_UART3 + 0x3fff,
-               .flags = IORESOURCE_MEM,
-       },
-       [1] = {
-               .start = IRQ_S3CUART_RX3,
-               .end   = IRQ_S3CUART_ERR3,
-               .flags = IORESOURCE_IRQ,
-       },
-};
-
-struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
-       [0] = {
-               .resources      = s3c2410_uart0_resource,
-               .nr_resources   = ARRAY_SIZE(s3c2410_uart0_resource),
-       },
-       [1] = {
-               .resources      = s3c2410_uart1_resource,
-               .nr_resources   = ARRAY_SIZE(s3c2410_uart1_resource),
-       },
-       [2] = {
-               .resources      = s3c2410_uart2_resource,
-               .nr_resources   = ARRAY_SIZE(s3c2410_uart2_resource),
-       },
-       [3] = {
-               .resources      = s3c2410_uart3_resource,
-               .nr_resources   = ARRAY_SIZE(s3c2410_uart3_resource),
-       },
-};
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
deleted file mode 100644 (file)
index 2c1193c..0000000
+++ /dev/null
@@ -1,132 +0,0 @@
-# arch/arm/plat-s5p/Kconfig
-#
-# Copyright (c) 2009 Samsung Electronics Co., Ltd.
-#              http://www.samsung.com/
-#
-# Licensed under GPLv2
-
-config PLAT_S5P
-       bool
-       depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
-       default y
-       select ARM_VIC if !ARCH_EXYNOS
-       select ARM_GIC if ARCH_EXYNOS
-       select GIC_NON_BANKED if ARCH_EXYNOS4
-       select NO_IOPORT
-       select ARCH_REQUIRE_GPIOLIB
-       select S3C_GPIO_TRACK
-       select S5P_GPIO_DRVSTR
-       select SAMSUNG_GPIOLIB_4BIT
-       select PLAT_SAMSUNG
-       select SAMSUNG_CLKSRC
-       select SAMSUNG_IRQ_VIC_TIMER
-       help
-         Base platform code for Samsung's S5P series SoC.
-
-config S5P_EXT_INT
-       bool
-       help
-         Use the external interrupts (other than GPIO interrupts.)
-         Note: Do not choose this for S5P6440 and S5P6450.
-
-config S5P_GPIO_INT
-       bool
-       help
-         Common code for the GPIO interrupts (other than external interrupts.)
-
-config S5P_HRT
-       bool
-       select SAMSUNG_DEV_PWM
-       help
-         Use the High Resolution timer support
-
-config S5P_DEV_UART
-       def_bool y
-       depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
-
-config S5P_PM
-       bool
-       help
-         Common code for power management support on S5P and newer SoCs
-         Note: Do not select this for S5P6440 and S5P6450.
-
-config S5P_SLEEP
-       bool
-       help
-         Internal config node to apply common S5P sleep management code.
-         Can be selected by S5P and newer SoCs with similar sleep procedure.
-
-config S5P_DEV_FIMC0
-       bool
-       help
-         Compile in platform device definitions for FIMC controller 0
-
-config S5P_DEV_FIMC1
-       bool
-       help
-         Compile in platform device definitions for FIMC controller 1
-
-config S5P_DEV_FIMC2
-       bool
-       help
-         Compile in platform device definitions for FIMC controller 2
-
-config S5P_DEV_FIMC3
-       bool
-       help
-         Compile in platform device definitions for FIMC controller 3
-
-config S5P_DEV_JPEG
-       bool
-       help
-         Compile in platform device definitions for JPEG codec
-
-config S5P_DEV_G2D
-       bool
-       help
-         Compile in platform device definitions for G2D device
-
-config S5P_DEV_FIMD0
-       bool
-       help
-         Compile in platform device definitions for FIMD controller 0
-
-config S5P_DEV_I2C_HDMIPHY
-       bool
-       help
-         Compile in platform device definitions for I2C HDMIPHY controller
-
-config S5P_DEV_MFC
-       bool
-       help
-         Compile in platform device definitions for MFC
-
-config S5P_DEV_ONENAND
-       bool
-       help
-         Compile in platform device definition for OneNAND controller
-
-config S5P_DEV_CSIS0
-       bool
-       help
-         Compile in platform device definitions for MIPI-CSIS channel 0
-
-config S5P_DEV_CSIS1
-       bool
-       help
-         Compile in platform device definitions for MIPI-CSIS channel 1
-
-config S5P_DEV_TV
-       bool
-       help
-         Compile in platform device definition for TV interface
-
-config S5P_DEV_USB_EHCI
-       bool
-       help
-         Compile in platform device definition for USB EHCI
-
-config S5P_SETUP_MIPIPHY
-       bool
-       help
-         Compile in common setup code for MIPI-CSIS and MIPI-DSIM devices
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
deleted file mode 100644 (file)
index 4953d50..0000000
+++ /dev/null
@@ -1,27 +0,0 @@
-# arch/arm/plat-s5p/Makefile
-#
-# Copyright (c) 2009 Samsung Electronics Co., Ltd.
-#              http://www.samsung.com/
-#
-# Licensed under GPLv2
-
-obj-y                          :=
-obj-m                          :=
-obj-n                          := dummy.o
-obj-                           :=
-
-# Core files
-
-obj-y                          += clock.o
-obj-y                          += irq.o
-obj-$(CONFIG_S5P_EXT_INT)      += irq-eint.o
-obj-$(CONFIG_S5P_GPIO_INT)     += irq-gpioint.o
-obj-$(CONFIG_S5P_PM)           += pm.o irq-pm.o
-obj-$(CONFIG_S5P_SLEEP)                += sleep.o
-obj-$(CONFIG_S5P_HRT)          += s5p-time.o
-
-# devices
-
-obj-$(CONFIG_S5P_DEV_UART)     += dev-uart.o
-obj-$(CONFIG_S5P_DEV_MFC)      += dev-mfc.o
-obj-$(CONFIG_S5P_SETUP_MIPIPHY)        += setup-mipiphy.o
index a0ffc77..f8c5710 100644 (file)
@@ -13,6 +13,24 @@ config PLAT_SAMSUNG
        help
          Base platform code for all Samsung SoC based systems
 
+config PLAT_S5P
+       bool
+       depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
+       default y
+       select ARM_VIC if !ARCH_EXYNOS
+       select ARM_GIC if ARCH_EXYNOS
+       select GIC_NON_BANKED if ARCH_EXYNOS4
+       select NO_IOPORT
+       select ARCH_REQUIRE_GPIOLIB
+       select S3C_GPIO_TRACK
+       select S5P_GPIO_DRVSTR
+       select SAMSUNG_GPIOLIB_4BIT
+       select PLAT_SAMSUNG
+       select SAMSUNG_CLKSRC
+       select SAMSUNG_IRQ_VIC_TIMER
+       help
+         Base platform code for Samsung's S5P series SoC.
+
 if PLAT_SAMSUNG
 
 # boot configurations
@@ -50,6 +68,14 @@ config S3C_LOWLEVEL_UART_PORT
          this configuration should be between zero and two. The port
          must have been initialised by the boot-loader before use.
 
+# timer options
+
+config S5P_HRT
+       bool
+       select SAMSUNG_DEV_PWM
+       help
+         Use the High Resolution timer support
+
 # clock options
 
 config SAMSUNG_CLKSRC
@@ -58,6 +84,11 @@ config SAMSUNG_CLKSRC
          Select the clock code for the clksrc implementation
          used by newer systems such as the S3C64XX.
 
+config S5P_CLOCK
+       def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
+       help
+         Support common clock part for ARCH_S5P and ARCH_EXYNOS SoCs
+
 # options for IRQ support
 
 config SAMSUNG_IRQ_VIC_TIMER
@@ -65,6 +96,22 @@ config SAMSUNG_IRQ_VIC_TIMER
        help
          Internal configuration to build the VIC timer interrupt code.
 
+config S5P_IRQ
+       def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
+       help
+         Support common interrup part for ARCH_S5P and ARCH_EXYNOS SoCs
+
+config S5P_EXT_INT
+       bool
+       help
+         Use the external interrupts (other than GPIO interrupts.)
+         Note: Do not choose this for S5P6440 and S5P6450.
+
+config S5P_GPIO_INT
+       bool
+       help
+         Common code for the GPIO interrupts (other than external interrupts.)
+
 # options for gpio configuration support
 
 config SAMSUNG_GPIOLIB_4BIT
@@ -117,6 +164,12 @@ config S3C_GPIO_TRACK
          Internal configuration option to enable the s3c specific gpio
          chip tracking if the platform requires it.
 
+# uart options
+
+config S5P_DEV_UART
+       def_bool y
+       depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
+
 # ADC driver
 
 config S3C_ADC
@@ -274,6 +327,76 @@ config SAMSUNG_DEV_BACKLIGHT
        help
          Compile in platform device definition LCD backlight with PWM Timer
 
+config S5P_DEV_CSIS0
+       bool
+       help
+         Compile in platform device definitions for MIPI-CSIS channel 0
+
+config S5P_DEV_CSIS1
+       bool
+       help
+         Compile in platform device definitions for MIPI-CSIS channel 1
+
+config S5P_DEV_FIMC0
+       bool
+       help
+         Compile in platform device definitions for FIMC controller 0
+
+config S5P_DEV_FIMC1
+       bool
+       help
+         Compile in platform device definitions for FIMC controller 1
+
+config S5P_DEV_FIMC2
+       bool
+       help
+         Compile in platform device definitions for FIMC controller 2
+
+config S5P_DEV_FIMC3
+       bool
+       help
+         Compile in platform device definitions for FIMC controller 3
+
+config S5P_DEV_FIMD0
+       bool
+       help
+         Compile in platform device definitions for FIMD controller 0
+
+config S5P_DEV_G2D
+       bool
+       help
+         Compile in platform device definitions for G2D device
+
+config S5P_DEV_I2C_HDMIPHY
+       bool
+       help
+         Compile in platform device definitions for I2C HDMIPHY controller
+
+config S5P_DEV_JPEG
+       bool
+       help
+         Compile in platform device definitions for JPEG codec
+
+config S5P_DEV_MFC
+       bool
+       help
+         Compile in setup memory (init) code for MFC
+
+config S5P_DEV_ONENAND
+       bool
+       help
+         Compile in platform device definition for OneNAND controller
+
+config S5P_DEV_TV
+       bool
+       help
+         Compile in platform device definition for TV interface
+
+config S5P_DEV_USB_EHCI
+       bool
+       help
+         Compile in platform device definition for USB EHCI
+
 config S3C24XX_PWM
        bool "PWM device support"
        select HAVE_PWM
@@ -281,6 +404,11 @@ config S3C24XX_PWM
          Support for exporting the PWM timer blocks via the pwm device
          system
 
+config S5P_SETUP_MIPIPHY
+       bool
+       help
+         Compile in common setup code for MIPI-CSIS and MIPI-DSIM devices
+
 # DMA
 
 config S3C_DMA
@@ -351,6 +479,18 @@ config SAMSUNG_WAKEMASK
          and above. This code allows a set of interrupt to wakeup-mask
          mappings. See <plat/wakeup-mask.h>
 
+config S5P_PM
+       bool
+       help
+         Common code for power management support on S5P and newer SoCs
+         Note: Do not select this for S5P6440 and S5P6450.
+
+config S5P_SLEEP
+       bool
+       help
+         Internal config node to apply common S5P sleep management code.
+         Can be selected by S5P and newer SoCs with similar sleep procedure.
+
 comment "Power Domain"
 
 config SAMSUNG_PD
index 6012366..860b2db 100644 (file)
@@ -13,12 +13,18 @@ obj-                                :=
 
 obj-y                          += init.o cpu.o
 obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET)   += time.o
+obj-$(CONFIG_S5P_HRT)          += s5p-time.o
+
 obj-y                          += clock.o
 obj-y                          += pwm-clock.o
 
 obj-$(CONFIG_SAMSUNG_CLKSRC)   += clock-clksrc.o
+obj-$(CONFIG_S5P_CLOCK)                += s5p-clock.o
 
 obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o
+obj-$(CONFIG_S5P_IRQ)          += s5p-irq.o
+obj-$(CONFIG_S5P_EXT_INT)      += s5p-irq-eint.o
+obj-$(CONFIG_S5P_GPIO_INT)     += s5p-irq-gpioint.o
 
 # ADC
 
@@ -30,9 +36,13 @@ obj-y                                += platformdata.o
 
 obj-y                          += devs.o
 obj-y                          += dev-uart.o
+obj-$(CONFIG_S5P_DEV_MFC)      += s5p-dev-mfc.o
+obj-$(CONFIG_S5P_DEV_UART)     += s5p-dev-uart.o
 
 obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT)    += dev-backlight.o
 
+obj-$(CONFIG_S5P_SETUP_MIPIPHY)        += setup-mipiphy.o
+
 # DMA support
 
 obj-$(CONFIG_S3C_DMA)          += dma.o s3c-dma-ops.o
@@ -47,6 +57,9 @@ obj-$(CONFIG_SAMSUNG_PM_CHECK)        += pm-check.o
 
 obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o
 
+obj-$(CONFIG_S5P_PM)           += s5p-pm.o s5p-irq-pm.o
+obj-$(CONFIG_S5P_SLEEP)                += s5p-sleep.o
+
 # PD support
 
 obj-$(CONFIG_SAMSUNG_PD)       += pd.o
similarity index 99%
rename from arch/arm/plat-s5p/clock.c
rename to arch/arm/plat-samsung/s5p-clock.c
index f68a9bb..41d3dfd 100644 (file)
@@ -1,5 +1,4 @@
-/* linux/arch/arm/plat-s5p/clock.c
- *
+/*
  * Copyright 2009 Samsung Electronics Co., Ltd.
  *             http://www.samsung.com/
  *
similarity index 97%
rename from arch/arm/plat-s5p/dev-mfc.c
rename to arch/arm/plat-samsung/s5p-dev-mfc.c
index a30d36b..ad60894 100644 (file)
@@ -1,5 +1,4 @@
-/* linux/arch/arm/plat-s5p/dev-mfc.c
- *
+/*
  * Copyright (C) 2010-2011 Samsung Electronics Co.Ltd
  *
  * Base S5P MFC resource and device definitions
@@ -9,7 +8,6 @@
  * published by the Free Software Foundation.
  */
 
-
 #include <linux/kernel.h>
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
similarity index 57%
rename from arch/arm/plat-s5p/dev-uart.c
rename to arch/arm/plat-samsung/s5p-dev-uart.c
index c9308db..cafa3de 100644 (file)
@@ -1,6 +1,5 @@
-/* linux/arch/arm/plat-s5p/dev-uart.c
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
+/*
+ * Copyright (c) 2009,2012 Samsung Electronics Co., Ltd.
  *             http://www.samsung.com/
  *
  * Base S5P UART resource and device definitions
@@ -14,6 +13,7 @@
 #include <linux/types.h>
 #include <linux/interrupt.h>
 #include <linux/list.h>
+#include <linux/ioport.h>
 #include <linux/platform_device.h>
 
 #include <asm/mach/arch.h>
  /* Serial port registrations */
 
 static struct resource s5p_uart0_resource[] = {
-       [0] = {
-               .start  = S5P_PA_UART0,
-               .end    = S5P_PA_UART0 + S5P_SZ_UART - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       [1] = {
-               .start  = IRQ_UART0,
-               .end    = IRQ_UART0,
-               .flags  = IORESOURCE_IRQ,
-       },
+       [0] = DEFINE_RES_MEM(S5P_PA_UART0, S5P_SZ_UART),
+       [1] = DEFINE_RES_IRQ(IRQ_UART0),
 };
 
 static struct resource s5p_uart1_resource[] = {
-       [0] = {
-               .start  = S5P_PA_UART1,
-               .end    = S5P_PA_UART1 + S5P_SZ_UART - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       [1] = {
-               .start  = IRQ_UART1,
-               .end    = IRQ_UART1,
-               .flags  = IORESOURCE_IRQ,
-       },
+       [0] = DEFINE_RES_MEM(S5P_PA_UART1, S5P_SZ_UART),
+       [1] = DEFINE_RES_IRQ(IRQ_UART1),
 };
 
 static struct resource s5p_uart2_resource[] = {
-       [0] = {
-               .start  = S5P_PA_UART2,
-               .end    = S5P_PA_UART2 + S5P_SZ_UART - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       [1] = {
-               .start  = IRQ_UART2,
-               .end    = IRQ_UART2,
-               .flags  = IORESOURCE_IRQ,
-       },
+       [0] = DEFINE_RES_MEM(S5P_PA_UART2, S5P_SZ_UART),
+       [1] = DEFINE_RES_IRQ(IRQ_UART2),
 };
 
 static struct resource s5p_uart3_resource[] = {
 #if CONFIG_SERIAL_SAMSUNG_UARTS > 3
-       [0] = {
-               .start  = S5P_PA_UART3,
-               .end    = S5P_PA_UART3 + S5P_SZ_UART - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       [1] = {
-               .start  = IRQ_UART3,
-               .end    = IRQ_UART3,
-               .flags  = IORESOURCE_IRQ,
-       },
+       [0] = DEFINE_RES_MEM(S5P_PA_UART3, S5P_SZ_UART),
+       [1] = DEFINE_RES_IRQ(IRQ_UART3),
 #endif
 };
 
 static struct resource s5p_uart4_resource[] = {
 #if CONFIG_SERIAL_SAMSUNG_UARTS > 4
-       [0] = {
-               .start  = S5P_PA_UART4,
-               .end    = S5P_PA_UART4 + S5P_SZ_UART - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       [1] = {
-               .start  = IRQ_UART4,
-               .end    = IRQ_UART4,
-               .flags  = IORESOURCE_IRQ,
-       },
+       [0] = DEFINE_RES_MEM(S5P_PA_UART4, S5P_SZ_UART),
+       [1] = DEFINE_RES_IRQ(IRQ_UART4),
 #endif
 };
 
 static struct resource s5p_uart5_resource[] = {
 #if CONFIG_SERIAL_SAMSUNG_UARTS > 5
-       [0] = {
-               .start  = S5P_PA_UART5,
-               .end    = S5P_PA_UART5 + S5P_SZ_UART - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       [1] = {
-               .start  = IRQ_UART5,
-               .end    = IRQ_UART5,
-               .flags  = IORESOURCE_IRQ,
-       },
+       [0] = DEFINE_RES_MEM(S5P_PA_UART5, S5P_SZ_UART),
+       [1] = DEFINE_RES_IRQ(IRQ_UART5),
 #endif
 };
 
similarity index 99%
rename from arch/arm/plat-s5p/irq-eint.c
rename to arch/arm/plat-samsung/s5p-irq-eint.c
index 139c050..33bd3f3 100644 (file)
@@ -1,5 +1,4 @@
-/* linux/arch/arm/plat-s5p/irq-eint.c
- *
+/*
  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  *             http://www.samsung.com
  *
similarity index 99%
rename from arch/arm/plat-s5p/irq-gpioint.c
rename to arch/arm/plat-samsung/s5p-irq-gpioint.c
index 82c7311..f9431fe 100644 (file)
@@ -1,5 +1,4 @@
-/* linux/arch/arm/plat-s5p/irq-gpioint.c
- *
+/*
  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  * Author: Kyungmin Park <kyungmin.park@samsung.com>
  * Author: Joonyoung Shim <jy0922.shim@samsung.com>
similarity index 98%
rename from arch/arm/plat-s5p/irq-pm.c
rename to arch/arm/plat-samsung/s5p-irq-pm.c
index d1bfeca..7c1e3b7 100644 (file)
@@ -1,5 +1,4 @@
-/* linux/arch/arm/plat-s5p/irq-pm.c
- *
+/*
  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  *             http://www.samsung.com
  *
similarity index 96%
rename from arch/arm/plat-s5p/irq.c
rename to arch/arm/plat-samsung/s5p-irq.c
index afdaa10..dfb47d6 100644 (file)
@@ -1,5 +1,4 @@
-/* arch/arm/plat-s5p/irq.c
- *
+/*
  * Copyright (c) 2009 Samsung Electronics Co., Ltd.
  *             http://www.samsung.com/
  *
similarity index 95%
rename from arch/arm/plat-s5p/pm.c
rename to arch/arm/plat-samsung/s5p-pm.c
index d15dc47..0747468 100644 (file)
@@ -1,5 +1,4 @@
-/* linux/arch/arm/plat-s5p/pm.c
- *
+/*
  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  *             http://www.samsung.com
  *
similarity index 98%
rename from arch/arm/plat-s5p/sleep.S
rename to arch/arm/plat-samsung/s5p-sleep.S
index 006bd01..bdf6dad 100644 (file)
@@ -1,5 +1,4 @@
-/* linux/arch/arm/plat-s5p/sleep.S
- *
+/*
  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  *             http://www.samsung.com
  *
similarity index 99%
rename from arch/arm/plat-s5p/s5p-time.c
rename to arch/arm/plat-samsung/s5p-time.c
index 17c0a2c..028b6e8 100644 (file)
@@ -1,5 +1,4 @@
-/* linux/arch/arm/plat-s5p/s5p-time.c
- *
+/*
  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  *             http://www.samsung.com/
  *
index b42252c..1b173a6 100644 (file)
@@ -51,7 +51,7 @@ config TI_DAVINCI_CPDMA
 
 config TI_CPSW
        tristate "TI CPSW Switch Support"
-       depends on ARM && (ARCH_DAVINCI || SOC_OMAPAM33XX)
+       depends on ARM && (ARCH_DAVINCI || SOC_AM33XX)
        select TI_DAVINCI_CPDMA
        select TI_DAVINCI_MDIO
        ---help---