ARM: tegra: t14x: Clear DPD_SAMPLE on LP0 exit
aghuge [Mon, 21 Jan 2013 10:41:36 +0000 (15:41 +0530)]
Power management code needs to clear
PMC_DPD_SAMPLE during LP0 exit after pinmux
restoration

Bug 1193188

Change-Id: I40247bace4811fa0db69dfba7e952b32ad22a8fc
Signed-off-by: aghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/192782
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>

arch/arm/mach-tegra/pinmux-t11-tables.c
arch/arm/mach-tegra/pinmux-t14-tables.c
arch/arm/mach-tegra/pm.c

index 736d692..74f270a 100644 (file)
@@ -39,6 +39,7 @@
 #define TRISTATE       (1<<4)
 #define PINGROUP_REG_A 0x868
 #define MUXCTL_REG_A   0x3000
+#define PMC_DPD_SAMPLE          0x20
 #define PMC_IO_DPD_REQ          0x1B8
 #define PMC_IO_DPD2_REQ         0x1C0
 
@@ -423,6 +424,9 @@ static void tegra11x_pinmux_resume(void)
        for (i = 0; i < ARRAY_SIZE(tegra_soc_drive_pingroups); i++)
                pg_writel(*ctx++, tegra_soc_drive_pingroups[i].reg_bank,
                        tegra_soc_drive_pingroups[i].reg);
+
+       /* Clear DPD sample */
+       writel(0x0, pmc_base + PMC_DPD_SAMPLE);
 }
 
 static struct syscore_ops tegra_pinmux_syscore_ops = {
index 69d607d..db96d29 100644 (file)
@@ -38,6 +38,7 @@
 static void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
 
 #define TRISTATE               (1<<4)
+#define PMC_DPD_SAMPLE         0x20
 #define PMC_IO_DPD_REQ_0       0x1B8
 #define PMC_IO_DPD2_REQ_0      0x1C0
 
@@ -200,7 +201,7 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE
        PINGROUP(SDMMC3_DAT1,     PB4,          SDMMC3,     SDMMC3,     TRACE,      RSVD2,      RSVD3,       RSVD,      INPUT,  0x339c),\
        PINGROUP(SDMMC3_DAT2,     PB3,          SDMMC3,     SDMMC3,     TRACE,      RSVD2,      RSVD3,       RSVD,      INPUT,  0x33a0),\
        PINGROUP(SDMMC3_DAT3,     PB2,          SDMMC3,     SDMMC3,     TRACE,      RSVD2,      RSVD3,       RSVD,      INPUT,  0x33a4),\
-       PINGROUP(RESET_OUT_N,     INVALID,      SYS,        RESET_OUT_N,RSVD1,      RSVD2,      RSVD3,       RSVD,      OUTPUT, 0x3408),\
+       PINGROUP(RESET_OUT_N,     INVALID,      SYS,        RESET_OUT_N, RSVD1,     RSVD2,      RSVD3,       RSVD,      OUTPUT, 0x3408),\
        PINGROUP(ALS_PROX_INT_L,  PN0,          UART,       RSVD0,      RSVD1,      RSVD2,      RSVD3,       RSVD,      INPUT,  0x340c),\
        PINGROUP(AP_GPS_EN,       PH7,          AUDIO,      RSVD0,      RSVD1,      RSVD2,      RSVD3,       RSVD,      INPUT,  0x3410),\
        PINGROUP(AP_GPS_RST,      PI0,          AUDIO,      RSVD0,      RSVD1,      RSVD2,      RSVD3,       RSVD,      INPUT,  0x3414),\
@@ -336,6 +337,10 @@ static void tegra14x_pinmux_resume(void)
        for (i = 0; i < ARRAY_SIZE(tegra_soc_drive_pingroups); i++)
                pg_writel(*ctx++, tegra_soc_drive_pingroups[i].reg_bank,
                        tegra_soc_drive_pingroups[i].reg);
+
+       /* Clear DPD sample */
+       writel(0x0, pmc + PMC_DPD_SAMPLE);
+
 }
 
 static struct syscore_ops tegra14x_pinmux_syscore_ops = {
index c40fdc1..3986cdd 100644 (file)
@@ -763,9 +763,6 @@ static void tegra_common_resume(void)
        void __iomem *emc = IO_ADDRESS(TEGRA_EMC_BASE);
 #endif
 
-       /* Clear DPD sample */
-       writel(0x0, pmc + PMC_DPD_SAMPLE);
-
 #ifdef CONFIG_ARCH_TEGRA_14x_SOC
        /* Clear DPD Enable */
        writel(0x0, pmc + PMC_DPD_ENABLE);