usb: xhci: tegra: enable SS wake intr for active ports
Ajay Gupta [Fri, 17 May 2013 21:29:06 +0000 (14:29 -0700)]
Enabling SS wake interrupt only for active ports as passed
by board file.

Bug 1268244

Change-Id: Iee368f51c875594085798c055d37633b3d6f02a8
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/229993
(cherry picked from commit 9b0292923e23f6ade3f515fa180f08ef4f14654c)
Reviewed-on: http://git-master/r/235059
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

drivers/usb/host/xhci-tegra.c

index 93f3602..70c8767 100644 (file)
@@ -803,22 +803,26 @@ tegra_xhci_ss_wake_on_interrupts(struct tegra_xhci_hcd *tegra, bool enable)
 {
        u32 elpg_program0;
 
+       /* clear any event */
        elpg_program0 = readl(tegra->padctl_base + ELPG_PROGRAM_0);
        elpg_program0 |= (SS_PORT0_WAKEUP_EVENT | SS_PORT1_WAKEUP_EVENT);
-
        writel(elpg_program0, tegra->padctl_base + ELPG_PROGRAM_0);
 
-       /* Enable ss wake interrupts */
+       /* enable ss wake interrupts */
        elpg_program0 = readl(tegra->padctl_base + ELPG_PROGRAM_0);
 
        if (enable) {
                /* enable interrupts */
-               elpg_program0 |= (SS_PORT0_WAKE_INTERRUPT_ENABLE |
-                               SS_PORT1_WAKE_INTERRUPT_ENABLE);
+               if (tegra->bdata->portmap & TEGRA_XUSB_SS_P0)
+                       elpg_program0 |= SS_PORT0_WAKE_INTERRUPT_ENABLE;
+               if (tegra->bdata->portmap & TEGRA_XUSB_SS_P1)
+                       elpg_program0 |= SS_PORT1_WAKE_INTERRUPT_ENABLE;
        } else {
                /* disable interrupts */
-               elpg_program0 &= ~(SS_PORT0_WAKE_INTERRUPT_ENABLE |
-                               SS_PORT1_WAKE_INTERRUPT_ENABLE);
+               if (tegra->bdata->portmap & TEGRA_XUSB_SS_P0)
+                       elpg_program0 &= ~SS_PORT0_WAKE_INTERRUPT_ENABLE;
+               if (tegra->bdata->portmap & TEGRA_XUSB_SS_P1)
+                       elpg_program0 &= ~SS_PORT1_WAKE_INTERRUPT_ENABLE;
        }
        writel(elpg_program0, tegra->padctl_base + ELPG_PROGRAM_0);
 }