arm: tegra: t11x: Changes for LP1
Seshendra Gadagottu [Thu, 18 Oct 2012 23:03:23 +0000 (16:03 -0700)]
Bug 1053092

Change-Id: I6823c96677cf8d20878ea886bea51658132de2b3
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/141367
(cherry picked from commit 3355e38667dab60b801f5704ce77a28506798786)
Reviewed-on: http://git-master/r/159363
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>

Rebase-Id: R8a6fd51cdf86de9d40a01c3fd0dd44c3099c1764

arch/arm/mach-tegra/sleep-t30.S

index 89fea67..cbbfc08 100644 (file)
@@ -370,9 +370,10 @@ ENTRY(tegra3_lp1_reset)
 
        ldr     r4, [r5, #0x1C]
        str     r4, [r0, #CLK_RESET_SCLK_BURST]
-
+#if defined(CONFIG_ARCH_TEGRA_3x_SOC)
        mov32   r4, ((1<<28) | (8))     @ burst policy is PLLX
        str     r4, [r0, #CLK_RESET_CCLK_BURST]
+#endif
 
 #ifdef CONFIG_TEGRA_LP1_950
 lp1_voltset:
@@ -486,8 +487,10 @@ emc_wait_audo_cal_onetime:
        mov     r1, #0
        str     r1, [r0, #EMC_SELF_REF] @ take DRAM out of self refresh
        mov     r1, #1
+#if defined(CONFIG_ARCH_TEGRA_3x_SOC)
        str     r1, [r0, #EMC_NOP]
        str     r1, [r0, #EMC_NOP]
+#endif
        str     r1, [r0, #EMC_REFRESH]
 
        emc_device_mask r1, r0