clocksource: arch_timer: Push the read/write wrappers deeper

We're going to introduce support to read and write the memory
mapped timer registers in the next patch, so push the cp15
read/write functions one level deeper. This simplifies the next
patch and makes it clearer what's going on.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <Marc.Zyngier@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Change-Id: If200d01d319d0eb7f45e5a7f3fac2e39529ca873
Reviewed-on: http://git-master/r/351126
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>

diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
index aeb93f38e9c99bb0b54d0439dcf7ece4360c0557..556094689724091d76b3f3f9202dd9e2233c1c91 100644 (file)
--- a/arch/arm/include/asm/arch_timer.h
+++ b/arch/arm/include/asm/arch_timer.h
@@ -18,7 +18,7 @@ int arch_timer_arch_init(void);
  * the code. At least it does so with a recent GCC (4.6.3).
  */
 static __always_inline
-void arch_timer_reg_write(int access, enum arch_timer_reg reg, u32 val)
+void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
 {
        if (access == ARCH_TIMER_PHYS_ACCESS) {
                switch (reg) {
@@ -44,7 +44,7 @@ void arch_timer_reg_write(int access, enum arch_timer_reg reg, u32 val)
 }
 
 static __always_inline
-u32 arch_timer_reg_read(int access, enum arch_timer_reg reg)
+u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
 {
        u32 val = 0;
 

diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
index d6e89b4e9b0a7f2b1b2a27100a49e99b46202d37..c9f1d2816c2bb9086be3b2e001c5d81921a076bf 100644 (file)
--- a/arch/arm64/include/asm/arch_timer.h
+++ b/arch/arm64/include/asm/arch_timer.h
@@ -32,7 +32,7 @@
  * the code.
  */
 static __always_inline
-void arch_timer_reg_write(int access, enum arch_timer_reg reg, u32 val)
+void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
 {
        if (access == ARCH_TIMER_PHYS_ACCESS) {
                switch (reg) {
@@ -58,7 +58,7 @@ void arch_timer_reg_write(int access, enum arch_timer_reg reg, u32 val)
 }
 
 static __always_inline
-u32 arch_timer_reg_read(int access, enum arch_timer_reg reg)
+u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
 {
        u32 val;
 

diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index e3690b54a30b2e189258ebe8d3242ba17a5dbb53..277e348aef93ddd650091eedf07afa6bdd0fc8be 100644 (file)
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -45,14 +45,28 @@ static bool arch_timer_use_virtual = true;
  * Architected system timer support.
  */
 
+static __always_inline
+void arch_timer_reg_write(int access, enum arch_timer_reg reg, u32 val,
+               struct clock_event_device *clk)
+{
+       arch_timer_reg_write_cp15(access, reg, val);
+}
+
+static __always_inline
+u32 arch_timer_reg_read(int access, enum arch_timer_reg reg,
+               struct clock_event_device *clk)
+{
+       return arch_timer_reg_read_cp15(access, reg);
+}
+
 static __always_inline irqreturn_t timer_handler(const int access,
                                        struct clock_event_device *evt)
 {
        unsigned long ctrl;
-       ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL);
+       ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, evt);
        if (ctrl & ARCH_TIMER_CTRL_IT_STAT) {
                ctrl |= ARCH_TIMER_CTRL_IT_MASK;
-               arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl);
+               arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, evt);
                evt->event_handler(evt);
                return IRQ_HANDLED;
        }
@@ -74,15 +88,16 @@ static irqreturn_t arch_timer_handler_phys(int irq, void *dev_id)
        return timer_handler(ARCH_TIMER_PHYS_ACCESS, evt);
 }
 
-static __always_inline void timer_set_mode(const int access, int mode)
+static __always_inline void timer_set_mode(const int access, int mode,
+                                 struct clock_event_device *clk)
 {
        unsigned long ctrl;
        switch (mode) {
        case CLOCK_EVT_MODE_UNUSED:
        case CLOCK_EVT_MODE_SHUTDOWN:
-               ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL);
+               ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk);
                ctrl &= ~ARCH_TIMER_CTRL_ENABLE;
-               arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl);
+               arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk);
                break;
        default:
                break;
@@ -92,36 +107,37 @@ static __always_inline void timer_set_mode(const int access, int mode)
 static void arch_timer_set_mode_virt(enum clock_event_mode mode,
                                     struct clock_event_device *clk)
 {
-       timer_set_mode(ARCH_TIMER_VIRT_ACCESS, mode);
+       timer_set_mode(ARCH_TIMER_VIRT_ACCESS, mode, clk);
 }
 
 static void arch_timer_set_mode_phys(enum clock_event_mode mode,
                                     struct clock_event_device *clk)
 {
-       timer_set_mode(ARCH_TIMER_PHYS_ACCESS, mode);
+       timer_set_mode(ARCH_TIMER_PHYS_ACCESS, mode, clk);
 }
 
-static __always_inline void set_next_event(const int access, unsigned long evt)
+static __always_inline void set_next_event(const int access, unsigned long evt,
+                                 struct clock_event_device *clk)
 {
        unsigned long ctrl;
-       ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL);
+       ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk);
        ctrl |= ARCH_TIMER_CTRL_ENABLE;
        ctrl &= ~ARCH_TIMER_CTRL_IT_MASK;
-       arch_timer_reg_write(access, ARCH_TIMER_REG_TVAL, evt);
-       arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl);
+       arch_timer_reg_write(access, ARCH_TIMER_REG_TVAL, evt, clk);
+       arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk);
 }
 
 static int arch_timer_set_next_event_virt(unsigned long evt,
-                                         struct clock_event_device *unused)
+                                         struct clock_event_device *clk)
 {
-       set_next_event(ARCH_TIMER_VIRT_ACCESS, evt);
+       set_next_event(ARCH_TIMER_VIRT_ACCESS, evt, clk);
        return 0;
 }
 
 static int arch_timer_set_next_event_phys(unsigned long evt,
-                                         struct clock_event_device *unused)
+                                         struct clock_event_device *clk)
 {
-       set_next_event(ARCH_TIMER_PHYS_ACCESS, evt);
+       set_next_event(ARCH_TIMER_PHYS_ACCESS, evt, clk);
        return 0;
 }