ARM: tegra: modify gk20a DT entry
Ken Adams [Sat, 29 Jun 2013 19:06:33 +0000 (15:06 -0400)]
add the sim memory aperture start and size
correct the smmu client id

bug 1316106

Change-Id: Ic98ded4dfe9f4d4bab1f744c73d0f14a6c128b63
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Signed-off-by: Ken Adams <kadams@nvidia.com>
Reviewed-on: http://git-master/r/243469
Reviewed-by: Chao Xu <cxu@nvidia.com>

arch/arm/boot/dts/tegra124.dtsi
arch/arm/mach-tegra/board-ardbeg.c
arch/arm/mach-tegra/board-bonaire.c
drivers/video/tegra/host/gk20a/gk20a.c

index 86fe9b5..2ad8762 100644 (file)
@@ -41,9 +41,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
 
-               ranges = <0x54000000 0x54000000 0x01000000
-                         0x57000000 0x57000000 0x01000000
-                         0x58000000 0x58000000 0x01000000>;
+               ranges = <0x53000000 0x53000000 0x06000000>;
 
                vi {
                        compatible = "nvidia,tegra124-vi";
 
                gk20a {
                        compatible = "nvidia,tegra124-gk20a";
-                       interrupts = <0 209 0x04   /* mpcore syncpt */
-                                     0 210 0x04>; /* mpcore general */
-                       reg = <0x57000000 0x01000000>,
+                       reg = <0x538F0000 0x00001000>,
+                             <0x57000000 0x01000000>,
                              <0x58000000 0x01000000>;
-                       nvidia,memory-clients = <34 35>;
+                       interrupts = <0 209 0x04
+                                     0 210 0x04>;
+                       nvidia,memory-clients = <56 57>;
                };
        };
 
index d50f55c..4398443 100644 (file)
@@ -847,8 +847,7 @@ struct of_dev_auxdata ardbeg_auxdata_lookup[] __initdata = {
                                NULL),
        OF_DEV_AUXDATA("nvidia,tegra124-host1x", TEGRA_HOST1X_BASE, "host1x",
                NULL),
-       OF_DEV_AUXDATA("nvidia,tegra124-gk20a", TEGRA_GK20A_BAR0_BASE, "gk20a",
-               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-gk20a", 0x538F0000, "gk20a", NULL),
        OF_DEV_AUXDATA("nvidia,tegra124-vic", TEGRA_VIC_BASE, "vic03", NULL),
        OF_DEV_AUXDATA("nvidia,tegra124-msenc", TEGRA_MSENC_BASE, "msenc",
                NULL),
index cfcaf87..1b19ec8 100644 (file)
@@ -620,8 +620,7 @@ static void __init tegra_bonaire_init(void)
 struct of_dev_auxdata tegra_bonaire_auxdata_lookup[] __initdata = {
        OF_DEV_AUXDATA("nvidia,tegra124-host1x", TEGRA_HOST1X_BASE, "host1x",
                NULL),
-       OF_DEV_AUXDATA("nvidia,tegra124-gk20a", TEGRA_GK20A_BAR0_BASE, "gk20a",
-               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-gk20a", 0x538F0000, "gk20a", NULL),
        OF_DEV_AUXDATA("nvidia,tegra124-vic", TEGRA_VIC_BASE, "vic03", NULL),
        OF_DEV_AUXDATA("nvidia,tegra124-msenc", TEGRA_MSENC_BASE, "msenc",
                NULL),
index 9216274..7f10a63 100644 (file)
@@ -66,20 +66,20 @@ static struct resource gk20a_intr = {
 };
 
 struct resource gk20a_resources[] = {
-#define GK20A_BAR0_IORESOURCE_MEM 0
+#define GK20A_BAR0_IORESOURCE_MEM 1
 {
        .start = TEGRA_GK20A_BAR0_BASE,
        .end   = TEGRA_GK20A_BAR0_BASE + TEGRA_GK20A_BAR0_SIZE - 1,
        .flags = IORESOURCE_MEM,
 },
-#define GK20A_BAR1_IORESOURCE_MEM 1
+#define GK20A_BAR1_IORESOURCE_MEM 2
 {
        .start = TEGRA_GK20A_BAR1_BASE,
        .end   = TEGRA_GK20A_BAR1_BASE + TEGRA_GK20A_BAR1_SIZE - 1,
        .flags = IORESOURCE_MEM,
 },
 #if CONFIG_GK20A_SIM
-#define GK20A_SIM_IORESOURCE_MEM 2
+#define GK20A_SIM_IORESOURCE_MEM 0
 {
 #define TEGRA_GK20A_SIM_BASE 0x538F0000 /*tbd: get from iomap.h should get this or replacement */
 #define TEGRA_GK20A_SIM_SIZE 0x1000     /*tbd: this is a high-side guess */