arm: tegra: add function to enter LP0 from cpuidle
Prashant Gaikwad [Tue, 22 Oct 2013 06:29:08 +0000 (11:29 +0530)]
Bug 1254633

Change-Id: I8c69d238877615a594bed6542462873f897e0ad4
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/309496
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

arch/arm/mach-tegra/pm.c
arch/arm/mach-tegra/pm.h

index eaf0cbb..2197840 100644 (file)
@@ -69,6 +69,8 @@
 #include <asm/rodata.h>
 
 #include <mach/irqs.h>
+#include <mach/tegra_smmu.h>
+#include <mach/pm_domains.h>
 
 #include "board.h"
 #include "clock.h"
@@ -1263,6 +1265,46 @@ static void tegra_suspend_powergate_control(int partid, bool turn_off)
                tegra_unpowergate_partition(partid);
 }
 
+#ifdef CONFIG_TEGRA_LP0_IN_IDLE
+int tegra_enter_lp0(unsigned long sleep_time)
+{
+       int err = 0;
+
+       /* This state is managed by power domains, hence no voice call expected if
+        * we are entering this state */
+
+       tegra_rtc_set_trigger(sleep_time);
+
+       tegra_actmon_save();
+
+       tegra_dma_save();
+
+       tegra_smmu_save();
+
+       err = syscore_save();
+       if (err) {
+               tegra_smmu_restore();
+               tegra_dma_restore();
+               tegra_rtc_set_trigger(0);
+               return err;
+       }
+
+       tegra_suspend_dram(TEGRA_SUSPEND_LP0, 0);
+
+       syscore_restore();
+
+       tegra_smmu_restore();
+
+       tegra_dma_restore();
+
+       tegra_actmon_restore();
+
+       tegra_rtc_set_trigger(0);
+
+       return 0;
+}
+#endif
+
 int tegra_suspend_dram(enum tegra_suspend_mode mode, unsigned int flags)
 {
        int err = 0;
index 6c652c9..6b86d50 100644 (file)
@@ -113,6 +113,12 @@ bool tegra_set_cpu_in_pd(int cpu);
 void tegra_mc_clk_prepare(void);
 void tegra_mc_clk_finish(void);
 int tegra_suspend_dram(enum tegra_suspend_mode mode, unsigned int flags);
+#ifdef CONFIG_TEGRA_LP0_IN_IDLE
+int tegra_enter_lp0(unsigned long sleep_time);
+#else
+static inline int tegra_enter_lp0(unsigned long sleep_time)
+{ return 0; }
+#endif
 #ifdef CONFIG_TEGRA_LP1_LOW_COREVOLTAGE
 int tegra_is_lp1_suspend_mode(void);
 #endif