arm: tegra: Change Tegra3 L2 cache prefetch to next line
Scott Williams [Thu, 26 May 2011 20:20:13 +0000 (13:20 -0700)]
Change L2 cache prefetch offset from 8th line to next line.

Original-Change-Id: Ie88008e2ab5a882235ae91d71d193e898ca67121
Reviewed-on: http://git-master/r/33195
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>

Rebase-Id: R3826be5d5531d275a624193f3063372552b05743

arch/arm/mach-tegra/common.c

index f0683f1..9562524 100644 (file)
@@ -132,7 +132,7 @@ void tegra_init_cache(u32 tag_latency, u32 data_latency)
 #endif 
 
        /* Enable PL310 double line fill feature. */
-       writel(((1<<30) | 7), p + L2X0_PREFETCH_CTRL);
+       writel(((1<<30) | 0), p + L2X0_PREFETCH_CTRL);
 #endif
 
        cache_type = readl(p + L2X0_CACHE_TYPE);