Merge branch 'next/cleanup' into late/kirkwood
Olof Johansson [Sat, 22 Sep 2012 20:13:38 +0000 (13:13 -0700)]
By Arnd Bergmann (21) and Wei Yongjun (1)
via Olof Johansson (2) and Haojian Zhuang (1)
* next/cleanup: (22 commits)
  ARM: mmp: using for_each_set_bit to simplify the code
  net: seeq: use __iomem pointers for MMIO
  video: da8xx-fb: use __iomem pointers for MMIO
  scsi: eesox: use __iomem pointers for MMIO
  serial: ks8695: use __iomem pointers for MMIO
  input: rpcmouse: use __iomem pointers for MMIO
  ARM: samsung: use __iomem pointers for MMIO
  ARM: spear13xx: use __iomem pointers for MMIO
  ARM: sa1100: use __iomem pointers for MMIO
  ARM: prima2: use __iomem pointers for MMIO
  ARM: nomadik: use __iomem pointers for MMIO
  ARM: msm: use __iomem pointers for MMIO
  ARM: lpc32xx: use __iomem pointers for MMIO
  ARM: ks8695: use __iomem pointers for MMIO
  ARM: ixp4xx: use __iomem pointers for MMIO
  ARM: iop32x: use __iomem pointers for MMIO
  ARM: iop13xx: use __iomem pointers for MMIO
  ARM: integrator: use __iomem pointers for MMIO
  ARM: imx: use __iomem pointers for MMIO
  ARM: ebsa110: use __iomem pointers for MMIO
  ...

468 files changed:
Documentation/devicetree/bindings/arm/bcm2835.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/mrvl/tauros2.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/msm/timer.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/omap/omap.txt
Documentation/devicetree/bindings/clock/imx23-clock.txt [new file with mode: 0644]
Documentation/devicetree/bindings/clock/imx28-clock.txt [new file with mode: 0644]
Documentation/devicetree/bindings/clock/imx6q-clock.txt [new file with mode: 0644]
Documentation/devicetree/bindings/gpio/gpio-samsung.txt
Documentation/devicetree/bindings/gpio/gpio-twl4030.txt
Documentation/devicetree/bindings/i2c/trivial-devices.txt
Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt [new file with mode: 0644]
Documentation/devicetree/bindings/lpddr2/lpddr2-timings.txt [new file with mode: 0644]
Documentation/devicetree/bindings/lpddr2/lpddr2.txt [new file with mode: 0644]
Documentation/devicetree/bindings/memory-controllers/ti/emif.txt [new file with mode: 0644]
Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt [new file with mode: 0644]
Documentation/devicetree/bindings/rtc/pxa-rtc.txt [new file with mode: 0644]
Documentation/devicetree/bindings/timer/brcm,bcm2835-system-timer.txt [new file with mode: 0644]
Documentation/devicetree/bindings/vendor-prefixes.txt
MAINTAINERS
arch/arm/Kconfig
arch/arm/Kconfig.debug
arch/arm/Makefile
arch/arm/boot/Makefile
arch/arm/boot/compressed/misc.c
arch/arm/boot/dts/Makefile [new file with mode: 0644]
arch/arm/boot/dts/am335x-bone.dts
arch/arm/boot/dts/am335x-evm.dts
arch/arm/boot/dts/am33xx.dtsi
arch/arm/boot/dts/bcm2835-rpi-b.dts [new file with mode: 0644]
arch/arm/boot/dts/bcm2835.dtsi [new file with mode: 0644]
arch/arm/boot/dts/ea3250.dts
arch/arm/boot/dts/elpida_ecb240abacn.dtsi [new file with mode: 0644]
arch/arm/boot/dts/imx23-evk.dts
arch/arm/boot/dts/imx23-olinuxino.dts
arch/arm/boot/dts/imx23-stmp378x_devb.dts
arch/arm/boot/dts/imx23.dtsi
arch/arm/boot/dts/imx27-phytec-phycore.dts
arch/arm/boot/dts/imx27.dtsi
arch/arm/boot/dts/imx28-apx4devkit.dts
arch/arm/boot/dts/imx28-cfa10049.dts [new file with mode: 0644]
arch/arm/boot/dts/imx28-evk.dts
arch/arm/boot/dts/imx28-m28evk.dts
arch/arm/boot/dts/imx28-tx28.dts
arch/arm/boot/dts/imx28.dtsi
arch/arm/boot/dts/imx51-babbage.dts
arch/arm/boot/dts/imx51.dtsi
arch/arm/boot/dts/imx53-ard.dts
arch/arm/boot/dts/imx53-evk.dts
arch/arm/boot/dts/imx53-qsb.dts
arch/arm/boot/dts/imx53-smd.dts
arch/arm/boot/dts/imx53.dtsi
arch/arm/boot/dts/imx6q-arm2.dts
arch/arm/boot/dts/imx6q-sabrelite.dts
arch/arm/boot/dts/imx6q-sabresd.dts
arch/arm/boot/dts/imx6q.dtsi
arch/arm/boot/dts/mmp2.dtsi
arch/arm/boot/dts/msm8660-surf.dts
arch/arm/boot/dts/msm8960-cdp.dts [new file with mode: 0644]
arch/arm/boot/dts/omap2420-h4.dts
arch/arm/boot/dts/omap2420.dtsi [new file with mode: 0644]
arch/arm/boot/dts/omap2430.dtsi [new file with mode: 0644]
arch/arm/boot/dts/omap3-beagle-xm.dts [new file with mode: 0644]
arch/arm/boot/dts/omap3-beagle.dts [deleted file]
arch/arm/boot/dts/omap3-evm.dts
arch/arm/boot/dts/omap3-overo.dtsi [new file with mode: 0644]
arch/arm/boot/dts/omap3-tobi.dts [new file with mode: 0644]
arch/arm/boot/dts/omap3.dtsi
arch/arm/boot/dts/omap36xx.dtsi [new file with mode: 0644]
arch/arm/boot/dts/omap4-panda.dts
arch/arm/boot/dts/omap4-sdp.dts
arch/arm/boot/dts/omap4.dtsi
arch/arm/boot/dts/omap5-evm.dts
arch/arm/boot/dts/omap5.dtsi
arch/arm/boot/dts/phy3250.dts
arch/arm/boot/dts/prima2-cb.dts [deleted file]
arch/arm/boot/dts/prima2-evb.dts [new file with mode: 0644]
arch/arm/boot/dts/prima2.dtsi [new file with mode: 0644]
arch/arm/boot/dts/pxa27x.dtsi [new file with mode: 0644]
arch/arm/boot/dts/pxa2xx.dtsi [new file with mode: 0644]
arch/arm/boot/dts/pxa3xx.dtsi [new file with mode: 0644]
arch/arm/boot/dts/pxa910.dtsi
arch/arm/boot/dts/tegra20-medcom-wide.dts [new file with mode: 0644]
arch/arm/boot/dts/tegra20-paz00.dts
arch/arm/boot/dts/tegra20-plutux.dts [new file with mode: 0644]
arch/arm/boot/dts/tegra20-seaboard.dts
arch/arm/boot/dts/tegra20-tamonten.dtsi [new file with mode: 0644]
arch/arm/boot/dts/tegra20-tec.dts [new file with mode: 0644]
arch/arm/boot/dts/tegra20-ventana.dts
arch/arm/boot/dts/tegra20-whistler.dts
arch/arm/boot/dts/tegra20.dtsi
arch/arm/boot/dts/tegra30-cardhu-a02.dts [new file with mode: 0644]
arch/arm/boot/dts/tegra30-cardhu-a04.dts [new file with mode: 0644]
arch/arm/boot/dts/tegra30-cardhu.dts [deleted file]
arch/arm/boot/dts/tegra30-cardhu.dtsi [new file with mode: 0644]
arch/arm/boot/dts/tegra30.dtsi
arch/arm/boot/dts/tps65217.dtsi [new file with mode: 0644]
arch/arm/boot/dts/tps65910.dtsi [new file with mode: 0644]
arch/arm/boot/dts/twl4030.dtsi
arch/arm/boot/dts/twl6030.dtsi
arch/arm/configs/bcm2835_defconfig [new file with mode: 0644]
arch/arm/configs/imx_v6_v7_defconfig
arch/arm/configs/kzm9d_defconfig
arch/arm/configs/kzm9g_defconfig
arch/arm/configs/mxs_defconfig
arch/arm/configs/omap2plus_defconfig
arch/arm/include/asm/gpio.h
arch/arm/include/asm/hardware/cache-tauros2.h
arch/arm/include/asm/mach/arch.h
arch/arm/include/asm/smp.h
arch/arm/include/asm/timex.h
arch/arm/include/debug/highbank.S [copied from arch/arm/mach-highbank/include/mach/debug-macro.S with 83% similarity]
arch/arm/include/debug/icedcc.S [new file with mode: 0644]
arch/arm/include/debug/mvebu.S [moved from arch/arm/mach-mvebu/include/mach/debug-macro.S with 86% similarity]
arch/arm/include/debug/picoxcell.S [moved from arch/arm/mach-picoxcell/include/mach/debug-macro.S with 89% similarity]
arch/arm/include/debug/socfpga.S [moved from arch/arm/mach-socfpga/include/mach/debug-macro.S with 100% similarity]
arch/arm/include/debug/vexpress.S [moved from arch/arm/mach-vexpress/include/mach/debug-macro.S with 100% similarity]
arch/arm/kernel/debug.S
arch/arm/kernel/head.S
arch/arm/kernel/setup.c
arch/arm/kernel/smp.c
arch/arm/mach-at91/Makefile.boot
arch/arm/mach-bcm2835/Makefile [new file with mode: 0644]
arch/arm/mach-bcm2835/Makefile.boot [new file with mode: 0644]
arch/arm/mach-bcm2835/bcm2835.c [new file with mode: 0644]
arch/arm/mach-bcm2835/include/mach/bcm2835_soc.h [moved from arch/arm/mach-picoxcell/include/mach/map.h with 57% similarity]
arch/arm/mach-bcm2835/include/mach/debug-macro.S [moved from arch/arm/mach-highbank/include/mach/debug-macro.S with 51% similarity]
arch/arm/mach-bcm2835/include/mach/timex.h [moved from arch/arm/mach-picoxcell/include/mach/uncompress.h with 81% similarity]
arch/arm/mach-bcm2835/include/mach/uncompress.h [new file with mode: 0644]
arch/arm/mach-dove/common.c
arch/arm/mach-dove/include/mach/gpio.h [deleted file]
arch/arm/mach-dove/irq.c
arch/arm/mach-dove/mpp.c
arch/arm/mach-ep93xx/include/mach/gpio.h [deleted file]
arch/arm/mach-exynos/Makefile.boot
arch/arm/mach-exynos/common.h
arch/arm/mach-exynos/hotplug.c
arch/arm/mach-exynos/mach-armlex4210.c
arch/arm/mach-exynos/mach-exynos5-dt.c
arch/arm/mach-exynos/mach-nuri.c
arch/arm/mach-exynos/mach-origen.c
arch/arm/mach-exynos/mach-smdk4x12.c
arch/arm/mach-exynos/mach-smdkv310.c
arch/arm/mach-exynos/mach-universal_c210.c
arch/arm/mach-exynos/platsmp.c
arch/arm/mach-highbank/Kconfig [new file with mode: 0644]
arch/arm/mach-highbank/Makefile.boot [deleted file]
arch/arm/mach-highbank/core.h
arch/arm/mach-highbank/highbank.c
arch/arm/mach-highbank/hotplug.c
arch/arm/mach-highbank/include/mach/gpio.h [deleted file]
arch/arm/mach-highbank/include/mach/timex.h [deleted file]
arch/arm/mach-highbank/include/mach/uncompress.h [deleted file]
arch/arm/mach-highbank/platsmp.c
arch/arm/mach-highbank/pm.c
arch/arm/mach-imx/Kconfig
arch/arm/mach-imx/Makefile
arch/arm/mach-imx/Makefile.boot
arch/arm/mach-imx/clk-imx35.c
arch/arm/mach-imx/clk-imx51-imx53.c
arch/arm/mach-imx/clk-imx6q.c
arch/arm/mach-imx/devices-imx53.h [deleted file]
arch/arm/mach-imx/efika.h [deleted file]
arch/arm/mach-imx/hotplug.c
arch/arm/mach-imx/imx51-dt.c
arch/arm/mach-imx/mach-imx53.c [moved from arch/arm/mach-imx/imx53-dt.c with 81% similarity]
arch/arm/mach-imx/mach-imx6q.c
arch/arm/mach-imx/mach-mx51_efikamx.c [deleted file]
arch/arm/mach-imx/mach-mx51_efikasb.c [deleted file]
arch/arm/mach-imx/mach-mx53_ard.c [deleted file]
arch/arm/mach-imx/mach-mx53_evk.c [deleted file]
arch/arm/mach-imx/mach-mx53_loco.c [deleted file]
arch/arm/mach-imx/mach-mx53_smd.c [deleted file]
arch/arm/mach-imx/mm-imx5.c
arch/arm/mach-imx/mx51_efika.c [deleted file]
arch/arm/mach-imx/platsmp.c
arch/arm/mach-ixp4xx/include/mach/gpio.h [deleted file]
arch/arm/mach-kirkwood/Makefile.boot
arch/arm/mach-kirkwood/include/mach/gpio.h [deleted file]
arch/arm/mach-kirkwood/irq.c
arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
arch/arm/mach-lpc32xx/Makefile.boot
arch/arm/mach-lpc32xx/irq.c
arch/arm/mach-lpc32xx/phy3250.c
arch/arm/mach-mmp/Kconfig
arch/arm/mach-mmp/mmp2.c
arch/arm/mach-mmp/pxa910.c
arch/arm/mach-msm/Kconfig
arch/arm/mach-msm/Makefile
arch/arm/mach-msm/board-dt-8660.c [new file with mode: 0644]
arch/arm/mach-msm/board-dt-8960.c [new file with mode: 0644]
arch/arm/mach-msm/board-halibut.c
arch/arm/mach-msm/board-msm7x30.c
arch/arm/mach-msm/board-msm8960.c [deleted file]
arch/arm/mach-msm/board-msm8x60.c [deleted file]
arch/arm/mach-msm/board-qsd8x50.c
arch/arm/mach-msm/board-trout.c
arch/arm/mach-msm/common.h [new file with mode: 0644]
arch/arm/mach-msm/core.h [new file with mode: 0644]
arch/arm/mach-msm/devices-msm8960.c [deleted file]
arch/arm/mach-msm/hotplug.c
arch/arm/mach-msm/include/mach/board.h
arch/arm/mach-msm/include/mach/gpio.h [deleted file]
arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
arch/arm/mach-msm/include/mach/msm_iomap-8960.h
arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
arch/arm/mach-msm/io.c
arch/arm/mach-msm/platsmp.c
arch/arm/mach-msm/timer.c
arch/arm/mach-mv78xx0/irq.c
arch/arm/mach-mvebu/Kconfig
arch/arm/mach-mvebu/Makefile
arch/arm/mach-mvebu/Makefile.boot [deleted file]
arch/arm/mach-mvebu/armada-370-xp.c
arch/arm/mach-mvebu/armada-370-xp.h [moved from arch/arm/mach-mvebu/include/mach/armada-370-xp.h with 100% similarity]
arch/arm/mach-mvebu/include/mach/timex.h [deleted file]
arch/arm/mach-mvebu/include/mach/uncompress.h [deleted file]
arch/arm/mach-mxs/Kconfig
arch/arm/mach-mxs/Makefile
arch/arm/mach-mxs/Makefile.boot
arch/arm/mach-mxs/devices-mx23.h [deleted file]
arch/arm/mach-mxs/devices-mx28.h [deleted file]
arch/arm/mach-mxs/devices.c [deleted file]
arch/arm/mach-mxs/devices/Kconfig [deleted file]
arch/arm/mach-mxs/devices/Makefile [deleted file]
arch/arm/mach-mxs/devices/platform-auart.c [deleted file]
arch/arm/mach-mxs/devices/platform-dma.c [deleted file]
arch/arm/mach-mxs/devices/platform-fec.c [deleted file]
arch/arm/mach-mxs/devices/platform-flexcan.c [deleted file]
arch/arm/mach-mxs/devices/platform-gpio-mxs.c [deleted file]
arch/arm/mach-mxs/devices/platform-gpmi-nand.c [deleted file]
arch/arm/mach-mxs/devices/platform-mxs-i2c.c [deleted file]
arch/arm/mach-mxs/devices/platform-mxs-mmc.c [deleted file]
arch/arm/mach-mxs/devices/platform-mxs-pwm.c [deleted file]
arch/arm/mach-mxs/devices/platform-mxs-saif.c [deleted file]
arch/arm/mach-mxs/devices/platform-mxsfb.c [deleted file]
arch/arm/mach-mxs/devices/platform-rtc-stmp3xxx.c [deleted file]
arch/arm/mach-mxs/include/mach/common.h
arch/arm/mach-mxs/include/mach/devices-common.h [deleted file]
arch/arm/mach-mxs/include/mach/gpio.h [deleted file]
arch/arm/mach-mxs/include/mach/iomux-mx23.h [deleted file]
arch/arm/mach-mxs/include/mach/iomux-mx28.h [deleted file]
arch/arm/mach-mxs/include/mach/iomux.h [deleted file]
arch/arm/mach-mxs/iomux.c [deleted file]
arch/arm/mach-mxs/mach-apx4devkit.c [deleted file]
arch/arm/mach-mxs/mach-m28evk.c [deleted file]
arch/arm/mach-mxs/mach-mx23evk.c [deleted file]
arch/arm/mach-mxs/mach-mx28evk.c [deleted file]
arch/arm/mach-mxs/mach-mxs.c
arch/arm/mach-mxs/mach-stmp378x_devb.c [deleted file]
arch/arm/mach-mxs/mach-tx28.c [deleted file]
arch/arm/mach-mxs/mm.c
arch/arm/mach-mxs/module-tx28.c [deleted file]
arch/arm/mach-mxs/module-tx28.h [deleted file]
arch/arm/mach-nomadik/include/mach/gpio.h [deleted file]
arch/arm/mach-omap2/Kconfig
arch/arm/mach-omap2/Makefile
arch/arm/mach-omap2/board-4430sdp.c
arch/arm/mach-omap2/board-generic.c
arch/arm/mach-omap2/board-omap4panda.c
arch/arm/mach-omap2/clkt_dpll.c
arch/arm/mach-omap2/clock33xx_data.c
arch/arm/mach-omap2/common.h
arch/arm/mach-omap2/dpll3xxx.c
arch/arm/mach-omap2/io.c
arch/arm/mach-omap2/omap-hotplug.c
arch/arm/mach-omap2/omap-smp.c
arch/arm/mach-omap2/omap4-common.c
arch/arm/mach-omap2/omap_hwmod.c
arch/arm/mach-omap2/omap_hwmod_33xx_data.c [new file with mode: 0644]
arch/arm/mach-omap2/timer.c
arch/arm/mach-orion5x/d2net-setup.c
arch/arm/mach-orion5x/dns323-setup.c
arch/arm/mach-orion5x/include/mach/gpio.h [deleted file]
arch/arm/mach-orion5x/irq.c
arch/arm/mach-orion5x/net2big-setup.c
arch/arm/mach-picoxcell/Kconfig [new file with mode: 0644]
arch/arm/mach-picoxcell/Makefile.boot [deleted file]
arch/arm/mach-picoxcell/common.c
arch/arm/mach-picoxcell/include/mach/gpio.h [deleted file]
arch/arm/mach-picoxcell/include/mach/picoxcell_soc.h [deleted file]
arch/arm/mach-pxa/Kconfig
arch/arm/mach-pxa/Makefile
arch/arm/mach-pxa/clock-pxa3xx.c
arch/arm/mach-pxa/devices.c
arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
arch/arm/mach-pxa/irq.c
arch/arm/mach-pxa/pxa-dt.c [new file with mode: 0644]
arch/arm/mach-pxa/pxa3xx.c
arch/arm/mach-pxa/sharpsl_pm.c
arch/arm/mach-realview/core.c
arch/arm/mach-realview/core.h
arch/arm/mach-realview/hotplug.c
arch/arm/mach-realview/include/mach/clkdev.h [deleted file]
arch/arm/mach-realview/include/mach/gpio.h [deleted file]
arch/arm/mach-realview/platsmp.c
arch/arm/mach-realview/realview_eb.c
arch/arm/mach-realview/realview_pb1176.c
arch/arm/mach-realview/realview_pb11mp.c
arch/arm/mach-realview/realview_pba8.c
arch/arm/mach-realview/realview_pbx.c
arch/arm/mach-shmobile/board-ag5evm.c
arch/arm/mach-shmobile/board-ap4evb.c
arch/arm/mach-shmobile/board-armadillo800eva.c
arch/arm/mach-shmobile/board-g4evm.c
arch/arm/mach-shmobile/board-kota2.c
arch/arm/mach-shmobile/board-kzm9d.c
arch/arm/mach-shmobile/board-kzm9g.c
arch/arm/mach-shmobile/board-mackerel.c
arch/arm/mach-shmobile/board-marzen.c
arch/arm/mach-shmobile/clock-r8a7779.c
arch/arm/mach-shmobile/hotplug.c
arch/arm/mach-shmobile/include/mach/common.h
arch/arm/mach-shmobile/include/mach/emev2.h
arch/arm/mach-shmobile/include/mach/r8a7779.h
arch/arm/mach-shmobile/include/mach/sh73a0.h
arch/arm/mach-shmobile/pfc-r8a7740.c
arch/arm/mach-shmobile/pfc-r8a7779.c
arch/arm/mach-shmobile/pfc-sh7367.c
arch/arm/mach-shmobile/pfc-sh7372.c
arch/arm/mach-shmobile/pfc-sh7377.c
arch/arm/mach-shmobile/pfc-sh73a0.c
arch/arm/mach-shmobile/platsmp.c
arch/arm/mach-shmobile/setup-emev2.c
arch/arm/mach-shmobile/setup-sh73a0.c
arch/arm/mach-shmobile/sh-gpio.h [moved from arch/arm/mach-shmobile/include/mach/gpio.h with 84% similarity]
arch/arm/mach-shmobile/smp-emev2.c
arch/arm/mach-shmobile/smp-r8a7779.c
arch/arm/mach-shmobile/smp-sh73a0.c
arch/arm/mach-socfpga/Kconfig [new file with mode: 0644]
arch/arm/mach-socfpga/Makefile.boot [deleted file]
arch/arm/mach-socfpga/include/mach/uncompress.h [deleted file]
arch/arm/mach-spear13xx/Makefile.boot
arch/arm/mach-spear13xx/hotplug.c
arch/arm/mach-spear13xx/include/mach/generic.h
arch/arm/mach-spear13xx/include/mach/gpio.h [deleted file]
arch/arm/mach-spear13xx/platsmp.c
arch/arm/mach-spear13xx/spear1310.c
arch/arm/mach-spear13xx/spear1340.c
arch/arm/mach-spear3xx/Makefile.boot
arch/arm/mach-spear3xx/include/mach/gpio.h [deleted file]
arch/arm/mach-spear6xx/Makefile.boot
arch/arm/mach-spear6xx/include/mach/gpio.h [deleted file]
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/Makefile.boot
arch/arm/mach-tegra/board-dt-tegra20.c
arch/arm/mach-tegra/board-dt-tegra30.c
arch/arm/mach-tegra/clock.c
arch/arm/mach-tegra/clock.h
arch/arm/mach-tegra/common.c
arch/arm/mach-tegra/common.h [new file with mode: 0644]
arch/arm/mach-tegra/cpu-tegra.c
arch/arm/mach-tegra/headsmp.S
arch/arm/mach-tegra/hotplug.c
arch/arm/mach-tegra/include/mach/clk.h
arch/arm/mach-tegra/include/mach/gpio.h [deleted file]
arch/arm/mach-tegra/platsmp.c
arch/arm/mach-tegra/sleep-t20.S [new file with mode: 0644]
arch/arm/mach-tegra/sleep-t30.S [new file with mode: 0644]
arch/arm/mach-tegra/sleep.S
arch/arm/mach-tegra/sleep.h [new file with mode: 0644]
arch/arm/mach-tegra/tegra20_clocks.c [new file with mode: 0644]
arch/arm/mach-tegra/tegra20_clocks.h [new file with mode: 0644]
arch/arm/mach-tegra/tegra20_clocks_data.c [new file with mode: 0644]
arch/arm/mach-tegra/tegra2_clocks.c [deleted file]
arch/arm/mach-tegra/tegra30_clocks.c
arch/arm/mach-tegra/tegra30_clocks.h [new file with mode: 0644]
arch/arm/mach-tegra/tegra30_clocks_data.c [new file with mode: 0644]
arch/arm/mach-tegra/tegra_cpu_car.h [new file with mode: 0644]
arch/arm/mach-u300/include/mach/gpio.h [deleted file]
arch/arm/mach-ux500/Kconfig
arch/arm/mach-ux500/Makefile
arch/arm/mach-ux500/Makefile.boot
arch/arm/mach-ux500/board-mop500.c
arch/arm/mach-ux500/cache-l2x0.c
arch/arm/mach-ux500/clock.c [deleted file]
arch/arm/mach-ux500/clock.h [deleted file]
arch/arm/mach-ux500/cpu-db8500.c
arch/arm/mach-ux500/cpu.c
arch/arm/mach-ux500/hotplug.c
arch/arm/mach-ux500/include/mach/gpio.h [deleted file]
arch/arm/mach-ux500/include/mach/id.h
arch/arm/mach-ux500/include/mach/setup.h
arch/arm/mach-ux500/platsmp.c
arch/arm/mach-ux500/timer.c
arch/arm/mach-versatile/include/mach/gpio.h [deleted file]
arch/arm/mach-vexpress/Kconfig
arch/arm/mach-vexpress/Makefile
arch/arm/mach-vexpress/Makefile.boot [deleted file]
arch/arm/mach-vexpress/core.h
arch/arm/mach-vexpress/ct-ca9x4.c
arch/arm/mach-vexpress/hotplug.c
arch/arm/mach-vexpress/include/mach/gpio.h [deleted file]
arch/arm/mach-vexpress/include/mach/irqs.h
arch/arm/mach-vexpress/include/mach/timex.h [deleted file]
arch/arm/mach-vexpress/include/mach/uncompress.h [deleted file]
arch/arm/mach-vexpress/platsmp.c
arch/arm/mach-vexpress/v2m.c
arch/arm/mach-vt8500/include/mach/gpio.h [deleted file]
arch/arm/mm/cache-tauros2.c
arch/arm/plat-mxc/include/mach/common.h
arch/arm/plat-mxc/include/mach/gpio.h [deleted file]
arch/arm/plat-mxc/include/mach/iomux-mx3.h
arch/arm/plat-mxc/include/mach/iomux-mx53.h [deleted file]
arch/arm/plat-mxc/ssi-fiq.S
arch/arm/plat-omap/include/plat/omap_device.h
arch/arm/plat-omap/include/plat/omap_hwmod.h
arch/arm/plat-omap/omap_device.c
arch/arm/plat-orion/gpio.c
arch/arm/plat-orion/include/plat/orion-gpio.h [moved from arch/arm/plat-orion/include/plat/gpio.h with 95% similarity]
arch/arm/plat-orion/irq.c
arch/arm/plat-orion/mpp.c
arch/arm/plat-spear/include/plat/gpio.h [deleted file]
arch/arm/plat-versatile/Makefile
arch/arm/plat-versatile/include/plat/platsmp.h [new file with mode: 0644]
arch/arm/plat-versatile/platsmp.c
drivers/Kconfig
drivers/Makefile
drivers/clk/Kconfig
drivers/clk/Makefile
drivers/clk/clk-bcm2835.c [new file with mode: 0644]
drivers/clk/clk-ls1x.c [new file with mode: 0644]
drivers/clk/clk-max77686.c [new file with mode: 0644]
drivers/clk/clk.c
drivers/clk/mmp/Makefile [new file with mode: 0644]
drivers/clk/mmp/clk-apbc.c [new file with mode: 0644]
drivers/clk/mmp/clk-apmu.c [new file with mode: 0644]
drivers/clk/mmp/clk-frac.c [new file with mode: 0644]
drivers/clk/mmp/clk-mmp2.c [new file with mode: 0644]
drivers/clk/mmp/clk-pxa168.c [new file with mode: 0644]
drivers/clk/mmp/clk-pxa910.c [new file with mode: 0644]
drivers/clk/mmp/clk.h [new file with mode: 0644]
drivers/clk/mxs/clk-imx23.c
drivers/clk/mxs/clk-imx28.c
drivers/clk/ux500/Makefile [new file with mode: 0644]
drivers/clk/ux500/clk-prcc.c [new file with mode: 0644]
drivers/clk/ux500/clk-prcmu.c [new file with mode: 0644]
drivers/clk/ux500/clk.h [new file with mode: 0644]
drivers/clk/ux500/u8500_clk.c [new file with mode: 0644]
drivers/clk/ux500/u8540_clk.c [new file with mode: 0644]
drivers/clk/ux500/u9540_clk.c [new file with mode: 0644]
drivers/clk/versatile/Makefile
drivers/clk/versatile/clk-realview.c [new file with mode: 0644]
drivers/clocksource/Makefile
drivers/clocksource/bcm2835_timer.c [new file with mode: 0644]
drivers/gpio/gpio-pxa.c
drivers/gpio/gpio-samsung.c
drivers/gpio/gpio-twl4030.c
drivers/irqchip/Kconfig [new file with mode: 0644]
drivers/irqchip/Makefile [new file with mode: 0644]
drivers/irqchip/irq-bcm2835.c [new file with mode: 0644]
drivers/mfd/db8500-prcmu.c
drivers/mfd/dbx500-prcmu-regs.h
drivers/mtd/nand/pxa3xx_nand.c
drivers/net/irda/pxaficp_ir.c
drivers/pinctrl/pinctrl-sirf.c
drivers/rtc/rtc-pxa.c
drivers/sh/pfc/gpio.c
drivers/staging/ste_rmi4/board-mop500-u8500uib-rmi4.c
drivers/usb/gadget/pxa27x_udc.c
include/linux/bcm2835_timer.h [moved from arch/arm/mach-picoxcell/include/mach/hardware.h with 70% similarity]
include/linux/clk-provider.h
include/linux/clk/bcm2835.h [moved from arch/arm/mach-socfpga/include/mach/timex.h with 83% similarity]
include/linux/irqchip/bcm2835.h [moved from arch/arm/mach-picoxcell/include/mach/timex.h with 73% similarity]
include/linux/mfd/dbx500-prcmu.h
include/linux/platform_data/clk-realview.h [new file with mode: 0644]
include/linux/platform_data/clk-ux500.h [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/arm/bcm2835.txt b/Documentation/devicetree/bindings/arm/bcm2835.txt
new file mode 100644 (file)
index 0000000..ac68348
--- /dev/null
@@ -0,0 +1,8 @@
+Broadcom BCM2835 device tree bindings
+-------------------------------------------
+
+Boards with the BCM2835 SoC shall have the following properties:
+
+Required root node property:
+
+compatible = "brcm,bcm2835";
diff --git a/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt b/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt
new file mode 100644 (file)
index 0000000..31af1cb
--- /dev/null
@@ -0,0 +1,17 @@
+* Marvell Tauros2 Cache
+
+Required properties:
+- compatible : Should be "marvell,tauros2-cache".
+- marvell,tauros2-cache-features : Specify the features supported for the
+  tauros2 cache.
+  The features including
+    CACHE_TAUROS2_PREFETCH_ON       (1 << 0)
+    CACHE_TAUROS2_LINEFILL_BURST8   (1 << 1)
+  The definition can be found at
+  arch/arm/include/asm/hardware/cache-tauros2.h
+
+Example:
+       L2: l2-cache {
+               compatible = "marvell,tauros2-cache";
+               marvell,tauros2-cache-features = <0x3>;
+       };
diff --git a/Documentation/devicetree/bindings/arm/msm/timer.txt b/Documentation/devicetree/bindings/arm/msm/timer.txt
new file mode 100644 (file)
index 0000000..8c5907b
--- /dev/null
@@ -0,0 +1,38 @@
+* MSM Timer
+
+Properties:
+
+- compatible : Should at least contain "qcom,msm-timer". More specific
+  properties such as "qcom,msm-gpt" and "qcom,msm-dgt" specify a general
+  purpose timer and a debug timer respectively.
+
+- interrupts : Interrupt indicating a match event.
+
+- reg : Specifies the base address of the timer registers. The second region
+  specifies an optional register used to configure the clock divider.
+
+- clock-frequency : The frequency of the timer in Hz.
+
+Optional:
+
+- cpu-offset : per-cpu offset used when the timer is accessed without the
+  CPU remapping facilities. The offset is cpu-offset * cpu-nr.
+
+Example:
+
+       timer@200a004 {
+               compatible = "qcom,msm-gpt", "qcom,msm-timer";
+               interrupts = <1 2 0x301>;
+               reg = <0x0200a004 0x10>;
+               clock-frequency = <32768>;
+               cpu-offset = <0x40000>;
+       };
+
+       timer@200a024 {
+               compatible = "qcom,msm-dgt", "qcom,msm-timer";
+               interrupts = <1 3 0x301>;
+               reg = <0x0200a024 0x10>,
+                     <0x0200a034 0x4>;
+               clock-frequency = <6750000>;
+               cpu-offset = <0x40000>;
+       };
index ccdd0e5..d0051a7 100644 (file)
@@ -36,6 +36,9 @@ Boards:
 - OMAP3 BeagleBoard : Low cost community board
   compatible = "ti,omap3-beagle", "ti,omap3"
 
+- OMAP3 Tobi with Overo : Commercial expansion board with daughter board
+  compatible = "ti,omap3-tobi", "ti,omap3-overo", "ti,omap3"
+
 - OMAP4 SDP : Software Developement Board
   compatible = "ti,omap4-sdp", "ti,omap4430"
 
diff --git a/Documentation/devicetree/bindings/clock/imx23-clock.txt b/Documentation/devicetree/bindings/clock/imx23-clock.txt
new file mode 100644 (file)
index 0000000..a0b867e
--- /dev/null
@@ -0,0 +1,76 @@
+* Clock bindings for Freescale i.MX23
+
+Required properties:
+- compatible: Should be "fsl,imx23-clkctrl"
+- reg: Address and length of the register set
+- #clock-cells: Should be <1>
+
+The clock consumer should specify the desired clock by having the clock
+ID in its "clocks" phandle cell.  The following is a full list of i.MX23
+clocks and IDs.
+
+       Clock           ID
+       ------------------
+       ref_xtal        0
+       pll             1
+       ref_cpu         2
+       ref_emi         3
+       ref_pix         4
+       ref_io          5
+       saif_sel        6
+       lcdif_sel       7
+       gpmi_sel        8
+       ssp_sel         9
+       emi_sel         10
+       cpu             11
+       etm_sel         12
+       cpu_pll         13
+       cpu_xtal        14
+       hbus            15
+       xbus            16
+       lcdif_div       17
+       ssp_div         18
+       gpmi_div        19
+       emi_pll         20
+       emi_xtal        21
+       etm_div         22
+       saif_div        23
+       clk32k_div      24
+       rtc             25
+       adc             26
+       spdif_div       27
+       clk32k          28
+       dri             29
+       pwm             30
+       filt            31
+       uart            32
+       ssp             33
+       gpmi            34
+       spdif           35
+       emi             36
+       saif            37
+       lcdif           38
+       etm             39
+       usb             40
+       usb_pwr         41
+
+Examples:
+
+clks: clkctrl@80040000 {
+       compatible = "fsl,imx23-clkctrl";
+       reg = <0x80040000 0x2000>;
+       #clock-cells = <1>;
+       clock-output-names =
+               ...
+               "uart",         /* 32 */
+               ...
+               "end_of_list";
+};
+
+auart0: serial@8006c000 {
+       compatible = "fsl,imx23-auart";
+       reg = <0x8006c000 0x2000>;
+       interrupts = <24 25 23>;
+       clocks = <&clks 32>;
+       status = "disabled";
+};
diff --git a/Documentation/devicetree/bindings/clock/imx28-clock.txt b/Documentation/devicetree/bindings/clock/imx28-clock.txt
new file mode 100644 (file)
index 0000000..aa2af28
--- /dev/null
@@ -0,0 +1,99 @@
+* Clock bindings for Freescale i.MX28
+
+Required properties:
+- compatible: Should be "fsl,imx28-clkctrl"
+- reg: Address and length of the register set
+- #clock-cells: Should be <1>
+
+The clock consumer should specify the desired clock by having the clock
+ID in its "clocks" phandle cell.  The following is a full list of i.MX28
+clocks and IDs.
+
+       Clock           ID
+       ------------------
+       ref_xtal        0
+       pll0            1
+       pll1            2
+       pll2            3
+       ref_cpu         4
+       ref_emi         5
+       ref_io0         6
+       ref_io1         7
+       ref_pix         8
+       ref_hsadc       9
+       ref_gpmi        10
+       saif0_sel       11
+       saif1_sel       12
+       gpmi_sel        13
+       ssp0_sel        14
+       ssp1_sel        15
+       ssp2_sel        16
+       ssp3_sel        17
+       emi_sel         18
+       etm_sel         19
+       lcdif_sel       20
+       cpu             21
+       ptp_sel         22
+       cpu_pll         23
+       cpu_xtal        24
+       hbus            25
+       xbus            26
+       ssp0_div        27
+       ssp1_div        28
+       ssp2_div        29
+       ssp3_div        30
+       gpmi_div        31
+       emi_pll         32
+       emi_xtal        33
+       lcdif_div       34
+       etm_div         35
+       ptp             36
+       saif0_div       37
+       saif1_div       38
+       clk32k_div      39
+       rtc             40
+       lradc           41
+       spdif_div       42
+       clk32k          43
+       pwm             44
+       uart            45
+       ssp0            46
+       ssp1            47
+       ssp2            48
+       ssp3            49
+       gpmi            50
+       spdif           51
+       emi             52
+       saif0           53
+       saif1           54
+       lcdif           55
+       etm             56
+       fec             57
+       can0            58
+       can1            59
+       usb0            60
+       usb1            61
+       usb0_pwr        62
+       usb1_pwr        63
+       enet_out        64
+
+Examples:
+
+clks: clkctrl@80040000 {
+       compatible = "fsl,imx28-clkctrl";
+       reg = <0x80040000 0x2000>;
+       #clock-cells = <1>;
+       clock-output-names =
+               ...
+               "uart",         /* 45 */
+               ...
+               "end_of_list";
+};
+
+auart0: serial@8006a000 {
+       compatible = "fsl,imx28-auart", "fsl,imx23-auart";
+       reg = <0x8006a000 0x2000>;
+       interrupts = <112 70 71>;
+       clocks = <&clks 45>;
+       status = "disabled";
+};
diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
new file mode 100644 (file)
index 0000000..492bd99
--- /dev/null
@@ -0,0 +1,222 @@
+* Clock bindings for Freescale i.MX6 Quad
+
+Required properties:
+- compatible: Should be "fsl,imx6q-ccm"
+- reg: Address and length of the register set
+- interrupts: Should contain CCM interrupt
+- #clock-cells: Should be <1>
+
+The clock consumer should specify the desired clock by having the clock
+ID in its "clocks" phandle cell.  The following is a full list of i.MX6Q
+clocks and IDs.
+
+       Clock                   ID
+       ---------------------------
+       dummy                   0
+       ckil                    1
+       ckih                    2
+       osc                     3
+       pll2_pfd0_352m          4
+       pll2_pfd1_594m          5
+       pll2_pfd2_396m          6
+       pll3_pfd0_720m          7
+       pll3_pfd1_540m          8
+       pll3_pfd2_508m          9
+       pll3_pfd3_454m          10
+       pll2_198m               11
+       pll3_120m               12
+       pll3_80m                13
+       pll3_60m                14
+       twd                     15
+       step                    16
+       pll1_sw                 17
+       periph_pre              18
+       periph2_pre             19
+       periph_clk2_sel         20
+       periph2_clk2_sel        21
+       axi_sel                 22
+       esai_sel                23
+       asrc_sel                24
+       spdif_sel               25
+       gpu2d_axi               26
+       gpu3d_axi               27
+       gpu2d_core_sel          28
+       gpu3d_core_sel          29
+       gpu3d_shader_sel        30
+       ipu1_sel                31
+       ipu2_sel                32
+       ldb_di0_sel             33
+       ldb_di1_sel             34
+       ipu1_di0_pre_sel        35
+       ipu1_di1_pre_sel        36
+       ipu2_di0_pre_sel        37
+       ipu2_di1_pre_sel        38
+       ipu1_di0_sel            39
+       ipu1_di1_sel            40
+       ipu2_di0_sel            41
+       ipu2_di1_sel            42
+       hsi_tx_sel              43
+       pcie_axi_sel            44
+       ssi1_sel                45
+       ssi2_sel                46
+       ssi3_sel                47
+       usdhc1_sel              48
+       usdhc2_sel              49
+       usdhc3_sel              50
+       usdhc4_sel              51
+       enfc_sel                52
+       emi_sel                 53
+       emi_slow_sel            54
+       vdo_axi_sel             55
+       vpu_axi_sel             56
+       cko1_sel                57
+       periph                  58
+       periph2                 59
+       periph_clk2             60
+       periph2_clk2            61
+       ipg                     62
+       ipg_per                 63
+       esai_pred               64
+       esai_podf               65
+       asrc_pred               66
+       asrc_podf               67
+       spdif_pred              68
+       spdif_podf              69
+       can_root                70
+       ecspi_root              71
+       gpu2d_core_podf         72
+       gpu3d_core_podf         73
+       gpu3d_shader            74
+       ipu1_podf               75
+       ipu2_podf               76
+       ldb_di0_podf            77
+       ldb_di1_podf            78
+       ipu1_di0_pre            79
+       ipu1_di1_pre            80
+       ipu2_di0_pre            81
+       ipu2_di1_pre            82
+       hsi_tx_podf             83
+       ssi1_pred               84
+       ssi1_podf               85
+       ssi2_pred               86
+       ssi2_podf               87
+       ssi3_pred               88
+       ssi3_podf               89
+       uart_serial_podf        90
+       usdhc1_podf             91
+       usdhc2_podf             92
+       usdhc3_podf             93
+       usdhc4_podf             94
+       enfc_pred               95
+       enfc_podf               96
+       emi_podf                97
+       emi_slow_podf           98
+       vpu_axi_podf            99
+       cko1_podf               100
+       axi                     101
+       mmdc_ch0_axi_podf       102
+       mmdc_ch1_axi_podf       103
+       arm                     104
+       ahb                     105
+       apbh_dma                106
+       asrc                    107
+       can1_ipg                108
+       can1_serial             109
+       can2_ipg                110
+       can2_serial             111
+       ecspi1                  112
+       ecspi2                  113
+       ecspi3                  114
+       ecspi4                  115
+       ecspi5                  116
+       enet                    117
+       esai                    118
+       gpt_ipg                 119
+       gpt_ipg_per             120
+       gpu2d_core              121
+       gpu3d_core              122
+       hdmi_iahb               123
+       hdmi_isfr               124
+       i2c1                    125
+       i2c2                    126
+       i2c3                    127
+       iim                     128
+       enfc                    129
+       ipu1                    130
+       ipu1_di0                131
+       ipu1_di1                132
+       ipu2                    133
+       ipu2_di0                134
+       ldb_di0                 135
+       ldb_di1                 136
+       ipu2_di1                137
+       hsi_tx                  138
+       mlb                     139
+       mmdc_ch0_axi            140
+       mmdc_ch1_axi            141
+       ocram                   142
+       openvg_axi              143
+       pcie_axi                144
+       pwm1                    145
+       pwm2                    146
+       pwm3                    147
+       pwm4                    148
+       per1_bch                149
+       gpmi_bch_apb            150
+       gpmi_bch                151
+       gpmi_io                 152
+       gpmi_apb                153
+       sata                    154
+       sdma                    155
+       spba                    156
+       ssi1                    157
+       ssi2                    158
+       ssi3                    159
+       uart_ipg                160
+       uart_serial             161
+       usboh3                  162
+       usdhc1                  163
+       usdhc2                  164
+       usdhc3                  165
+       usdhc4                  166
+       vdo_axi                 167
+       vpu_axi                 168
+       cko1                    169
+       pll1_sys                170
+       pll2_bus                171
+       pll3_usb_otg            172
+       pll4_audio              173
+       pll5_video              174
+       pll6_mlb                175
+       pll7_usb_host           176
+       pll8_enet               177
+       ssi1_ipg                178
+       ssi2_ipg                179
+       ssi3_ipg                180
+       rom                     181
+       usbphy1                 182
+       usbphy2                 183
+       ldb_di0_div_3_5         184
+       ldb_di1_div_3_5         185
+
+Examples:
+
+clks: ccm@020c4000 {
+       compatible = "fsl,imx6q-ccm";
+       reg = <0x020c4000 0x4000>;
+       interrupts = <0 87 0x04 0 88 0x04>;
+       #clock-cells = <1>;
+       clock-output-names = ...
+                            "uart_ipg",
+                            "uart_serial",
+                            ...;
+};
+
+uart1: serial@02020000 {
+       compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
+       reg = <0x02020000 0x4000>;
+       interrupts = <0 26 0x04>;
+       clocks = <&clks 160>, <&clks 161>;
+       clock-names = "ipg", "per";
+       status = "disabled";
+};
index 5375625..f1e5dfe 100644 (file)
@@ -39,3 +39,46 @@ Example:
                #gpio-cells = <4>;
                gpio-controller;
        };
+
+
+Samsung S3C24XX GPIO Controller
+
+Required properties:
+- compatible: Compatible property value should be "samsung,s3c24xx-gpio".
+
+- reg: Physical base address of the controller and length of memory mapped
+  region.
+
+- #gpio-cells: Should be 3. The syntax of the gpio specifier used by client nodes
+  should be the following with values derived from the SoC user manual.
+     <[phandle of the gpio controller node]
+      [pin number within the gpio controller]
+      [mux function]
+      [flags and pull up/down]
+
+  Values for gpio specifier:
+  - Pin number: depending on the controller a number from 0 up to 15.
+  - Mux function: Depending on the SoC and the gpio bank the gpio can be set
+                  as input, output or a special function
+  - Flags and Pull Up/Down: the values to use differ for the individual SoCs
+                    example S3C2416/S3C2450:
+                            0 - Pull Up/Down Disabled.
+                            1 - Pull Down Enabled.
+                            2 - Pull Up Enabled.
+          Bit 16 (0x00010000) - Input is active low.
+  Consult the user manual for the correct values of Mux and Pull Up/Down.
+
+- gpio-controller: Specifies that the node is a gpio controller.
+- #address-cells: should be 1.
+- #size-cells: should be 1.
+
+Example:
+
+       gpa: gpio-controller@56000000 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "samsung,s3c24xx-gpio";
+               reg = <0x56000000 0x10>;
+               #gpio-cells = <3>;
+               gpio-controller;
+       };
index 16695d9..66788fd 100644 (file)
@@ -11,6 +11,11 @@ Required properties:
 - interrupt-controller: Mark the device node as an interrupt controller
   The first cell is the GPIO number.
   The second cell is not used.
+- ti,use-leds : Enables LEDA and LEDB outputs if set
+- ti,debounce : if n-th bit is set, debounces GPIO-n
+- ti,mmc-cd : if n-th bit is set, GPIO-n controls VMMC(n+1)
+- ti,pullups : if n-th bit is set, set a pullup on GPIO-n
+- ti,pulldowns : if n-th bit is set, set a pulldown on GPIO-n
 
 Example:
 
@@ -20,4 +25,5 @@ twl_gpio: gpio {
     gpio-controller;
     #interrupt-cells = <2>;
     interrupt-controller;
+    ti,use-leds;
 };
index 1a85f98..2f5322b 100644 (file)
@@ -56,3 +56,4 @@ stm,m41t00            Serial Access TIMEKEEPER
 stm,m41t62             Serial real-time clock (RTC) with alarm
 stm,m41t80             M41T80 - SERIAL ACCESS RTC WITH ALARMS
 ti,tsc2003             I2C Touch-Screen Controller
+ti,tmp102              Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface
diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
new file mode 100644 (file)
index 0000000..548892c
--- /dev/null
@@ -0,0 +1,110 @@
+BCM2835 Top-Level ("ARMCTRL") Interrupt Controller
+
+The BCM2835 contains a custom top-level interrupt controller, which supports
+72 interrupt sources using a 2-level register scheme. The interrupt
+controller, or the HW block containing it, is referred to occasionally
+as "armctrl" in the SoC documentation, hence naming of this binding.
+
+Required properties:
+
+- compatible : should be "brcm,bcm2835-armctrl-ic.txt"
+- reg : Specifies base physical address and size of the registers.
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The value shall be 2.
+
+  The 1st cell is the interrupt bank; 0 for interrupts in the "IRQ basic
+  pending" register, or 1/2 respectively for interrupts in the "IRQ pending
+  1/2" register.
+
+  The 2nd cell contains the interrupt number within the bank. Valid values
+  are 0..7 for bank 0, and 0..31 for bank 1.
+
+The interrupt sources are as follows:
+
+Bank 0:
+0: ARM_TIMER
+1: ARM_MAILBOX
+2: ARM_DOORBELL_0
+3: ARM_DOORBELL_1
+4: VPU0_HALTED
+5: VPU1_HALTED
+6: ILLEGAL_TYPE0
+7: ILLEGAL_TYPE1
+
+Bank 1:
+0: TIMER0
+1: TIMER1
+2: TIMER2
+3: TIMER3
+4: CODEC0
+5: CODEC1
+6: CODEC2
+7: VC_JPEG
+8: ISP
+9: VC_USB
+10: VC_3D
+11: TRANSPOSER
+12: MULTICORESYNC0
+13: MULTICORESYNC1
+14: MULTICORESYNC2
+15: MULTICORESYNC3
+16: DMA0
+17: DMA1
+18: VC_DMA2
+19: VC_DMA3
+20: DMA4
+21: DMA5
+22: DMA6
+23: DMA7
+24: DMA8
+25: DMA9
+26: DMA10
+27: DMA11
+28: DMA12
+29: AUX
+30: ARM
+31: VPUDMA
+
+Bank 2:
+0: HOSTPORT
+1: VIDEOSCALER
+2: CCP2TX
+3: SDC
+4: DSI0
+5: AVE
+6: CAM0
+7: CAM1
+8: HDMI0
+9: HDMI1
+10: PIXELVALVE1
+11: I2CSPISLV
+12: DSI1
+13: PWA0
+14: PWA1
+15: CPR
+16: SMI
+17: GPIO0
+18: GPIO1
+19: GPIO2
+20: GPIO3
+21: VC_I2C
+22: VC_SPI
+23: VC_I2SPCM
+24: VC_SDIO
+25: VC_UART
+26: SLIMBUS
+27: VEC
+28: CPG
+29: RNG
+30: VC_ARASANSDIO
+31: AVSPMON
+
+Example:
+
+intc: interrupt-controller {
+       compatible = "brcm,bcm2835-armctrl-ic";
+       reg = <0x7e00b200 0x200>;
+       interrupt-controller;
+       #interrupt-cells = <2>;
+};
diff --git a/Documentation/devicetree/bindings/lpddr2/lpddr2-timings.txt b/Documentation/devicetree/bindings/lpddr2/lpddr2-timings.txt
new file mode 100644 (file)
index 0000000..9ceb19e
--- /dev/null
@@ -0,0 +1,52 @@
+* AC timing parameters of LPDDR2(JESD209-2) memories for a given speed-bin
+
+Required properties:
+- compatible : Should be "jedec,lpddr2-timings"
+- min-freq : minimum DDR clock frequency for the speed-bin. Type is <u32>
+- max-freq : maximum DDR clock frequency for the speed-bin. Type is <u32>
+
+Optional properties:
+
+The following properties represent AC timing parameters from the memory
+data-sheet of the device for a given speed-bin. All these properties are
+of type <u32> and the default unit is ps (pico seconds). Parameters with
+a different unit have a suffix indicating the unit such as 'tRAS-max-ns'
+- tRCD
+- tWR
+- tRAS-min
+- tRRD
+- tWTR
+- tXP
+- tRTP
+- tDQSCK-max
+- tFAW
+- tZQCS
+- tZQinit
+- tRPab
+- tZQCL
+- tCKESR
+- tRAS-max-ns
+- tDQSCK-max-derated
+
+Example:
+
+timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 {
+       compatible      = "jedec,lpddr2-timings";
+       min-freq        = <10000000>;
+       max-freq        = <400000000>;
+       tRPab           = <21000>;
+       tRCD            = <18000>;
+       tWR             = <15000>;
+       tRAS-min        = <42000>;
+       tRRD            = <10000>;
+       tWTR            = <7500>;
+       tXP             = <7500>;
+       tRTP            = <7500>;
+       tCKESR          = <15000>;
+       tDQSCK-max      = <5500>;
+       tFAW            = <50000>;
+       tZQCS           = <90000>;
+       tZQCL           = <360000>;
+       tZQinit         = <1000000>;
+       tRAS-max-ns     = <70000>;
+};
diff --git a/Documentation/devicetree/bindings/lpddr2/lpddr2.txt b/Documentation/devicetree/bindings/lpddr2/lpddr2.txt
new file mode 100644 (file)
index 0000000..58354a0
--- /dev/null
@@ -0,0 +1,102 @@
+* LPDDR2 SDRAM memories compliant to JEDEC JESD209-2
+
+Required properties:
+- compatible : Should be one of - "jedec,lpddr2-nvm", "jedec,lpddr2-s2",
+  "jedec,lpddr2-s4"
+
+  "ti,jedec-lpddr2-s2" should be listed if the memory part is LPDDR2-S2 type
+
+  "ti,jedec-lpddr2-s4" should be listed if the memory part is LPDDR2-S4 type
+
+  "ti,jedec-lpddr2-nvm" should be listed if the memory part is LPDDR2-NVM type
+
+- density  : <u32> representing density in Mb (Mega bits)
+
+- io-width : <u32> representing bus width. Possible values are 8, 16, and 32
+
+Optional properties:
+
+The following optional properties represent the minimum value of some AC
+timing parameters of the DDR device in terms of number of clock cycles.
+These values shall be obtained from the device data-sheet.
+- tRRD-min-tck
+- tWTR-min-tck
+- tXP-min-tck
+- tRTP-min-tck
+- tCKE-min-tck
+- tRPab-min-tck
+- tRCD-min-tck
+- tWR-min-tck
+- tRASmin-min-tck
+- tCKESR-min-tck
+- tFAW-min-tck
+
+Child nodes:
+- The lpddr2 node may have one or more child nodes of type "lpddr2-timings".
+  "lpddr2-timings" provides AC timing parameters of the device for
+  a given speed-bin. The user may provide the timings for as many
+  speed-bins as is required. Please see Documentation/devicetree/
+  bindings/lpddr2/lpddr2-timings.txt for more information on "lpddr2-timings"
+
+Example:
+
+elpida_ECB240ABACN : lpddr2 {
+       compatible      = "Elpida,ECB240ABACN","jedec,lpddr2-s4";
+       density         = <2048>;
+       io-width        = <32>;
+
+       tRPab-min-tck   = <3>;
+       tRCD-min-tck    = <3>;
+       tWR-min-tck     = <3>;
+       tRASmin-min-tck = <3>;
+       tRRD-min-tck    = <2>;
+       tWTR-min-tck    = <2>;
+       tXP-min-tck     = <2>;
+       tRTP-min-tck    = <2>;
+       tCKE-min-tck    = <3>;
+       tCKESR-min-tck  = <3>;
+       tFAW-min-tck    = <8>;
+
+       timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 {
+               compatible      = "jedec,lpddr2-timings";
+               min-freq        = <10000000>;
+               max-freq        = <400000000>;
+               tRPab           = <21000>;
+               tRCD            = <18000>;
+               tWR             = <15000>;
+               tRAS-min        = <42000>;
+               tRRD            = <10000>;
+               tWTR            = <7500>;
+               tXP             = <7500>;
+               tRTP            = <7500>;
+               tCKESR          = <15000>;
+               tDQSCK-max      = <5500>;
+               tFAW            = <50000>;
+               tZQCS           = <90000>;
+               tZQCL           = <360000>;
+               tZQinit         = <1000000>;
+               tRAS-max-ns     = <70000>;
+       };
+
+       timings_elpida_ECB240ABACN_200mhz: lpddr2-timings@1 {
+               compatible      = "jedec,lpddr2-timings";
+               min-freq        = <10000000>;
+               max-freq        = <200000000>;
+               tRPab           = <21000>;
+               tRCD            = <18000>;
+               tWR             = <15000>;
+               tRAS-min        = <42000>;
+               tRRD            = <10000>;
+               tWTR            = <10000>;
+               tXP             = <7500>;
+               tRTP            = <7500>;
+               tCKESR          = <15000>;
+               tDQSCK-max      = <5500>;
+               tFAW            = <50000>;
+               tZQCS           = <90000>;
+               tZQCL           = <360000>;
+               tZQinit         = <1000000>;
+               tRAS-max-ns     = <70000>;
+       };
+
+}
diff --git a/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt b/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt
new file mode 100644 (file)
index 0000000..938f8e1
--- /dev/null
@@ -0,0 +1,55 @@
+* EMIF family of TI SDRAM controllers
+
+EMIF - External Memory Interface - is an SDRAM controller used in
+TI SoCs. EMIF supports, based on the IP revision, one or more of
+DDR2/DDR3/LPDDR2 protocols. This binding describes a given instance
+of the EMIF IP and memory parts attached to it.
+
+Required properties:
+- compatible   : Should be of the form "ti,emif-<ip-rev>" where <ip-rev>
+  is the IP revision of the specific EMIF instance.
+
+- phy-type     : <u32> indicating the DDR phy type. Following are the
+  allowed values
+  <1>  : Attila PHY
+  <2>  : Intelli PHY
+
+- device-handle        : phandle to a "lpddr2" node representing the memory part
+
+- ti,hwmods    : For TI hwmods processing and omap device creation
+  the value shall be "emif<n>" where <n> is the number of the EMIF
+  instance with base 1.
+
+Optional properties:
+- cs1-used             : Have this property if CS1 of this EMIF
+  instance has a memory part attached to it. If there is a memory
+  part attached to CS1, it should be the same type as the one on CS0,
+  so there is no need to give the details of this memory part.
+
+- cal-resistor-per-cs  : Have this property if the board has one
+  calibration resistor per chip-select.
+
+- hw-caps-read-idle-ctrl: Have this property if the controller
+  supports read idle window programming
+
+- hw-caps-dll-calib-ctrl: Have this property if the controller
+  supports dll calibration control
+
+- hw-caps-ll-interface : Have this property if the controller
+  has a low latency interface and corresponding interrupt events
+
+- hw-caps-temp-alert   : Have this property if the controller
+  has capability for generating SDRAM temperature alerts
+
+Example:
+
+emif1: emif@0x4c000000 {
+       compatible      = "ti,emif-4d";
+       ti,hwmods       = "emif2";
+       phy-type        = <1>;
+       device-handle   = <&elpida_ECB240ABACN>;
+       cs1-used;
+       hw-caps-read-idle-ctrl;
+       hw-caps-ll-interface;
+       hw-caps-temp-alert;
+};
diff --git a/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt b/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt
new file mode 100644 (file)
index 0000000..f1421e2
--- /dev/null
@@ -0,0 +1,31 @@
+PXA3xx NAND DT bindings
+
+Required properties:
+
+ - compatible:         Should be "marvell,pxa3xx-nand"
+ - reg:                The register base for the controller
+ - interrupts:         The interrupt to map
+ - #address-cells:     Set to <1> if the node includes partitions
+
+Optional properties:
+
+ - marvell,nand-enable-arbiter:        Set to enable the bus arbiter
+ - marvell,nand-keep-config:   Set to keep the NAND controller config as set
+                               by the bootloader
+ - num-cs:                     Number of chipselect lines to usw
+
+Example:
+
+       nand0: nand@43100000 {
+               compatible = "marvell,pxa3xx-nand";
+               reg = <0x43100000 90>;
+               interrupts = <45>;
+               #address-cells = <1>;
+
+               marvell,nand-enable-arbiter;
+               marvell,nand-keep-config;
+               num-cs = <1>;
+
+               /* partitions (optional) */
+       };
+
diff --git a/Documentation/devicetree/bindings/rtc/pxa-rtc.txt b/Documentation/devicetree/bindings/rtc/pxa-rtc.txt
new file mode 100644 (file)
index 0000000..8c6672a
--- /dev/null
@@ -0,0 +1,14 @@
+* PXA RTC
+
+PXA specific RTC driver.
+
+Required properties:
+- compatible : Should be "marvell,pxa-rtc"
+
+Examples:
+
+rtc@40900000 {
+       compatible = "marvell,pxa-rtc";
+       reg = <0x40900000 0x3c>;
+       interrupts = <30 31>;
+};
diff --git a/Documentation/devicetree/bindings/timer/brcm,bcm2835-system-timer.txt b/Documentation/devicetree/bindings/timer/brcm,bcm2835-system-timer.txt
new file mode 100644 (file)
index 0000000..2de21c2
--- /dev/null
@@ -0,0 +1,22 @@
+BCM2835 System Timer
+
+The System Timer peripheral provides four 32-bit timer channels and a
+single 64-bit free running counter. Each channel has an output compare
+register, which is compared against the 32 least significant bits of the
+free running counter values, and generates an interrupt.
+
+Required properties:
+
+- compatible : should be "brcm,bcm2835-system-timer.txt"
+- reg : Specifies base physical address and size of the registers.
+- interrupts : A list of 4 interrupt sinks; one per timer channel.
+- clock-frequency : The frequency of the clock that drives the counter, in Hz.
+
+Example:
+
+timer {
+       compatible = "brcm,bcm2835-system-timer";
+       reg = <0x7e003000 0x1000>;
+       interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
+       clock-frequency = <1000000>;
+};
index db4d3af..4f293e5 100644 (file)
@@ -10,6 +10,7 @@ apm   Applied Micro Circuits Corporation (APM)
 arm    ARM Ltd.
 atmel  Atmel Corporation
 bosch  Bosch Sensortec GmbH
+brcm   Broadcom Corporation
 cavium Cavium, Inc.
 chrp   Common Hardware Reference Platform
 cortina        Cortina Systems, Inc.
index 1f97316..9d3965c 100644 (file)
@@ -1612,6 +1612,16 @@ L:       netdev@vger.kernel.org
 S:     Supported
 F:     drivers/net/ethernet/broadcom/bnx2x/
 
+BROADCOM BCM2835 ARM ARCHICTURE
+M:     Stephen Warren <swarren@wwwdotorg.org>
+L:     linux-rpi-kernel@lists.infradead.org (moderated for non-subscribers)
+T:     git git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi.git
+S:     Maintained
+F:     arch/arm/mach-bcm2835/
+F:     arch/arm/boot/dts/bcm2835*
+F:     arch/arm/configs/bcm2835_defconfig
+F:     drivers/*/*bcm2835*
+
 BROADCOM TG3 GIGABIT ETHERNET DRIVER
 M:     Matt Carlson <mcarlson@broadcom.com>
 M:     Michael Chan <mchan@broadcom.com>
index 6d4d438..f416422 100644 (file)
@@ -202,6 +202,13 @@ config ARM_PATCH_PHYS_VIRT
          this feature (eg, building a kernel for a single machine) and
          you need to shrink the kernel to the minimal size.
 
+config NEED_MACH_GPIO_H
+       bool
+       help
+         Select this when mach/gpio.h is required to provide special
+         definitions for this platform. The need for mach/gpio.h should
+         be avoided when possible.
+
 config NEED_MACH_IO_H
        bool
        help
@@ -247,33 +254,24 @@ config MMU
 #
 choice
        prompt "ARM system type"
-       default ARCH_VERSATILE
+       default ARCH_MULTIPLATFORM
 
-config ARCH_SOCFPGA
-       bool "Altera SOCFPGA family"
-       select ARCH_WANT_OPTIONAL_GPIOLIB
-       select ARM_AMBA
-       select ARM_GIC
-       select CACHE_L2X0
-       select CLKDEV_LOOKUP
+config ARCH_MULTIPLATFORM
+       bool "Allow multiple platforms to be selected"
+       select ARM_PATCH_PHYS_VIRT
+       select AUTO_ZRELADDR
        select COMMON_CLK
-       select CPU_V7
-       select DW_APB_TIMER
-       select DW_APB_TIMER_OF
-       select GENERIC_CLOCKEVENTS
-       select GPIO_PL061 if GPIOLIB
-       select HAVE_ARM_SCU
+       select MULTI_IRQ_HANDLER
        select SPARSE_IRQ
        select USE_OF
-       help
-         This enables support for Altera SOCFPGA Cyclone V platform
+       depends on MMU
 
 config ARCH_INTEGRATOR
        bool "ARM Ltd. Integrator family"
        select ARM_AMBA
        select ARCH_HAS_CPUFREQ
        select COMMON_CLK
-       select CLK_VERSATILE
+       select COMMON_CLK_VERSATILE
        select HAVE_TCM
        select ICST
        select GENERIC_CLOCKEVENTS
@@ -288,13 +286,12 @@ config ARCH_INTEGRATOR
 config ARCH_REALVIEW
        bool "ARM Ltd. RealView family"
        select ARM_AMBA
-       select CLKDEV_LOOKUP
-       select HAVE_MACH_CLKDEV
+       select COMMON_CLK
+       select COMMON_CLK_VERSATILE
        select ICST
        select GENERIC_CLOCKEVENTS
        select ARCH_WANT_OPTIONAL_GPIOLIB
        select PLAT_VERSATILE
-       select PLAT_VERSATILE_CLOCK
        select PLAT_VERSATILE_CLCD
        select ARM_TIMER_SP804
        select GPIO_PL061 if GPIOLIB
@@ -319,64 +316,46 @@ config ARCH_VERSATILE
        help
          This enables support for ARM Ltd Versatile board.
 
-config ARCH_VEXPRESS
-       bool "ARM Ltd. Versatile Express family"
-       select ARCH_WANT_OPTIONAL_GPIOLIB
-       select ARM_AMBA
-       select ARM_TIMER_SP804
-       select CLKDEV_LOOKUP
-       select COMMON_CLK
-       select GENERIC_CLOCKEVENTS
-       select HAVE_CLK
-       select HAVE_PATA_PLATFORM
-       select ICST
-       select NO_IOPORT
-       select PLAT_VERSATILE
-       select PLAT_VERSATILE_CLCD
-       select REGULATOR_FIXED_VOLTAGE if REGULATOR
-       help
-         This enables support for the ARM Ltd Versatile Express boards.
-
 config ARCH_AT91
        bool "Atmel AT91"
        select ARCH_REQUIRE_GPIOLIB
        select HAVE_CLK
        select CLKDEV_LOOKUP
        select IRQ_DOMAIN
+       select NEED_MACH_GPIO_H
        select NEED_MACH_IO_H if PCCARD
        help
          This enables support for systems based on Atmel
          AT91RM9200 and AT91SAM9* processors.
 
-config ARCH_BCMRING
-       bool "Broadcom BCMRING"
-       depends on MMU
-       select CPU_V6
+config ARCH_BCM2835
+       bool "Broadcom BCM2835 family"
+       select ARCH_WANT_OPTIONAL_GPIOLIB
        select ARM_AMBA
+       select ARM_ERRATA_411920
        select ARM_TIMER_SP804
        select CLKDEV_LOOKUP
+       select COMMON_CLK
+       select CPU_V6
        select GENERIC_CLOCKEVENTS
-       select ARCH_WANT_OPTIONAL_GPIOLIB
+       select MULTI_IRQ_HANDLER
+       select SPARSE_IRQ
+       select USE_OF
        help
-         Support for Broadcom's BCMRing platform.
+         This enables support for the Broadcom BCM2835 SoC. This SoC is
+         use in the Raspberry Pi, and Roku 2 devices.
 
-config ARCH_HIGHBANK
-       bool "Calxeda Highbank-based"
-       select ARCH_WANT_OPTIONAL_GPIOLIB
+config ARCH_BCMRING
+       bool "Broadcom BCMRING"
+       depends on MMU
+       select CPU_V6
        select ARM_AMBA
-       select ARM_GIC
        select ARM_TIMER_SP804
-       select CACHE_L2X0
        select CLKDEV_LOOKUP
-       select COMMON_CLK
-       select CPU_V7
        select GENERIC_CLOCKEVENTS
-       select HAVE_ARM_SCU
-       select HAVE_SMP
-       select SPARSE_IRQ
-       select USE_OF
+       select ARCH_WANT_OPTIONAL_GPIOLIB
        help
-         Support for the Calxeda Highbank SoC based boards.
+         Support for Broadcom's BCMRing platform.
 
 config ARCH_CLPS711X
        bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
@@ -518,6 +497,8 @@ config ARCH_IOP32X
        bool "IOP32x-based"
        depends on MMU
        select CPU_XSCALE
+       select NEED_MACH_GPIO_H
+       select NEED_MACH_IO_H
        select NEED_RET_TO_USER
        select PLAT_IOP
        select PCI
@@ -530,6 +511,8 @@ config ARCH_IOP33X
        bool "IOP33x-based"
        depends on MMU
        select CPU_XSCALE
+       select NEED_MACH_GPIO_H
+       select NEED_MACH_IO_H
        select NEED_RET_TO_USER
        select PLAT_IOP
        select PCI
@@ -551,18 +534,6 @@ config ARCH_IXP4XX
        help
          Support for Intel's IXP4XX (XScale) family of processors.
 
-config ARCH_MVEBU
-       bool "Marvell SOCs with Device Tree support"
-       select GENERIC_CLOCKEVENTS
-       select MULTI_IRQ_HANDLER
-       select SPARSE_IRQ
-       select CLKSRC_MMIO
-       select GENERIC_IRQ_CHIP
-       select IRQ_DOMAIN
-       select COMMON_CLK
-       help
-         Support for the Marvell SoC Family with device tree support
-
 config ARCH_DOVE
        bool "Marvell Dove"
        select CPU_V7
@@ -634,6 +605,7 @@ config ARCH_MMP
        select PLAT_PXA
        select SPARSE_IRQ
        select GENERIC_ALLOCATOR
+       select NEED_MACH_GPIO_H
        help
          Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 
@@ -675,29 +647,11 @@ config ARCH_TEGRA
        select MIGHT_HAVE_CACHE_L2X0
        select ARCH_HAS_CPUFREQ
        select USE_OF
+       select COMMON_CLK
        help
          This enables support for NVIDIA Tegra based systems (Tegra APX,
          Tegra 6xx and Tegra 2 series).
 
-config ARCH_PICOXCELL
-       bool "Picochip picoXcell"
-       select ARCH_REQUIRE_GPIOLIB
-       select ARM_PATCH_PHYS_VIRT
-       select ARM_VIC
-       select CPU_V6K
-       select DW_APB_TIMER
-       select DW_APB_TIMER_OF
-       select GENERIC_CLOCKEVENTS
-       select GENERIC_GPIO
-       select HAVE_TCM
-       select NO_IOPORT
-       select SPARSE_IRQ
-       select USE_OF
-       help
-         This enables support for systems based on the Picochip picoXcell
-         family of Femtocell devices.  The picoxcell support requires device tree
-         for all boards.
-
 config ARCH_PXA
        bool "PXA2xx/PXA3xx-based"
        depends on MMU
@@ -714,6 +668,7 @@ config ARCH_PXA
        select MULTI_IRQ_HANDLER
        select ARM_CPU_SUSPEND if PM
        select HAVE_IDE
+       select NEED_MACH_GPIO_H
        help
          Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 
@@ -776,6 +731,7 @@ config ARCH_SA1100
        select CLKDEV_LOOKUP
        select ARCH_REQUIRE_GPIOLIB
        select HAVE_IDE
+       select NEED_MACH_GPIO_H
        select NEED_MACH_MEMORY_H
        select SPARSE_IRQ
        help
@@ -791,6 +747,7 @@ config ARCH_S3C24XX
        select HAVE_S3C2410_I2C if I2C
        select HAVE_S3C_RTC if RTC_CLASS
        select HAVE_S3C2410_WATCHDOG if WATCHDOG
+       select NEED_MACH_GPIO_H
        select NEED_MACH_IO_H
        help
          Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
@@ -818,6 +775,7 @@ config ARCH_S3C64XX
        select SAMSUNG_GPIOLIB_4BIT
        select HAVE_S3C2410_I2C if I2C
        select HAVE_S3C2410_WATCHDOG if WATCHDOG
+       select NEED_MACH_GPIO_H
        help
          Samsung S3C64XX series based systems
 
@@ -832,6 +790,7 @@ config ARCH_S5P64X0
        select GENERIC_CLOCKEVENTS
        select HAVE_S3C2410_I2C if I2C
        select HAVE_S3C_RTC if RTC_CLASS
+       select NEED_MACH_GPIO_H
        help
          Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
          SMDK6450.
@@ -846,6 +805,7 @@ config ARCH_S5PC100
        select HAVE_S3C2410_I2C if I2C
        select HAVE_S3C_RTC if RTC_CLASS
        select HAVE_S3C2410_WATCHDOG if WATCHDOG
+       select NEED_MACH_GPIO_H
        help
          Samsung S5PC100 series based systems
 
@@ -863,6 +823,7 @@ config ARCH_S5PV210
        select HAVE_S3C2410_I2C if I2C
        select HAVE_S3C_RTC if RTC_CLASS
        select HAVE_S3C2410_WATCHDOG if WATCHDOG
+       select NEED_MACH_GPIO_H
        select NEED_MACH_MEMORY_H
        help
          Samsung S5PV210/S5PC110 series based systems
@@ -880,6 +841,7 @@ config ARCH_EXYNOS
        select HAVE_S3C_RTC if RTC_CLASS
        select HAVE_S3C2410_I2C if I2C
        select HAVE_S3C2410_WATCHDOG if WATCHDOG
+       select NEED_MACH_GPIO_H
        select NEED_MACH_MEMORY_H
        help
          Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
@@ -952,6 +914,7 @@ config ARCH_DAVINCI
        select GENERIC_ALLOCATOR
        select GENERIC_IRQ_CHIP
        select ARCH_HAS_HOLES_MEMORYMODEL
+       select NEED_MACH_GPIO_H
        help
          Support for TI's DaVinci platform.
 
@@ -964,6 +927,7 @@ config ARCH_OMAP
        select CLKSRC_MMIO
        select GENERIC_CLOCKEVENTS
        select ARCH_HAS_HOLES_MEMORYMODEL
+       select NEED_MACH_GPIO_H
        help
          Support for TI's OMAP platform (OMAP1/2/3/4).
 
@@ -1003,6 +967,50 @@ config ARCH_ZYNQ
          Support for Xilinx Zynq ARM Cortex A9 Platform
 endchoice
 
+menu "Multiple platform selection"
+       depends on ARCH_MULTIPLATFORM
+
+comment "CPU Core family selection"
+
+config ARCH_MULTI_V4
+       bool "ARMv4 based platforms (FA526, StrongARM)"
+       select ARCH_MULTI_V4_V5
+       depends on !ARCH_MULTI_V6_V7
+
+config ARCH_MULTI_V4T
+       bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
+       select ARCH_MULTI_V4_V5
+       depends on !ARCH_MULTI_V6_V7
+
+config ARCH_MULTI_V5
+       bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
+       select ARCH_MULTI_V4_V5
+       depends on !ARCH_MULTI_V6_V7
+
+config ARCH_MULTI_V4_V5
+       bool
+
+config ARCH_MULTI_V6
+       bool "ARMv6 based platforms (ARM11, Scorpion, ...)"
+       select CPU_V6
+       select ARCH_MULTI_V6_V7
+
+config ARCH_MULTI_V7
+       bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)"
+       select CPU_V7
+       select ARCH_VEXPRESS
+       default y
+       select ARCH_MULTI_V6_V7
+
+config ARCH_MULTI_V6_V7
+       bool
+
+config ARCH_MULTI_CPU_AUTO
+       def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
+       select ARCH_MULTI_V5
+
+endmenu
+
 #
 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 # Kconfigs may be included either alphabetically (according to the
@@ -1030,6 +1038,8 @@ source "arch/arm/mach-gemini/Kconfig"
 
 source "arch/arm/mach-h720x/Kconfig"
 
+source "arch/arm/mach-highbank/Kconfig"
+
 source "arch/arm/mach-integrator/Kconfig"
 
 source "arch/arm/mach-iop32x/Kconfig"
@@ -1065,6 +1075,8 @@ source "arch/arm/mach-omap2/Kconfig"
 
 source "arch/arm/mach-orion5x/Kconfig"
 
+source "arch/arm/mach-picoxcell/Kconfig"
+
 source "arch/arm/mach-pxa/Kconfig"
 source "arch/arm/plat-pxa/Kconfig"
 
@@ -1077,6 +1089,8 @@ source "arch/arm/mach-sa1100/Kconfig"
 source "arch/arm/plat-samsung/Kconfig"
 source "arch/arm/plat-s3c24xx/Kconfig"
 
+source "arch/arm/mach-socfpga/Kconfig"
+
 source "arch/arm/plat-spear/Kconfig"
 
 source "arch/arm/mach-s3c24xx/Kconfig"
@@ -2037,7 +2051,7 @@ endchoice
 
 config XIP_KERNEL
        bool "Kernel Execute-In-Place from ROM"
-       depends on !ZBOOT_ROM && !ARM_LPAE
+       depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM
        help
          Execute-In-Place allows the kernel to run from non-volatile storage
          directly addressable by the CPU, such as NOR flash. This saves RAM
index e968a52..a7eb282 100644 (file)
@@ -261,6 +261,20 @@ choice
                  Say Y here if you want the debug print routines to direct
                  their output to the serial port on MSM 8960 devices.
 
+       config DEBUG_MVEBU_UART
+               bool "Kernel low-level debugging messages via MVEBU UART"
+               depends on ARCH_MVEBU
+               help
+                 Say Y here if you want kernel low-level debugging support
+                 on MVEBU based platforms.
+
+       config DEBUG_PICOXCELL_UART
+               depends on ARCH_PICOXCELL
+               bool "Use PicoXcell UART for low-level debug"
+               help
+                 Say Y here if you want kernel low-level debugging support
+                 on PicoXcell based platforms.
+
        config DEBUG_REALVIEW_STD_PORT
                bool "RealView Default UART"
                depends on ARCH_REALVIEW
@@ -310,6 +324,13 @@ choice
                  The uncompressor code port configuration is now handled
                  by CONFIG_S3C_LOWLEVEL_UART_PORT.
 
+       config DEBUG_SOCFPGA_UART
+               depends on ARCH_SOCFPGA
+               bool "Use SOCFPGA UART for low-level debug"
+               help
+                 Say Y here if you want kernel low-level debugging support
+                 on SOCFPGA based platforms.
+
        config DEBUG_VEXPRESS_UART0_DETECT
                bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
                depends on ARCH_VEXPRESS && CPU_CP15_MMU
@@ -338,6 +359,7 @@ choice
 
        config DEBUG_LL_UART_NONE
                bool "No low-level debugging UART"
+               depends on !ARCH_MULTIPLATFORM
                help
                  Say Y here if your platform doesn't provide a UART option
                  below. This relies on your platform choosing the right UART
@@ -373,6 +395,17 @@ choice
 
 endchoice
 
+config DEBUG_LL_INCLUDE
+       string
+       default "debug/icedcc.S" if DEBUG_ICEDCC
+       default "debug/highbank.S" if DEBUG_HIGHBANK_UART
+       default "debug/mvebu.S" if DEBUG_MVEBU_UART
+       default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
+       default "debug/socfpga.S" if DEBUG_SOCFPGA_UART
+       default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
+               DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
+       default "mach/debug-macro.S"
+
 config EARLY_PRINTK
        bool "Early printk"
        depends on DEBUG_LL
index 74381a3..1c974cf 100644 (file)
@@ -135,83 +135,79 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
 
 # Machine directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
-machine-$(CONFIG_ARCH_AT91)            := at91
-machine-$(CONFIG_ARCH_BCMRING)         := bcmring
-machine-$(CONFIG_ARCH_CLPS711X)                := clps711x
-machine-$(CONFIG_ARCH_CNS3XXX)         := cns3xxx
-machine-$(CONFIG_ARCH_DAVINCI)         := davinci
-machine-$(CONFIG_ARCH_DOVE)            := dove
-machine-$(CONFIG_ARCH_EBSA110)         := ebsa110
-machine-$(CONFIG_ARCH_EP93XX)          := ep93xx
-machine-$(CONFIG_ARCH_GEMINI)          := gemini
-machine-$(CONFIG_ARCH_H720X)           := h720x
-machine-$(CONFIG_ARCH_HIGHBANK)                := highbank
-machine-$(CONFIG_ARCH_INTEGRATOR)      := integrator
-machine-$(CONFIG_ARCH_IOP13XX)         := iop13xx
-machine-$(CONFIG_ARCH_IOP32X)          := iop32x
-machine-$(CONFIG_ARCH_IOP33X)          := iop33x
-machine-$(CONFIG_ARCH_IXP4XX)          := ixp4xx
-machine-$(CONFIG_ARCH_KIRKWOOD)                := kirkwood
-machine-$(CONFIG_ARCH_KS8695)          := ks8695
-machine-$(CONFIG_ARCH_LPC32XX)         := lpc32xx
-machine-$(CONFIG_ARCH_MMP)             := mmp
-machine-$(CONFIG_ARCH_MSM)             := msm
-machine-$(CONFIG_ARCH_MV78XX0)         := mv78xx0
-machine-$(CONFIG_ARCH_IMX_V4_V5)       := imx
-machine-$(CONFIG_ARCH_IMX_V6_V7)       := imx
-machine-$(CONFIG_ARCH_MXS)             := mxs
-machine-$(CONFIG_ARCH_MVEBU)           := mvebu
-machine-$(CONFIG_ARCH_NETX)            := netx
-machine-$(CONFIG_ARCH_NOMADIK)         := nomadik
-machine-$(CONFIG_ARCH_OMAP1)           := omap1
-machine-$(CONFIG_ARCH_OMAP2PLUS)       := omap2
-machine-$(CONFIG_ARCH_ORION5X)         := orion5x
-machine-$(CONFIG_ARCH_PICOXCELL)       := picoxcell
-machine-$(CONFIG_ARCH_PRIMA2)          := prima2
-machine-$(CONFIG_ARCH_PXA)             := pxa
-machine-$(CONFIG_ARCH_REALVIEW)                := realview
-machine-$(CONFIG_ARCH_RPC)             := rpc
-machine-$(CONFIG_ARCH_S3C24XX)         := s3c24xx s3c2412 s3c2440
-machine-$(CONFIG_ARCH_S3C64XX)         := s3c64xx
-machine-$(CONFIG_ARCH_S5P64X0)         := s5p64x0
-machine-$(CONFIG_ARCH_S5PC100)         := s5pc100
-machine-$(CONFIG_ARCH_S5PV210)         := s5pv210
-machine-$(CONFIG_ARCH_EXYNOS4)         := exynos
-machine-$(CONFIG_ARCH_EXYNOS5)         := exynos
-machine-$(CONFIG_ARCH_SA1100)          := sa1100
-machine-$(CONFIG_ARCH_SHARK)           := shark
-machine-$(CONFIG_ARCH_SHMOBILE)        := shmobile
-machine-$(CONFIG_ARCH_TEGRA)           := tegra
-machine-$(CONFIG_ARCH_U300)            := u300
-machine-$(CONFIG_ARCH_U8500)           := ux500
-machine-$(CONFIG_ARCH_VERSATILE)       := versatile
-machine-$(CONFIG_ARCH_VEXPRESS)                := vexpress
-machine-$(CONFIG_ARCH_VT8500)          := vt8500
-machine-$(CONFIG_ARCH_W90X900)         := w90x900
-machine-$(CONFIG_FOOTBRIDGE)           := footbridge
-machine-$(CONFIG_ARCH_SOCFPGA)         := socfpga
-machine-$(CONFIG_MACH_SPEAR1310)       := spear13xx
-machine-$(CONFIG_MACH_SPEAR1340)       := spear13xx
-machine-$(CONFIG_MACH_SPEAR300)                := spear3xx
-machine-$(CONFIG_MACH_SPEAR310)                := spear3xx
-machine-$(CONFIG_MACH_SPEAR320)                := spear3xx
-machine-$(CONFIG_MACH_SPEAR600)                := spear6xx
-machine-$(CONFIG_ARCH_ZYNQ)            := zynq
+machine-$(CONFIG_ARCH_AT91)            += at91
+machine-$(CONFIG_ARCH_BCM2835)         += bcm2835
+machine-$(CONFIG_ARCH_BCMRING)         += bcmring
+machine-$(CONFIG_ARCH_CLPS711X)                += clps711x
+machine-$(CONFIG_ARCH_CNS3XXX)         += cns3xxx
+machine-$(CONFIG_ARCH_DAVINCI)         += davinci
+machine-$(CONFIG_ARCH_DOVE)            += dove
+machine-$(CONFIG_ARCH_EBSA110)         += ebsa110
+machine-$(CONFIG_ARCH_EP93XX)          += ep93xx
+machine-$(CONFIG_ARCH_GEMINI)          += gemini
+machine-$(CONFIG_ARCH_H720X)           += h720x
+machine-$(CONFIG_ARCH_HIGHBANK)                += highbank
+machine-$(CONFIG_ARCH_INTEGRATOR)      += integrator
+machine-$(CONFIG_ARCH_IOP13XX)         += iop13xx
+machine-$(CONFIG_ARCH_IOP32X)          += iop32x
+machine-$(CONFIG_ARCH_IOP33X)          += iop33x
+machine-$(CONFIG_ARCH_IXP4XX)          += ixp4xx
+machine-$(CONFIG_ARCH_KIRKWOOD)                += kirkwood
+machine-$(CONFIG_ARCH_KS8695)          += ks8695
+machine-$(CONFIG_ARCH_LPC32XX)         += lpc32xx
+machine-$(CONFIG_ARCH_MMP)             += mmp
+machine-$(CONFIG_ARCH_MSM)             += msm
+machine-$(CONFIG_ARCH_MV78XX0)         += mv78xx0
+machine-$(CONFIG_ARCH_MXC)             += imx
+machine-$(CONFIG_ARCH_MXS)             += mxs
+machine-$(CONFIG_ARCH_MVEBU)           += mvebu
+machine-$(CONFIG_ARCH_NETX)            += netx
+machine-$(CONFIG_ARCH_NOMADIK)         += nomadik
+machine-$(CONFIG_ARCH_OMAP1)           += omap1
+machine-$(CONFIG_ARCH_OMAP2PLUS)       += omap2
+machine-$(CONFIG_ARCH_ORION5X)         += orion5x
+machine-$(CONFIG_ARCH_PICOXCELL)       += picoxcell
+machine-$(CONFIG_ARCH_PRIMA2)          += prima2
+machine-$(CONFIG_ARCH_PXA)             += pxa
+machine-$(CONFIG_ARCH_REALVIEW)                += realview
+machine-$(CONFIG_ARCH_RPC)             += rpc
+machine-$(CONFIG_ARCH_S3C24XX)         += s3c24xx s3c2412 s3c2440
+machine-$(CONFIG_ARCH_S3C64XX)         += s3c64xx
+machine-$(CONFIG_ARCH_S5P64X0)         += s5p64x0
+machine-$(CONFIG_ARCH_S5PC100)         += s5pc100
+machine-$(CONFIG_ARCH_S5PV210)         += s5pv210
+machine-$(CONFIG_ARCH_EXYNOS)          += exynos
+machine-$(CONFIG_ARCH_SA1100)          += sa1100
+machine-$(CONFIG_ARCH_SHARK)           += shark
+machine-$(CONFIG_ARCH_SHMOBILE)        += shmobile
+machine-$(CONFIG_ARCH_TEGRA)           += tegra
+machine-$(CONFIG_ARCH_U300)            += u300
+machine-$(CONFIG_ARCH_U8500)           += ux500
+machine-$(CONFIG_ARCH_VERSATILE)       += versatile
+machine-$(CONFIG_ARCH_VEXPRESS)                += vexpress
+machine-$(CONFIG_ARCH_VT8500)          += vt8500
+machine-$(CONFIG_ARCH_W90X900)         += w90x900
+machine-$(CONFIG_FOOTBRIDGE)           += footbridge
+machine-$(CONFIG_ARCH_SOCFPGA)         += socfpga
+machine-$(CONFIG_ARCH_SPEAR13XX)       += spear13xx
+machine-$(CONFIG_ARCH_SPEAR3XX)                += spear3xx
+machine-$(CONFIG_MACH_SPEAR600)                += spear6xx
+machine-$(CONFIG_ARCH_ZYNQ)            += zynq
 
 # Platform directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
-plat-$(CONFIG_ARCH_MXC)                := mxc
-plat-$(CONFIG_ARCH_OMAP)       := omap
-plat-$(CONFIG_ARCH_S3C64XX)    := samsung
-plat-$(CONFIG_ARCH_ZYNQ)       := versatile
-plat-$(CONFIG_PLAT_IOP)                := iop
-plat-$(CONFIG_PLAT_NOMADIK)    := nomadik
-plat-$(CONFIG_PLAT_ORION)      := orion
-plat-$(CONFIG_PLAT_PXA)                := pxa
-plat-$(CONFIG_PLAT_S3C24XX)    := s3c24xx samsung
-plat-$(CONFIG_PLAT_S5P)                := samsung
-plat-$(CONFIG_PLAT_SPEAR)      := spear
-plat-$(CONFIG_PLAT_VERSATILE)  := versatile
+plat-$(CONFIG_ARCH_MXC)                += mxc
+plat-$(CONFIG_ARCH_OMAP)       += omap
+plat-$(CONFIG_ARCH_S3C64XX)    += samsung
+plat-$(CONFIG_ARCH_ZYNQ)       += versatile
+plat-$(CONFIG_PLAT_IOP)                += iop
+plat-$(CONFIG_PLAT_NOMADIK)    += nomadik
+plat-$(CONFIG_PLAT_ORION)      += orion
+plat-$(CONFIG_PLAT_PXA)                += pxa
+plat-$(CONFIG_PLAT_S3C24XX)    += s3c24xx samsung
+plat-$(CONFIG_PLAT_S5P)                += samsung
+plat-$(CONFIG_PLAT_SPEAR)      += spear
+plat-$(CONFIG_PLAT_VERSATILE)  += versatile
 
 ifeq ($(CONFIG_ARCH_EBSA110),y)
 # This is what happens if you forget the IOCS16 line.
@@ -229,15 +225,20 @@ MACHINE  := arch/arm/mach-$(word 1,$(machine-y))/
 else
 MACHINE  :=
 endif
+ifeq ($(CONFIG_ARCH_MULTIPLATFORM),y)
+MACHINE  :=
+endif
 
 machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
 platdirs := $(patsubst %,arch/arm/plat-%/,$(plat-y))
 
+ifneq ($(CONFIG_ARCH_MULTIPLATFORM),y)
 ifeq ($(KBUILD_SRC),)
 KBUILD_CPPFLAGS += $(patsubst %,-I%include,$(machdirs) $(platdirs))
 else
 KBUILD_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs) $(platdirs))
 endif
+endif
 
 export TEXT_OFFSET GZFLAGS MMUEXT
 
index c877087..3fdab01 100644 (file)
@@ -15,6 +15,8 @@ ifneq ($(MACHINE),)
 include $(srctree)/$(MACHINE)/Makefile.boot
 endif
 
+include $(srctree)/arch/arm/boot/dts/Makefile
+
 # Note: the following conditions must always be true:
 #   ZRELADDR == virt_to_phys(PAGE_OFFSET + TEXT_OFFSET)
 #   PARAMS_PHYS must be within 4MB of ZRELADDR
index 8e2a8fc..df89983 100644 (file)
@@ -25,7 +25,13 @@ unsigned int __machine_arch_type;
 static void putstr(const char *ptr);
 extern void error(char *x);
 
+#ifdef CONFIG_ARCH_MULTIPLATFORM
+static inline void putc(int c) {}
+static inline void flush(void) {}
+static inline void arch_decomp_setup(void) {}
+#else
 #include <mach/uncompress.h>
+#endif
 
 #ifdef CONFIG_DEBUG_ICEDCC
 
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
new file mode 100644 (file)
index 0000000..d302e66
--- /dev/null
@@ -0,0 +1,100 @@
+ifeq ($(CONFIG_OF),y)
+
+dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb \
+       at91sam9263ek.dtb \
+       at91sam9g20ek_2mmc.dtb \
+       at91sam9g20ek.dtb \
+       at91sam9g25ek.dtb \
+       at91sam9m10g45ek.dtb \
+       at91sam9n12ek.dtb \
+       ethernut5.dtb \
+       evk-pro3.dtb \
+       kizbox.dtb \
+       tny_a9260.dtb \
+       tny_a9263.dtb \
+       tny_a9g20.dtb \
+       usb_a9260.dtb \
+       usb_a9263.dtb \
+       usb_a9g20.dtb
+dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
+dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
+       exynos4210-smdkv310.dtb \
+       exynos5250-smdk5250.dtb
+dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb
+dtb-$(CONFIG_ARCH_IMX5) += imx51-babbage.dtb \
+       imx53-ard.dtb \
+       imx53-evk.dtb \
+       imx53-qsb.dtb \
+       imx53-smd.dtb
+dtb-$(CONFIG_SOC_IMX6Q) += imx6q-arm2.dtb \
+       imx6q-sabrelite.dtb \
+       imx6q-sabresd.dtb
+dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
+dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \
+       kirkwood-dns325.dtb \
+       kirkwood-dreamplug.dtb \
+       kirkwood-goflexnet.dtb \
+       kirkwood-ib62x0.dtb \
+       kirkwood-iconnect.dtb \
+       kirkwood-lschlv2.dtb \
+       kirkwood-lsxhl.dtb \
+       kirkwood-ts219-6281.dtb \
+       kirkwood-ts219-6282.dtb
+dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
+       msm8960-cdp.dtb
+dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
+       armada-xp-db.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx51-babbage.dtb \
+       imx53-ard.dtb \
+       imx53-evk.dtb \
+       imx53-qsb.dtb \
+       imx53-smd.dtb \
+       imx6q-arm2.dtb \
+       imx6q-sabrelite.dtb \
+       imx6q-sabresd.dtb
+dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
+       imx23-olinuxino.dtb \
+       imx23-stmp378x_devb.dtb \
+       imx28-apx4devkit.dtb \
+       imx28-cfa10036.dtb \
+       imx28-cfa10049.dtb \
+       imx28-evk.dtb \
+       imx28-m28evk.dtb \
+       imx28-tx28.dtb
+dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
+       omap3-beagle-xm.dtb \
+       omap3-evm.dtb \
+       omap3-tobi.dtb \
+       omap4-panda.dtb \
+       omap4-pandaES.dtb \
+       omap4-var_som.dtb \
+       omap4-sdp.dtb \
+       omap5-evm.dtb
+dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
+dtb-$(CONFIG_ARCH_U8500) += snowball.dtb
+dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
+       r8a7740-armadillo800eva.dtb \
+       sh73a0-kzm9g.dtb
+dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \
+       spear1340-evb.dtb
+dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \
+       spear310-evb.dtb \
+       spear320-evb.dtb
+dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
+dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
+       tegra20-medcom-wide.dtb \
+       tegra20-paz00.dtb \
+       tegra20-plutux.dtb \
+       tegra20-seaboard.dtb \
+       tegra20-tec.dtb \
+       tegra20-trimslice.dtb \
+       tegra20-ventana.dtb \
+       tegra20-whistler.dtb \
+       tegra30-cardhu-a02.dtb \
+       tegra30-cardhu-a04.dtb
+dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
+       vexpress-v2p-ca9.dtb \
+       vexpress-v2p-ca15-tc1.dtb \
+       vexpress-v2p-ca15_a7.dtb
+
+endif
index a9af4db..c634f87 100644 (file)
                device_type = "memory";
                reg = <0x80000000 0x10000000>; /* 256 MB */
        };
+
+       ocp {
+               uart1: serial@44e09000 {
+                       status = "okay";
+               };
+
+               i2c1: i2c@44e0b000 {
+                       status = "okay";
+                       clock-frequency = <400000>;
+
+                       tps: tps@24 {
+                               reg = <0x24>;
+                       };
+
+               };
+       };
+};
+
+/include/ "tps65217.dtsi"
+
+&tps {
+       regulators {
+               dcdc1_reg: regulator@0 {
+                       regulator-always-on;
+               };
+
+               dcdc2_reg: regulator@1 {
+                       /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+                       regulator-name = "vdd_mpu";
+                       regulator-min-microvolt = <925000>;
+                       regulator-max-microvolt = <1325000>;
+                       regulator-boot-on;
+                       regulator-always-on;
+               };
+
+               dcdc3_reg: regulator@2 {
+                       /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+                       regulator-name = "vdd_core";
+                       regulator-min-microvolt = <925000>;
+                       regulator-max-microvolt = <1150000>;
+                       regulator-boot-on;
+                       regulator-always-on;
+               };
+
+               ldo1_reg: regulator@3 {
+                       regulator-always-on;
+               };
+
+               ldo2_reg: regulator@4 {
+                       regulator-always-on;
+               };
+
+               ldo3_reg: regulator@5 {
+                       regulator-always-on;
+               };
+
+               ldo4_reg: regulator@6 {
+                       regulator-always-on;
+               };
+       };
 };
index d6a97d9..185d632 100644 (file)
                device_type = "memory";
                reg = <0x80000000 0x10000000>; /* 256 MB */
        };
+
+       ocp {
+               uart1: serial@44e09000 {
+                       status = "okay";
+               };
+
+               i2c1: i2c@44e0b000 {
+                       status = "okay";
+                       clock-frequency = <400000>;
+
+                       tps: tps@2d {
+                               reg = <0x2d>;
+                       };
+               };
+       };
+
+       vbat: fixedregulator@0 {
+               compatible = "regulator-fixed";
+               regulator-name = "vbat";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-boot-on;
+       };
+};
+
+/include/ "tps65910.dtsi"
+
+&tps {
+       vcc1-supply = <&vbat>;
+       vcc2-supply = <&vbat>;
+       vcc3-supply = <&vbat>;
+       vcc4-supply = <&vbat>;
+       vcc5-supply = <&vbat>;
+       vcc6-supply = <&vbat>;
+       vcc7-supply = <&vbat>;
+       vccio-supply = <&vbat>;
+
+       regulators {
+               vrtc_reg: regulator@0 {
+                       regulator-always-on;
+               };
+
+               vio_reg: regulator@1 {
+                       regulator-always-on;
+               };
+
+               vdd1_reg: regulator@2 {
+                       /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+                       regulator-name = "vdd_mpu";
+                       regulator-min-microvolt = <912500>;
+                       regulator-max-microvolt = <1312500>;
+                       regulator-boot-on;
+                       regulator-always-on;
+               };
+
+               vdd2_reg: regulator@3 {
+                       /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+                       regulator-name = "vdd_core";
+                       regulator-min-microvolt = <912500>;
+                       regulator-max-microvolt = <1150000>;
+                       regulator-boot-on;
+                       regulator-always-on;
+               };
+
+               vdd3_reg: regulator@4 {
+                       regulator-always-on;
+               };
+
+               vdig1_reg: regulator@5 {
+                       regulator-always-on;
+               };
+
+               vdig2_reg: regulator@6 {
+                       regulator-always-on;
+               };
+
+               vpll_reg: regulator@7 {
+                       regulator-always-on;
+               };
+
+               vdac_reg: regulator@8 {
+                       regulator-always-on;
+               };
+
+               vaux1_reg: regulator@9 {
+                       regulator-always-on;
+               };
+
+               vaux2_reg: regulator@10 {
+                       regulator-always-on;
+               };
+
+               vaux33_reg: regulator@11 {
+                       regulator-always-on;
+               };
+
+               vmmc_reg: regulator@12 {
+                       regulator-always-on;
+               };
+       };
 };
index bd0cff3..bb31bff 100644 (file)
                        #gpio-cells = <2>;
                        interrupt-controller;
                        #interrupt-cells = <1>;
+                       reg = <0x44e07000 0x1000>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <96>;
                };
 
-               gpio2: gpio@4804C000 {
+               gpio2: gpio@4804c000 {
                        compatible = "ti,omap4-gpio";
                        ti,hwmods = "gpio2";
                        gpio-controller;
                        #gpio-cells = <2>;
                        interrupt-controller;
                        #interrupt-cells = <1>;
+                       reg = <0x4804c000 0x1000>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <98>;
                };
 
-               gpio3: gpio@481AC000 {
+               gpio3: gpio@481ac000 {
                        compatible = "ti,omap4-gpio";
                        ti,hwmods = "gpio3";
                        gpio-controller;
                        #gpio-cells = <2>;
                        interrupt-controller;
                        #interrupt-cells = <1>;
+                       reg = <0x481ac000 0x1000>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <32>;
                };
 
-               gpio4: gpio@481AE000 {
+               gpio4: gpio@481ae000 {
                        compatible = "ti,omap4-gpio";
                        ti,hwmods = "gpio4";
                        gpio-controller;
                        #gpio-cells = <2>;
                        interrupt-controller;
                        #interrupt-cells = <1>;
+                       reg = <0x481ae000 0x1000>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <62>;
                };
 
-               uart1: serial@44E09000 {
+               uart1: serial@44e09000 {
                        compatible = "ti,omap3-uart";
                        ti,hwmods = "uart1";
                        clock-frequency = <48000000>;
+                       reg = <0x44e09000 0x2000>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <72>;
+                       status = "disabled";
                };
 
                uart2: serial@48022000 {
                        compatible = "ti,omap3-uart";
                        ti,hwmods = "uart2";
                        clock-frequency = <48000000>;
+                       reg = <0x48022000 0x2000>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <73>;
+                       status = "disabled";
                };
 
                uart3: serial@48024000 {
                        compatible = "ti,omap3-uart";
                        ti,hwmods = "uart3";
                        clock-frequency = <48000000>;
+                       reg = <0x48024000 0x2000>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <74>;
+                       status = "disabled";
                };
 
-               uart4: serial@481A6000 {
+               uart4: serial@481a6000 {
                        compatible = "ti,omap3-uart";
                        ti,hwmods = "uart4";
                        clock-frequency = <48000000>;
+                       reg = <0x481a6000 0x2000>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <44>;
+                       status = "disabled";
                };
 
-               uart5: serial@481A8000 {
+               uart5: serial@481a8000 {
                        compatible = "ti,omap3-uart";
                        ti,hwmods = "uart5";
                        clock-frequency = <48000000>;
+                       reg = <0x481a8000 0x2000>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <45>;
+                       status = "disabled";
                };
 
-               uart6: serial@481AA000 {
+               uart6: serial@481aa000 {
                        compatible = "ti,omap3-uart";
                        ti,hwmods = "uart6";
                        clock-frequency = <48000000>;
+                       reg = <0x481aa000 0x2000>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <46>;
+                       status = "disabled";
                };
 
-               i2c1: i2c@44E0B000 {
+               i2c1: i2c@44e0b000 {
                        compatible = "ti,omap4-i2c";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "i2c1";
+                       reg = <0x44e0b000 0x1000>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <70>;
+                       status = "disabled";
                };
 
-               i2c2: i2c@4802A000 {
+               i2c2: i2c@4802a000 {
                        compatible = "ti,omap4-i2c";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "i2c2";
+                       reg = <0x4802a000 0x1000>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <71>;
+                       status = "disabled";
                };
 
-               i2c3: i2c@4819C000 {
+               i2c3: i2c@4819c000 {
                        compatible = "ti,omap4-i2c";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ti,hwmods = "i2c3";
+                       reg = <0x4819c000 0x1000>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <30>;
+                       status = "disabled";
                };
 
                wdt2: wdt@44e35000 {
                        compatible = "ti,omap3-wdt";
                        ti,hwmods = "wd_timer2";
+                       reg = <0x44e35000 0x1000>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <91>;
                };
        };
 };
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
new file mode 100644 (file)
index 0000000..7dd860f
--- /dev/null
@@ -0,0 +1,12 @@
+/dts-v1/;
+/memreserve/ 0x0c000000 0x04000000;
+/include/ "bcm2835.dtsi"
+
+/ {
+       compatible = "raspberrypi,model-b", "brcm,bcm2835";
+       model = "Raspberry Pi Model B";
+
+       memory {
+               reg = <0 0x10000000>;
+       };
+};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
new file mode 100644 (file)
index 0000000..0b61939
--- /dev/null
@@ -0,0 +1,39 @@
+/include/ "skeleton.dtsi"
+
+/ {
+       compatible = "brcm,bcm2835";
+       model = "BCM2835";
+       interrupt-parent = <&intc>;
+
+       chosen {
+               bootargs = "earlyprintk console=ttyAMA0";
+       };
+
+       soc {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x7e000000 0x20000000 0x02000000>;
+
+               timer {
+                       compatible = "brcm,bcm2835-system-timer";
+                       reg = <0x7e003000 0x1000>;
+                       interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
+                       clock-frequency = <1000000>;
+               };
+
+               intc: interrupt-controller {
+                       compatible = "brcm,bcm2835-armctrl-ic";
+                       reg = <0x7e00b200 0x200>;
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+               };
+
+               uart@20201000 {
+                       compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
+                       reg = <0x7e201000 0x1000>;
+                       interrupts = <2 25>;
+                       clock-frequency = <3000000>;
+               };
+       };
+};
index d79b28d..a4ba31b 100644 (file)
                #size-cells = <0>;
                autorepeat;
                button@21 {
-                       label = "GPIO Key UP";
+                       label = "Interrupt Key";
                        linux,code = <103>;
                        gpios = <&gpio 4 1 0>; /* GPI_P3 1 */
                };
+               key1 {
+                       label = "KEY1";
+                       linux,code = <1>;
+                       gpios = <&pca9532 0 0>;
+               };
+               key2 {
+                       label = "KEY2";
+                       linux,code = <2>;
+                       gpios = <&pca9532 1 0>;
+               };
+               key3 {
+                       label = "KEY3";
+                       linux,code = <3>;
+                       gpios = <&pca9532 2 0>;
+               };
+               key4 {
+                       label = "KEY4";
+                       linux,code = <4>;
+                       gpios = <&pca9532 3 0>;
+               };
+               joy0 {
+                       label = "Joystick Key 0";
+                       linux,code = <10>;
+                       gpios = <&gpio 2 0 0>; /* P2.0 */
+               };
+               joy1 {
+                       label = "Joystick Key 1";
+                       linux,code = <11>;
+                       gpios = <&gpio 2 1 0>; /* P2.1 */
+               };
+               joy2 {
+                       label = "Joystick Key 2";
+                       linux,code = <12>;
+                       gpios = <&gpio 2 2 0>; /* P2.2 */
+               };
+               joy3 {
+                       label = "Joystick Key 3";
+                       linux,code = <13>;
+                       gpios = <&gpio 2 3 0>; /* P2.3 */
+               };
+               joy4 {
+                       label = "Joystick Key 4";
+                       linux,code = <14>;
+                       gpios = <&gpio 2 4 0>; /* P2.4 */
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               /* LEDs on OEM Board */
+
+               led1 {
+                       gpios = <&gpio 5 14 1>; /* GPO_P3 14, GPIO 93, active low */
+                       linux,default-trigger = "timer";
+                       default-state = "off";
+               };
+
+               led2 {
+                       gpios = <&gpio 2 10 1>; /* P2.10, active low */
+                       default-state = "off";
+               };
+
+               led3 {
+                       gpios = <&gpio 2 11 1>; /* P2.11, active low */
+                       default-state = "off";
+               };
+
+               led4 {
+                       gpios = <&gpio 2 12 1>; /* P2.12, active low */
+                       default-state = "off";
+               };
+
+               /* LEDs on Base Board */
+
+               lede1 {
+                       gpios = <&pca9532 8 0>;
+                       default-state = "off";
+               };
+               lede2 {
+                       gpios = <&pca9532 9 0>;
+                       default-state = "off";
+               };
+               lede3 {
+                       gpios = <&pca9532 10 0>;
+                       default-state = "off";
+               };
+               lede4 {
+                       gpios = <&pca9532 11 0>;
+                       default-state = "off";
+               };
+               lede5 {
+                       gpios = <&pca9532 12 0>;
+                       default-state = "off";
+               };
+               lede6 {
+                       gpios = <&pca9532 13 0>;
+                       default-state = "off";
+               };
+               lede7 {
+                       gpios = <&pca9532 14 0>;
+                       default-state = "off";
+               };
+               lede8 {
+                       gpios = <&pca9532 15 0>;
+                       default-state = "off";
+               };
        };
 };
diff --git a/arch/arm/boot/dts/elpida_ecb240abacn.dtsi b/arch/arm/boot/dts/elpida_ecb240abacn.dtsi
new file mode 100644 (file)
index 0000000..f97f70f
--- /dev/null
@@ -0,0 +1,67 @@
+/*
+ * Common devices used in different OMAP boards
+ */
+
+/ {
+       elpida_ECB240ABACN: lpddr2 {
+               compatible      = "Elpida,ECB240ABACN","jedec,lpddr2-s4";
+               density         = <2048>;
+               io-width        = <32>;
+
+               tRPab-min-tck   = <3>;
+               tRCD-min-tck    = <3>;
+               tWR-min-tck     = <3>;
+               tRASmin-min-tck = <3>;
+               tRRD-min-tck    = <2>;
+               tWTR-min-tck    = <2>;
+               tXP-min-tck     = <2>;
+               tRTP-min-tck    = <2>;
+               tCKE-min-tck    = <3>;
+               tCKESR-min-tck  = <3>;
+               tFAW-min-tck    = <8>;
+
+               timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 {
+                       compatible      = "jedec,lpddr2-timings";
+                       min-freq        = <10000000>;
+                       max-freq        = <400000000>;
+                       tRPab           = <21000>;
+                       tRCD            = <18000>;
+                       tWR             = <15000>;
+                       tRAS-min        = <42000>;
+                       tRRD            = <10000>;
+                       tWTR            = <7500>;
+                       tXP             = <7500>;
+                       tRTP            = <7500>;
+                       tCKESR          = <15000>;
+                       tDQSCK-max      = <5500>;
+                       tFAW            = <50000>;
+                       tZQCS           = <90000>;
+                       tZQCL           = <360000>;
+                       tZQinit         = <1000000>;
+                       tRAS-max-ns     = <70000>;
+                       tDQSCK-max-derated = <6000>;
+               };
+
+               timings_elpida_ECB240ABACN_200mhz: lpddr2-timings@1 {
+                       compatible      = "jedec,lpddr2-timings";
+                       min-freq        = <10000000>;
+                       max-freq        = <200000000>;
+                       tRPab           = <21000>;
+                       tRCD            = <18000>;
+                       tWR             = <15000>;
+                       tRAS-min        = <42000>;
+                       tRRD            = <10000>;
+                       tWTR            = <10000>;
+                       tXP             = <7500>;
+                       tRTP            = <7500>;
+                       tCKESR          = <15000>;
+                       tDQSCK-max      = <5500>;
+                       tFAW            = <50000>;
+                       tZQCS           = <90000>;
+                       tZQCL           = <360000>;
+                       tZQinit         = <1000000>;
+                       tRAS-max-ns     = <70000>;
+                       tDQSCK-max-derated = <6000>;
+               };
+       };
+};
index e3486f4..035c13f 100644 (file)
                                pinctrl-names = "default";
                                pinctrl-0 = <&hog_pins_a>;
 
-                               hog_pins_a: hog-gpios@0 {
+                               hog_pins_a: hog@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
                                                0x1123 /* MX23_PAD_LCD_RESET__GPIO_1_18 */
                                                0x11d3 /* MX23_PAD_PWM3__GPIO_1_29 */
                                                0x11e3 /* MX23_PAD_PWM4__GPIO_1_30 */
+                                               0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
                                        >;
                                        fsl,drive-strength = <0>;
                                        fsl,voltage = <1>;
index 20912b1..384d8b6 100644 (file)
                                bus-width = <4>;
                                status = "okay";
                        };
+
+                       pinctrl@80018000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&hog_pins_a>;
+
+                               hog_pins_a: hog@0 {
+                                       reg = <0>;
+                                       fsl,pinmux-ids = <
+                                               0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */
+                                               0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */
+                                       >;
+                                       fsl,drive-strength = <0>;
+                                       fsl,voltage = <1>;
+                                       fsl,pull-up = <0>;
+                               };
+                       };
                };
 
                apbx@80040000 {
                                pinctrl-0 = <&duart_pins_a>;
                                status = "okay";
                        };
+
+                       auart0: serial@8006c000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&auart0_2pins_a>;
+                               status = "okay";
+                       };
+
+                       usbphy0: usbphy@8007c000 {
+                               status = "okay";
+                       };
+               };
+       };
+
+       ahb@80080000 {
+               usb0: usb@80080000 {
+                       vbus-supply = <&reg_usb0_vbus>;
+                       status = "okay";
+               };
+       };
+
+       regulators {
+               compatible = "simple-bus";
+
+               reg_usb0_vbus: usb0_vbus {
+                       compatible = "regulator-fixed";
+                       regulator-name = "usb0_vbus";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       enable-active-high;
+                       startup-delay-us = <300>; /* LAN9215 requires a POR of 200us minimum */
+                       gpio = <&gpio0 17 0>;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               user {
+                       label = "green";
+                       gpios = <&gpio2 1 0>;
+                       linux,default-trigger = "default-on";
                };
        };
 };
index 757a327..85c3864 100644 (file)
@@ -36,7 +36,7 @@
                                pinctrl-names = "default";
                                pinctrl-0 = <&hog_pins_a>;
 
-                               hog_pins_a: hog-gpios@0 {
+                               hog_pins_a: hog@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
                                                0x11d3 /* MX23_PAD_PWM3__GPIO_1_29 */
index e613831..3f3b6fc 100644 (file)
@@ -52,6 +52,7 @@
                        dma-apbh@80004000 {
                                compatible = "fsl,imx23-dma-apbh";
                                reg = <0x80004000 0x2000>;
+                               clocks = <&clks 15>;
                        };
 
                        ecc@80008000 {
@@ -67,6 +68,7 @@
                                reg-names = "gpmi-nand", "bch";
                                interrupts = <13>, <56>;
                                interrupt-names = "gpmi-dma", "bch";
+                               clocks = <&clks 34>;
                                fsl,gpmi-dma-channel = <4>;
                                status = "disabled";
                        };
@@ -74,6 +76,7 @@
                        ssp0: ssp@80010000 {
                                reg = <0x80010000 0x2000>;
                                interrupts = <15 14>;
+                               clocks = <&clks 33>;
                                fsl,ssp-dma-channel = <1>;
                                status = "disabled";
                        };
                                        fsl,pull-up = <0>;
                                };
 
+                               auart0_2pins_a: auart0-2pins@0 {
+                                       reg = <0>;
+                                       fsl,pinmux-ids = <
+                                               0x01e2 /* MX23_PAD_I2C_SCL__AUART1_TX */
+                                               0x01f2 /* MX23_PAD_I2C_SDA__AUART1_RX */
+                                       >;
+                                       fsl,drive-strength = <0>;
+                                       fsl,voltage = <1>;
+                                       fsl,pull-up = <0>;
+                               };
+
                                gpmi_pins_a: gpmi-nand@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
                                                0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
                                                0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
                                                0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
-                                               0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
                                                0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
                                        >;
                                        fsl,drive-strength = <1>;
                        dma-apbx@80024000 {
                                compatible = "fsl,imx23-dma-apbx";
                                reg = <0x80024000 0x2000>;
+                               clocks = <&clks 16>;
                        };
 
                        dcp@80028000 {
                                compatible = "fsl,imx23-lcdif";
                                reg = <0x80030000 2000>;
                                interrupts = <46 45>;
+                               clocks = <&clks 38>;
                                status = "disabled";
                        };
 
                        ssp1: ssp@80034000 {
                                reg = <0x80034000 0x2000>;
                                interrupts = <2 20>;
+                               clocks = <&clks 33>;
                                fsl,ssp-dma-channel = <2>;
                                status = "disabled";
                        };
                        reg = <0x80040000 0x40000>;
                        ranges;
 
-                       clkctl@80040000 {
+                       clks: clkctrl@80040000 {
+                               compatible = "fsl,imx23-clkctrl";
                                reg = <0x80040000 0x2000>;
-                               status = "disabled";
+                               #clock-cells = <1>;
                        };
 
                        saif0: saif@80042000 {
                        pwm: pwm@80064000 {
                                compatible = "fsl,imx23-pwm";
                                reg = <0x80064000 0x2000>;
+                               clocks = <&clks 30>;
                                #pwm-cells = <2>;
                                fsl,pwm-number = <5>;
                                status = "disabled";
                                compatible = "fsl,imx23-auart";
                                reg = <0x8006c000 0x2000>;
                                interrupts = <24 25 23>;
+                               clocks = <&clks 32>;
                                status = "disabled";
                        };
 
                                compatible = "fsl,imx23-auart";
                                reg = <0x8006e000 0x2000>;
                                interrupts = <59 60 58>;
+                               clocks = <&clks 32>;
                                status = "disabled";
                        };
 
                                compatible = "arm,pl011", "arm,primecell";
                                reg = <0x80070000 0x2000>;
                                interrupts = <0>;
+                               clocks = <&clks 32>, <&clks 16>;
+                               clock-names = "uart", "apb_pclk";
                                status = "disabled";
                        };
 
-                       usbphy@8007c000 {
+                       usbphy0: usbphy@8007c000 {
+                               compatible = "fsl,imx23-usbphy";
                                reg = <0x8007c000 0x2000>;
+                               clocks = <&clks 41>;
                                status = "disabled";
                        };
                };
                reg = <0x80080000 0x80000>;
                ranges;
 
-               usbctrl@80080000 {
+               usb0: usb@80080000 {
+                       compatible = "fsl,imx23-usb", "fsl,imx27-usb";
                        reg = <0x80080000 0x40000>;
+                       interrupts = <11>;
+                       fsl,usbphy = <&usbphy0>;
+                       clocks = <&clks 40>;
                        status = "disabled";
                };
        };
index 2acc86c..af50469 100644 (file)
        soc {
                aipi@10000000 { /* aipi */
 
-                       wdog@10002000 {
-                               status = "okay";
-                       };
-
                        serial@1000a000 {
                                fsl,uart-has-rtscts;
                                status = "okay";
index 5303ab6..3e54f14 100644 (file)
@@ -62,7 +62,6 @@
                                compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
                                reg = <0x10002000 0x4000>;
                                interrupts = <27>;
-                               status = "disabled";
                        };
 
                        uart1: serial@1000a000 {
index b383417..5171667 100644 (file)
@@ -37,7 +37,7 @@
                                pinctrl-names = "default";
                                pinctrl-0 = <&hog_pins_a>;
 
-                               hog_pins_a: hog-gpios@0 {
+                               hog_pins_a: hog@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
                                                0x0113 /* MX28_PAD_GPMI_CE1N__GPIO_0_17 */
diff --git a/arch/arm/boot/dts/imx28-cfa10049.dts b/arch/arm/boot/dts/imx28-cfa10049.dts
new file mode 100644 (file)
index 0000000..05c892e
--- /dev/null
@@ -0,0 +1,99 @@
+/*
+ * Copyright 2012 Free Electrons
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/*
+ * The CFA-10049 is an expansion board for the CFA-10036 module, thus we
+ * need to include the CFA-10036 DTS.
+ */
+/include/ "imx28-cfa10036.dts"
+
+/ {
+       model = "Crystalfontz CFA-10049 Board";
+       compatible = "crystalfontz,cfa10049", "crystalfontz,cfa10036", "fsl,imx28";
+
+       apb@80000000 {
+               apbh@80000000 {
+                       pinctrl@80018000 {
+                               spi3_pins_cfa10049: spi3-cfa10049@0 {
+                                       reg = <0>;
+                                       fsl,pinmux-ids = <
+                                               0x0181 /* MX28_PAD_GPMI_RDN__SSP3_SCK */
+                                               0x01c1 /* MX28_PAD_GPMI_RESETN__SSP3_CMD */
+                                               0x0111 /* MX28_PAD_GPMI_CE1N__SSP3_D3 */
+                                               0x01a2 /* MX28_PAD_GPMI_ALE__SSP3_D4 */
+                                       >;
+                                       fsl,drive-strength = <1>;
+                                       fsl,voltage = <1>;
+                                       fsl,pull-up = <1>;
+                               };
+                       };
+
+                       ssp3: ssp@80016000 {
+                               compatible = "fsl,imx28-spi";
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&spi3_pins_cfa10049>;
+                               status = "okay";
+
+                               gpio5: gpio5@0 {
+                                       compatible = "fairchild,74hc595";
+                                       gpio-controller;
+                                       #gpio-cells = <2>;
+                                       reg = <0>;
+                                       registers-number = <2>;
+                                       spi-max-frequency = <100000>;
+                               };
+
+                               gpio6: gpio6@1 {
+                                       compatible = "fairchild,74hc595";
+                                       gpio-controller;
+                                       #gpio-cells = <2>;
+                                       reg = <1>;
+                                       registers-number = <4>;
+                                       spi-max-frequency = <100000>;
+                               };
+
+                       };
+               };
+
+               apbx@80040000 {
+                       i2c1: i2c@8005a000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&i2c1_pins_a>;
+                               status = "okay";
+                       };
+
+                       usbphy1: usbphy@8007e000 {
+                               status = "okay";
+                       };
+               };
+       };
+
+       ahb@80080000 {
+               usb1: usb@80090000 {
+                       vbus-supply = <&reg_usb1_vbus>;
+                       pinctrl-0 = <&usbphy1_pins_a>;
+                       pinctrl-names = "default";
+                       status = "okay";
+               };
+       };
+
+       regulators {
+               compatible = "simple-bus";
+
+               reg_usb1_vbus: usb1_vbus {
+                       compatible = "regulator-fixed";
+                       regulator-name = "usb1_vbus";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio0 7 1>;
+               };
+       };
+};
index 773c0e8..a0ad71c 100644 (file)
                                wp-gpios = <&gpio0 28 0>;
                        };
 
+                       ssp2: ssp@80014000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "fsl,imx28-spi";
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&spi2_pins_a>;
+                               status = "okay";
+
+                               flash: m25p80@0 {
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+                                       compatible = "sst,sst25vf016b";
+                                       spi-max-frequency = <40000000>;
+                                       reg = <0>;
+                               };
+                       };
+
                        pinctrl@80018000 {
                                pinctrl-names = "default";
                                pinctrl-0 = <&hog_pins_a>;
 
-                               hog_pins_a: hog-gpios@0 {
+                               hog_pins_a: hog@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
                                                0x20d3 /* MX28_PAD_SSP1_CMD__GPIO_2_13 */
                                status = "okay";
                        };
 
+                       lradc@80050000 {
+                               status = "okay";
+                       };
+
                        i2c0: i2c@80058000 {
                                pinctrl-names = "default";
                                pinctrl-0 = <&i2c0_pins_a>;
                                        VDDIO-supply = <&reg_3p3v>;
 
                                };
+
+                               at24@51 {
+                                       compatible = "at24,24c32";
+                                       pagesize = <32>;
+                                       reg = <0x51>;
+                               };
                        };
 
                        pwm: pwm@80064000 {
index 183a3fd..3bab6b0 100644 (file)
@@ -23,6 +23,8 @@
        apb@80000000 {
                apbh@80000000 {
                        gpmi-nand@8000c000 {
+                               #address-cells = <1>;
+                               #size-cells = <1>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
                                status = "okay";
                                             &mmc0_cd_cfg
                                             &mmc0_sck_cfg>;
                                bus-width = <8>;
-                               wp-gpios = <&gpio3 10 1>;
+                               wp-gpios = <&gpio3 10 0>;
+                               vmmc-supply = <&reg_vddio_sd0>;
                                status = "okay";
                        };
 
+                       ssp2: ssp@80014000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "fsl,imx28-spi";
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&spi2_pins_a>;
+                               status = "okay";
+
+                               flash: m25p80@0 {
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+                                       compatible = "m25p80";
+                                       spi-max-frequency = <40000000>;
+                                       reg = <0>;
+                               };
+                       };
+
                        pinctrl@80018000 {
                                pinctrl-names = "default";
                                pinctrl-0 = <&hog_pins_a>;
 
-                               hog_pins_a: hog-gpios@0 {
+                               hog_pins_a: hog@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
+                                               0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */
                                                0x30a3 /* MX28_PAD_AUART2_CTS__GPIO_3_10 */
                                                0x30b3 /* MX28_PAD_AUART2_RTS__GPIO_3_11 */
+                                               0x30c3 /* MX28_PAD_AUART3_RX__GPIO_3_12 */
+                                               0x30d3 /* MX28_PAD_AUART3_TX__GPIO_3_13 */
                                        >;
                                        fsl,drive-strength = <0>;
                                        fsl,voltage = <1>;
                        i2c0: i2c@80058000 {
                                pinctrl-names = "default";
                                pinctrl-0 = <&i2c0_pins_a>;
+                               clock-frequency = <400000>;
                                status = "okay";
 
                                sgtl5000: codec@0a {
                                };
                        };
 
+                       lradc@80050000 {
+                               status = "okay";
+                       };
+
                        duart: serial@80074000 {
                                pinctrl-names = "default";
                                pinctrl-0 = <&duart_pins_a>;
                                status = "okay";
                        };
 
-                       auart0: serial@8006a000 {
-                               pinctrl-names = "default";
-                               pinctrl-0 = <&auart0_2pins_a>;
+                       usbphy0: usbphy@8007c000 {
                                status = "okay";
                        };
 
-                       auart3: serial@80070000 {
+                       usbphy1: usbphy@8007e000 {
+                               status = "okay";
+                       };
+
+                       auart0: serial@8006a000 {
                                pinctrl-names = "default";
-                               pinctrl-0 = <&auart3_pins_a>;
+                               pinctrl-0 = <&auart0_2pins_a>;
                                status = "okay";
                        };
                };
        };
 
        ahb@80080000 {
+               usb0: usb@80080000 {
+                       vbus-supply = <&reg_usb0_vbus>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&usbphy0_pins_a>;
+                       status = "okay";
+               };
+
+               usb1: usb@80090000 {
+                       vbus-supply = <&reg_usb1_vbus>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&usbphy1_pins_a>;
+                       status = "okay";
+               };
+
                mac0: ethernet@800f0000 {
                        phy-mode = "rmii";
                        pinctrl-names = "default";
                        pinctrl-0 = <&mac0_pins_a>;
-                       phy-reset-gpios = <&gpio3 11 0>;
                        status = "okay";
                };
 
                        regulator-max-microvolt = <3300000>;
                        regulator-always-on;
                };
+
+               reg_vddio_sd0: vddio-sd0 {
+                       compatible = "regulator-fixed";
+                       regulator-name = "vddio-sd0";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       gpio = <&gpio3 28 0>;
+               };
+
+               reg_usb0_vbus: usb0_vbus {
+                       compatible = "regulator-fixed";
+                       regulator-name = "usb0_vbus";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio3 12 0>;
+               };
+
+               reg_usb1_vbus: usb1_vbus {
+                       compatible = "regulator-fixed";
+                       regulator-name = "usb1_vbus";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio3 13 0>;
+               };
        };
 
        sound {
index 62bf767..37be532 100644 (file)
@@ -25,7 +25,7 @@
                                pinctrl-names = "default";
                                pinctrl-0 = <&hog_pins_a>;
 
-                               hog_pins_a: hog-gpios@0 {
+                               hog_pins_a: hog@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
                                                0x40a3 /* MX28_PAD_ENET0_RXD3__GPIO_4_10 */
                                        fsl,voltage = <1>;
                                        fsl,pull-up = <0>;
                                };
+
+                               mac0_pins_gpio: mac0-gpio-mode@0 {
+                                       reg = <0>;
+                                       fsl,pinmux-ids = <
+                                               0x4003 /* MX28_PAD_ENET0_MDC__GPIO_4_0 */
+                                               0x4013 /* MX28_PAD_ENET0_MDIO__GPIO_4_1 */
+                                               0x4023 /* MX28_PAD_ENET0_RX_EN__GPIO_4_2 */
+                                               0x4033 /* MX28_PAD_ENET0_RXD0__GPIO_4_3 */
+                                               0x4043 /* MX28_PAD_ENET0_RXD1__GPIO_4_4 */
+                                               0x4063 /* MX28_PAD_ENET0_TX_EN__GPIO_4_6 */
+                                               0x4073 /* MX28_PAD_ENET0_TXD0__GPIO_4_7 */
+                                               0x4083 /* MX28_PAD_ENET0_TXD1__GPIO_4_8 */
+                                               0x4103 /* MX28_PAD_ENET_CLK__GPIO_4_16 */
+                                       >;
+                                       fsl,drive-strength = <0>;
+                                       fsl,voltage = <1>;
+                                       fsl,pull-up = <0>;
+                               };
                        };
                };
 
@@ -72,8 +90,9 @@
        ahb@80080000 {
                mac0: ethernet@800f0000 {
                        phy-mode = "rmii";
-                       pinctrl-names = "default";
+                       pinctrl-names = "default", "gpio_mode";
                        pinctrl-0 = <&mac0_pins_a>;
+                       pinctrl-1 = <&mac0_pins_gpio>;
                        status = "okay";
                };
        };
index 3fa6d19..724147e 100644 (file)
@@ -27,6 +27,8 @@
                serial2 = &auart2;
                serial3 = &auart3;
                serial4 = &auart4;
+               ethernet0 = &mac0;
+               ethernet1 = &mac1;
        };
 
        cpus {
@@ -65,6 +67,7 @@
                        dma-apbh@80004000 {
                                compatible = "fsl,imx28-dma-apbh";
                                reg = <0x80004000 0x2000>;
+                               clocks = <&clks 25>;
                        };
 
                        perfmon@80006000 {
                                reg-names = "gpmi-nand", "bch";
                                interrupts = <88>, <41>;
                                interrupt-names = "gpmi-dma", "bch";
+                               clocks = <&clks 50>;
                                fsl,gpmi-dma-channel = <4>;
                                status = "disabled";
                        };
 
                        ssp0: ssp@80010000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
                                reg = <0x80010000 0x2000>;
                                interrupts = <96 82>;
+                               clocks = <&clks 46>;
                                fsl,ssp-dma-channel = <0>;
                                status = "disabled";
                        };
 
                        ssp1: ssp@80012000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
                                reg = <0x80012000 0x2000>;
                                interrupts = <97 83>;
+                               clocks = <&clks 47>;
                                fsl,ssp-dma-channel = <1>;
                                status = "disabled";
                        };
 
                        ssp2: ssp@80014000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
                                reg = <0x80014000 0x2000>;
                                interrupts = <98 84>;
+                               clocks = <&clks 48>;
                                fsl,ssp-dma-channel = <2>;
                                status = "disabled";
                        };
 
                        ssp3: ssp@80016000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
                                reg = <0x80016000 0x2000>;
                                interrupts = <99 85>;
+                               clocks = <&clks 49>;
                                fsl,ssp-dma-channel = <3>;
                                status = "disabled";
                        };
                                        fsl,pull-up = <1>;
                                };
 
+                               i2c0_pins_b: i2c0@1 {
+                                       reg = <1>;
+                                       fsl,pinmux-ids = <
+                                               0x3001 /* MX28_PAD_AUART0_RX__I2C0_SCL */
+                                               0x3011 /* MX28_PAD_AUART0_TX__I2C0_SDA */
+                                       >;
+                                       fsl,drive-strength = <1>;
+                                       fsl,voltage = <1>;
+                                       fsl,pull-up = <1>;
+                               };
+
+                               i2c1_pins_a: i2c1@0 {
+                                       reg = <0>;
+                                       fsl,pinmux-ids = <
+                                               0x3101 /* MX28_PAD_PWM0__I2C1_SCL */
+                                               0x3111 /* MX28_PAD_PWM1__I2C1_SDA */
+                                       >;
+                                       fsl,drive-strength = <1>;
+                                       fsl,voltage = <1>;
+                                       fsl,pull-up = <1>;
+                               };
+
                                saif0_pins_a: saif0@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
                                        fsl,pull-up = <0>;
                                };
 
+                               pwm4_pins_a: pwm4@0 {
+                                       reg = <0>;
+                                       fsl,pinmux-ids = <
+                                               0x31d0 /* MX28_PAD_PWM4__PWM_4 */
+                                       >;
+                                       fsl,drive-strength = <0>;
+                                       fsl,voltage = <1>;
+                                       fsl,pull-up = <0>;
+                               };
+
                                lcdif_24bit_pins_a: lcdif-24bit@0 {
                                        reg = <0>;
                                        fsl,pinmux-ids = <
                                        fsl,voltage = <1>;
                                        fsl,pull-up = <0>;
                                };
+
+                               spi2_pins_a: spi2@0 {
+                                       reg = <0>;
+                                       fsl,pinmux-ids = <
+                                               0x2100 /* MX28_PAD_SSP2_SCK__SSP2_SCK */
+                                               0x2110 /* MX28_PAD_SSP2_MOSI__SSP2_CMD */
+                                               0x2120 /* MX28_PAD_SSP2_MISO__SSP2_D0 */
+                                               0x2130 /* MX28_PAD_SSP2_SS0__SSP2_D3 */
+                                       >;
+                                       fsl,drive-strength = <1>;
+                                       fsl,voltage = <1>;
+                                       fsl,pull-up = <1>;
+                               };
+
+                               usbphy0_pins_a: usbphy0@0 {
+                                       reg = <0>;
+                                       fsl,pinmux-ids = <
+                                               0x2152 /* MX28_PAD_SSP2_SS2__USB0_OVERCURRENT */
+                                       >;
+                                       fsl,drive-strength = <2>;
+                                       fsl,voltage = <1>;
+                                       fsl,pull-up = <0>;
+                               };
+
+                               usbphy0_pins_b: usbphy0@1 {
+                                       reg = <1>;
+                                       fsl,pinmux-ids = <
+                                               0x3061 /* MX28_PAD_AUART1_CTS__USB0_OVERCURRENT */
+                                       >;
+                                       fsl,drive-strength = <2>;
+                                       fsl,voltage = <1>;
+                                       fsl,pull-up = <0>;
+                               };
+
+                               usbphy1_pins_a: usbphy1@0 {
+                                       reg = <0>;
+                                       fsl,pinmux-ids = <
+                                               0x2142 /* MX28_PAD_SSP2_SS1__USB1_OVERCURRENT */
+                                       >;
+                                       fsl,drive-strength = <2>;
+                                       fsl,voltage = <1>;
+                                       fsl,pull-up = <0>;
+                               };
                        };
 
                        digctl@8001c000 {
                        dma-apbx@80024000 {
                                compatible = "fsl,imx28-dma-apbx";
                                reg = <0x80024000 0x2000>;
+                               clocks = <&clks 26>;
                        };
 
                        dcp@80028000 {
                                compatible = "fsl,imx28-lcdif";
                                reg = <0x80030000 0x2000>;
                                interrupts = <38 86>;
+                               clocks = <&clks 55>;
                                status = "disabled";
                        };
 
                                compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
                                reg = <0x80032000 0x2000>;
                                interrupts = <8>;
+                               clocks = <&clks 58>, <&clks 58>;
+                               clock-names = "ipg", "per";
                                status = "disabled";
                        };
 
                                compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
                                reg = <0x80034000 0x2000>;
                                interrupts = <9>;
+                               clocks = <&clks 59>, <&clks 59>;
+                               clock-names = "ipg", "per";
                                status = "disabled";
                        };
 
                        reg = <0x80040000 0x40000>;
                        ranges;
 
-                       clkctl@80040000 {
+                       clks: clkctrl@80040000 {
+                               compatible = "fsl,imx28-clkctrl";
                                reg = <0x80040000 0x2000>;
-                               status = "disabled";
+                               #clock-cells = <1>;
                        };
 
                        saif0: saif@80042000 {
                                compatible = "fsl,imx28-saif";
                                reg = <0x80042000 0x2000>;
                                interrupts = <59 80>;
+                               clocks = <&clks 53>;
                                fsl,saif-dma-channel = <4>;
                                status = "disabled";
                        };
                                compatible = "fsl,imx28-saif";
                                reg = <0x80046000 0x2000>;
                                interrupts = <58 81>;
+                               clocks = <&clks 54>;
                                fsl,saif-dma-channel = <5>;
                                status = "disabled";
                        };
 
                        lradc@80050000 {
+                               compatible = "fsl,imx28-lradc";
                                reg = <0x80050000 0x2000>;
+                               interrupts = <10 14 15 16 17 18 19
+                                               20 21 22 23 24 25>;
                                status = "disabled";
                        };
 
                        pwm: pwm@80064000 {
                                compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
                                reg = <0x80064000 0x2000>;
+                               clocks = <&clks 44>;
                                #pwm-cells = <2>;
                                fsl,pwm-number = <8>;
                                status = "disabled";
                                compatible = "fsl,imx28-auart", "fsl,imx23-auart";
                                reg = <0x8006a000 0x2000>;
                                interrupts = <112 70 71>;
+                               clocks = <&clks 45>;
                                status = "disabled";
                        };
 
                                compatible = "fsl,imx28-auart", "fsl,imx23-auart";
                                reg = <0x8006c000 0x2000>;
                                interrupts = <113 72 73>;
+                               clocks = <&clks 45>;
                                status = "disabled";
                        };
 
                                compatible = "fsl,imx28-auart", "fsl,imx23-auart";
                                reg = <0x8006e000 0x2000>;
                                interrupts = <114 74 75>;
+                               clocks = <&clks 45>;
                                status = "disabled";
                        };
 
                                compatible = "fsl,imx28-auart", "fsl,imx23-auart";
                                reg = <0x80070000 0x2000>;
                                interrupts = <115 76 77>;
+                               clocks = <&clks 45>;
                                status = "disabled";
                        };
 
                                compatible = "fsl,imx28-auart", "fsl,imx23-auart";
                                reg = <0x80072000 0x2000>;
                                interrupts = <116 78 79>;
+                               clocks = <&clks 45>;
                                status = "disabled";
                        };
 
                                compatible = "arm,pl011", "arm,primecell";
                                reg = <0x80074000 0x1000>;
                                interrupts = <47>;
+                               clocks = <&clks 45>, <&clks 26>;
+                               clock-names = "uart", "apb_pclk";
                                status = "disabled";
                        };
 
                        usbphy0: usbphy@8007c000 {
                                compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
                                reg = <0x8007c000 0x2000>;
+                               clocks = <&clks 62>;
                                status = "disabled";
                        };
 
                        usbphy1: usbphy@8007e000 {
                                compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
                                reg = <0x8007e000 0x2000>;
+                               clocks = <&clks 63>;
                                status = "disabled";
                        };
                };
                        compatible = "fsl,imx28-usb", "fsl,imx27-usb";
                        reg = <0x80080000 0x10000>;
                        interrupts = <93>;
+                       clocks = <&clks 60>;
                        fsl,usbphy = <&usbphy0>;
                        status = "disabled";
                };
                        compatible = "fsl,imx28-usb", "fsl,imx27-usb";
                        reg = <0x80090000 0x10000>;
                        interrupts = <92>;
+                       clocks = <&clks 61>;
                        fsl,usbphy = <&usbphy1>;
                        status = "disabled";
                };
                        compatible = "fsl,imx28-fec";
                        reg = <0x800f0000 0x4000>;
                        interrupts = <101>;
+                       clocks = <&clks 57>, <&clks 57>;
+                       clock-names = "ipg", "ahb";
                        status = "disabled";
                };
 
                        compatible = "fsl,imx28-fec";
                        reg = <0x800f4000 0x4000>;
                        interrupts = <102>;
+                       clocks = <&clks 57>, <&clks 57>;
+                       clock-names = "ipg", "ahb";
                        status = "disabled";
                };
 
index 59d9789..cbd2b1c 100644 (file)
                aips@70000000 { /* aips-1 */
                        spba@70000000 {
                                esdhc@70004000 { /* ESDHC1 */
+                                       pinctrl-names = "default";
+                                       pinctrl-0 = <&pinctrl_esdhc1_1>;
                                        fsl,cd-controller;
                                        fsl,wp-controller;
                                        status = "okay";
                                };
 
                                esdhc@70008000 { /* ESDHC2 */
+                                       pinctrl-names = "default";
+                                       pinctrl-0 = <&pinctrl_esdhc2_1>;
                                        cd-gpios = <&gpio1 6 0>;
                                        wp-gpios = <&gpio1 5 0>;
                                        status = "okay";
                                };
 
                                uart3: serial@7000c000 {
+                                       pinctrl-names = "default";
+                                       pinctrl-0 = <&pinctrl_uart3_1>;
                                        fsl,uart-has-rtscts;
                                        status = "okay";
                                };
 
                                ecspi@70010000 { /* ECSPI1 */
+                                       pinctrl-names = "default";
+                                       pinctrl-0 = <&pinctrl_ecspi1_1>;
                                        fsl,spi-num-chipselects = <2>;
                                        cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
                                        status = "okay";
                                };
                        };
 
-                       wdog@73f98000 { /* WDOG1 */
-                               status = "okay";
-                       };
-
                        iomuxc@73fa8000 {
-                               compatible = "fsl,imx51-iomuxc-babbage";
-                               reg = <0x73fa8000 0x4000>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_hog>;
+
+                               hog {
+                                       pinctrl_hog: hoggrp {
+                                               fsl,pins = <
+                                                       694  0x20d5     /* MX51_PAD_GPIO1_0__SD1_CD */
+                                                       697  0x20d5     /* MX51_PAD_GPIO1_1__SD1_WP */
+                                                       737  0x100      /* MX51_PAD_GPIO1_5__GPIO1_5 */
+                                                       740  0x100      /* MX51_PAD_GPIO1_6__GPIO1_6 */
+                                                       121  0x5        /* MX51_PAD_EIM_A27__GPIO2_21 */
+                                                       402  0x85       /* MX51_PAD_CSPI1_SS0__GPIO4_24 */
+                                                       405  0x85       /* MX51_PAD_CSPI1_SS1__GPIO4_25 */
+                                               >;
+                                       };
+                               };
                        };
 
                        uart1: serial@73fbc000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_uart1_1>;
                                fsl,uart-has-rtscts;
                                status = "okay";
                        };
 
                        uart2: serial@73fc0000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_uart2_1>;
                                status = "okay";
                        };
                };
 
                aips@80000000 { /* aips-2 */
-                       sdma@83fb0000 {
-                               fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
-                       };
-
                        i2c@83fc4000 { /* I2C2 */
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_i2c2_1>;
                                status = "okay";
 
                                sgtl5000: codec@0a {
                        };
 
                        audmux@83fd0000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_audmux_1>;
                                status = "okay";
                        };
 
                        ethernet@83fec000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_fec_1>;
                                phy-mode = "mii";
                                status = "okay";
                        };
index aba28dc..2f71a91 100644 (file)
                                };
                        };
 
+                       usb@73f80000 {
+                               compatible = "fsl,imx51-usb", "fsl,imx27-usb";
+                               reg = <0x73f80000 0x0200>;
+                               interrupts = <18>;
+                               status = "disabled";
+                       };
+
+                       usb@73f80200 {
+                               compatible = "fsl,imx51-usb", "fsl,imx27-usb";
+                               reg = <0x73f80200 0x0200>;
+                               interrupts = <14>;
+                               status = "disabled";
+                       };
+
+                       usb@73f80400 {
+                               compatible = "fsl,imx51-usb", "fsl,imx27-usb";
+                               reg = <0x73f80400 0x0200>;
+                               interrupts = <16>;
+                               status = "disabled";
+                       };
+
+                       usb@73f80600 {
+                               compatible = "fsl,imx51-usb", "fsl,imx27-usb";
+                               reg = <0x73f80600 0x0200>;
+                               interrupts = <17>;
+                               status = "disabled";
+                       };
+
                        gpio1: gpio@73f84000 {
                                compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
                                reg = <0x73f84000 0x4000>;
                                compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
                                reg = <0x73f98000 0x4000>;
                                interrupts = <58>;
-                               status = "disabled";
                        };
 
                        wdog@73f9c000 { /* WDOG2 */
                                status = "disabled";
                        };
 
+                       iomuxc@73fa8000 {
+                               compatible = "fsl,imx51-iomuxc";
+                               reg = <0x73fa8000 0x4000>;
+
+                               audmux {
+                                       pinctrl_audmux_1: audmuxgrp-1 {
+                                               fsl,pins = <
+                                                       384 0x80000000  /* MX51_PAD_AUD3_BB_TXD__AUD3_TXD */
+                                                       386 0x80000000  /* MX51_PAD_AUD3_BB_RXD__AUD3_RXD */
+                                                       389 0x80000000  /* MX51_PAD_AUD3_BB_CK__AUD3_TXC */
+                                                       391 0x80000000  /* MX51_PAD_AUD3_BB_FS__AUD3_TXFS */
+                                               >;
+                                       };
+                               };
+
+                               fec {
+                                       pinctrl_fec_1: fecgrp-1 {
+                                               fsl,pins = <
+                                                       128 0x80000000  /* MX51_PAD_EIM_EB2__FEC_MDIO */
+                                                       134 0x80000000  /* MX51_PAD_EIM_EB3__FEC_RDATA1 */
+                                                       146 0x80000000  /* MX51_PAD_EIM_CS2__FEC_RDATA2 */
+                                                       152 0x80000000  /* MX51_PAD_EIM_CS3__FEC_RDATA3 */
+                                                       158 0x80000000  /* MX51_PAD_EIM_CS4__FEC_RX_ER */
+                                                       165 0x80000000  /* MX51_PAD_EIM_CS5__FEC_CRS */
+                                                       206 0x80000000  /* MX51_PAD_NANDF_RB2__FEC_COL */
+                                                       213 0x80000000  /* MX51_PAD_NANDF_RB3__FEC_RX_CLK */
+                                                       293 0x80000000  /* MX51_PAD_NANDF_D9__FEC_RDATA0 */
+                                                       298 0x80000000  /* MX51_PAD_NANDF_D8__FEC_TDATA0 */
+                                                       225 0x80000000  /* MX51_PAD_NANDF_CS2__FEC_TX_ER */
+                                                       231 0x80000000  /* MX51_PAD_NANDF_CS3__FEC_MDC */
+                                                       237 0x80000000  /* MX51_PAD_NANDF_CS4__FEC_TDATA1 */
+                                                       243 0x80000000  /* MX51_PAD_NANDF_CS5__FEC_TDATA2 */
+                                                       250 0x80000000  /* MX51_PAD_NANDF_CS6__FEC_TDATA3 */
+                                                       255 0x80000000  /* MX51_PAD_NANDF_CS7__FEC_TX_EN */
+                                                       260 0x80000000  /* MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK */
+                                               >;
+                                       };
+                               };
+
+                               ecspi1 {
+                                       pinctrl_ecspi1_1: ecspi1grp-1 {
+                                               fsl,pins = <
+                                                       398 0x185       /* MX51_PAD_CSPI1_MISO__ECSPI1_MISO */
+                                                       394 0x185       /* MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI */
+                                                       409 0x185       /* MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK */
+                                               >;
+                                       };
+                               };
+
+                               esdhc1 {
+                                       pinctrl_esdhc1_1: esdhc1grp-1 {
+                                               fsl,pins = <
+                                                       666 0x400020d5  /* MX51_PAD_SD1_CMD__SD1_CMD */
+                                                       669 0x20d5      /* MX51_PAD_SD1_CLK__SD1_CLK */
+                                                       672 0x20d5      /* MX51_PAD_SD1_DATA0__SD1_DATA0 */
+                                                       678 0x20d5      /* MX51_PAD_SD1_DATA1__SD1_DATA1 */
+                                                       684 0x20d5      /* MX51_PAD_SD1_DATA2__SD1_DATA2 */
+                                                       691 0x20d5      /* MX51_PAD_SD1_DATA3__SD1_DATA3 */
+                                               >;
+                                       };
+                               };
+
+                               esdhc2 {
+                                       pinctrl_esdhc2_1: esdhc2grp-1 {
+                                               fsl,pins = <
+                                                       704 0x400020d5  /* MX51_PAD_SD2_CMD__SD2_CMD */
+                                                       707 0x20d5      /* MX51_PAD_SD2_CLK__SD2_CLK */
+                                                       710 0x20d5      /* MX51_PAD_SD2_DATA0__SD2_DATA0 */
+                                                       712 0x20d5      /* MX51_PAD_SD2_DATA1__SD2_DATA1 */
+                                                       715 0x20d5      /* MX51_PAD_SD2_DATA2__SD2_DATA2 */
+                                                       719 0x20d5      /* MX51_PAD_SD2_DATA3__SD2_DATA3 */
+                                               >;
+                                       };
+                               };
+
+                               i2c2 {
+                                       pinctrl_i2c2_1: i2c2grp-1 {
+                                               fsl,pins = <
+                                                       449 0x400001ed  /* MX51_PAD_KEY_COL4__I2C2_SCL */
+                                                       454 0x400001ed  /* MX51_PAD_KEY_COL5__I2C2_SDA */
+                                               >;
+                                       };
+                               };
+
+                               uart1 {
+                                       pinctrl_uart1_1: uart1grp-1 {
+                                               fsl,pins = <
+                                                       413 0x1c5       /* MX51_PAD_UART1_RXD__UART1_RXD */
+                                                       416 0x1c5       /* MX51_PAD_UART1_TXD__UART1_TXD */
+                                                       418 0x1c5       /* MX51_PAD_UART1_RTS__UART1_RTS */
+                                                       420 0x1c5       /* MX51_PAD_UART1_CTS__UART1_CTS */
+                                               >;
+                                       };
+                               };
+
+                               uart2 {
+                                       pinctrl_uart2_1: uart2grp-1 {
+                                               fsl,pins = <
+                                                       423 0x1c5       /* MX51_PAD_UART2_RXD__UART2_RXD */
+                                                       426 0x1c5       /* MX51_PAD_UART2_TXD__UART2_TXD */
+                                               >;
+                                       };
+                               };
+
+                               uart3 {
+                                       pinctrl_uart3_1: uart3grp-1 {
+                                               fsl,pins = <
+                                                       54 0x1c5        /* MX51_PAD_EIM_D25__UART3_RXD */
+                                                       59 0x1c5        /* MX51_PAD_EIM_D26__UART3_TXD */
+                                                       65 0x1c5        /* MX51_PAD_EIM_D27__UART3_RTS */
+                                                       49 0x1c5        /* MX51_PAD_EIM_D24__UART3_CTS */
+                                               >;
+                                       };
+                               };
+                       };
+
                        uart1: serial@73fbc000 {
                                compatible = "fsl,imx51-uart", "fsl,imx21-uart";
                                reg = <0x73fbc000 0x4000>;
                                compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
                                reg = <0x83fb0000 0x4000>;
                                interrupts = <6>;
+                               fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
                        };
 
                        cspi@83fc0000 {
index da895e9..4be76f2 100644 (file)
                aips@50000000 { /* AIPS1 */
                        spba@50000000 {
                                esdhc@50004000 { /* ESDHC1 */
+                                       pinctrl-names = "default";
+                                       pinctrl-0 = <&pinctrl_esdhc1_2>;
                                        cd-gpios = <&gpio1 1 0>;
                                        wp-gpios = <&gpio1 9 0>;
                                        status = "okay";
                                };
                        };
 
-                       wdog@53f98000 { /* WDOG1 */
-                               status = "okay";
-                       };
-
                        iomuxc@53fa8000 {
-                               compatible = "fsl,imx53-iomuxc-ard";
-                               reg = <0x53fa8000 0x4000>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_hog>;
+
+                               hog {
+                                       pinctrl_hog: hoggrp {
+                                               fsl,pins = <
+                                                       1077 0x80000000 /* MX53_PAD_GPIO_1__GPIO1_1 */
+                                                       1085 0x80000000 /* MX53_PAD_GPIO_9__GPIO1_9 */
+                                                       486  0x80000000 /* MX53_PAD_EIM_EB3__GPIO2_31 */
+                                                       739  0x80000000 /* MX53_PAD_GPIO_10__GPIO4_0 */
+                                                       218  0x80000000 /* MX53_PAD_DISP0_DAT16__GPIO5_10 */
+                                                       226  0x80000000 /* MX53_PAD_DISP0_DAT17__GPIO5_11 */
+                                                       233  0x80000000 /* MX53_PAD_DISP0_DAT18__GPIO5_12 */
+                                                       241  0x80000000 /* MX53_PAD_DISP0_DAT19__GPIO5_13 */
+                                                       429  0x80000000 /* MX53_PAD_EIM_D16__EMI_WEIM_D_16 */
+                                                       435  0x80000000 /* MX53_PAD_EIM_D17__EMI_WEIM_D_17 */
+                                                       441  0x80000000 /* MX53_PAD_EIM_D18__EMI_WEIM_D_18 */
+                                                       448  0x80000000 /* MX53_PAD_EIM_D19__EMI_WEIM_D_19 */
+                                                       456  0x80000000 /* MX53_PAD_EIM_D20__EMI_WEIM_D_20 */
+                                                       464  0x80000000 /* MX53_PAD_EIM_D21__EMI_WEIM_D_21 */
+                                                       471  0x80000000 /* MX53_PAD_EIM_D22__EMI_WEIM_D_22 */
+                                                       477  0x80000000 /* MX53_PAD_EIM_D23__EMI_WEIM_D_23 */
+                                                       492  0x80000000 /* MX53_PAD_EIM_D24__EMI_WEIM_D_24 */
+                                                       500  0x80000000 /* MX53_PAD_EIM_D25__EMI_WEIM_D_25 */
+                                                       508  0x80000000 /* MX53_PAD_EIM_D26__EMI_WEIM_D_26 */
+                                                       516  0x80000000 /* MX53_PAD_EIM_D27__EMI_WEIM_D_27 */
+                                                       524  0x80000000 /* MX53_PAD_EIM_D28__EMI_WEIM_D_28 */
+                                                       532  0x80000000 /* MX53_PAD_EIM_D29__EMI_WEIM_D_29 */
+                                                       540  0x80000000 /* MX53_PAD_EIM_D30__EMI_WEIM_D_30 */
+                                                       548  0x80000000 /* MX53_PAD_EIM_D31__EMI_WEIM_D_31 */
+                                                       637  0x80000000 /* MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 */
+                                                       642  0x80000000 /* MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 */
+                                                       647  0x80000000 /* MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 */
+                                                       652  0x80000000 /* MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 */
+                                                       657  0x80000000 /* MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 */
+                                                       662  0x80000000 /* MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 */
+                                                       667  0x80000000 /* MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 */
+                                                       611  0x80000000 /* MX53_PAD_EIM_OE__EMI_WEIM_OE */
+                                                       616  0x80000000 /* MX53_PAD_EIM_RW__EMI_WEIM_RW */
+                                                       607  0x80000000 /* MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 */
+                                               >;
+                                       };
+                               };
                        };
 
                        uart1: serial@53fbc000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_uart1_2>;
                                status = "okay";
                        };
                };
-
-               aips@60000000 { /* AIPS2 */
-                       sdma@63fb0000 {
-                               fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
-                       };
-               };
        };
 
        eim-cs1@f4000000 {
index 9c79803..a124d1e 100644 (file)
                aips@50000000 { /* AIPS1 */
                        spba@50000000 {
                                esdhc@50004000 { /* ESDHC1 */
+                                       pinctrl-names = "default";
+                                       pinctrl-0 = <&pinctrl_esdhc1_1>;
                                        cd-gpios = <&gpio3 13 0>;
                                        wp-gpios = <&gpio3 14 0>;
                                        status = "okay";
                                };
 
                                ecspi@50010000 { /* ECSPI1 */
+                                       pinctrl-names = "default";
+                                       pinctrl-0 = <&pinctrl_ecspi1_1>;
                                        fsl,spi-num-chipselects = <2>;
                                        cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
                                        status = "okay";
                                };
 
                                esdhc@50020000 { /* ESDHC3 */
+                                       pinctrl-names = "default";
+                                       pinctrl-0 = <&pinctrl_esdhc3_1>;
                                        cd-gpios = <&gpio3 11 0>;
                                        wp-gpios = <&gpio3 12 0>;
                                        status = "okay";
                                };
                        };
 
-                       wdog@53f98000 { /* WDOG1 */
-                               status = "okay";
-                       };
-
                        iomuxc@53fa8000 {
-                               compatible = "fsl,imx53-iomuxc-evk";
-                               reg = <0x53fa8000 0x4000>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_hog>;
+
+                               hog {
+                                       pinctrl_hog: hoggrp {
+                                               fsl,pins = <
+                                                       424  0x80000000 /* MX53_PAD_EIM_EB2__GPIO2_30 */
+                                                       449  0x80000000 /* MX53_PAD_EIM_D19__GPIO3_19 */
+                                                       693  0x80000000 /* MX53_PAD_EIM_DA11__GPIO3_11 */
+                                                       697  0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */
+                                                       701  0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
+                                                       705  0x80000000 /* MX53_PAD_EIM_DA14__GPIO3_14 */
+                                                       868  0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
+                                                       873  0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */
+                                               >;
+                                       };
+                               };
                        };
 
                        uart1: serial@53fbc000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_uart1_1>;
                                status = "okay";
                        };
                };
 
                aips@60000000 { /* AIPS2 */
-                       sdma@63fb0000 {
-                               fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
-                       };
-
                        i2c@63fc4000 { /* I2C2 */
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_i2c2_1>;
                                status = "okay";
 
                                pmic: mc13892@08 {
                        };
 
                        ethernet@63fec000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_fec_1>;
                                phy-mode = "rmii";
                                phy-reset-gpios = <&gpio7 6 0>;
                                status = "okay";
index 2d803a9..08948af 100644 (file)
@@ -25,6 +25,8 @@
                aips@50000000 { /* AIPS1 */
                        spba@50000000 {
                                esdhc@50004000 { /* ESDHC1 */
+                                       pinctrl-names = "default";
+                                       pinctrl-0 = <&pinctrl_esdhc1_1>;
                                        cd-gpios = <&gpio3 13 0>;
                                        status = "okay";
                                };
                                };
 
                                esdhc@50020000 { /* ESDHC3 */
+                                       pinctrl-names = "default";
+                                       pinctrl-0 = <&pinctrl_esdhc3_1>;
                                        cd-gpios = <&gpio3 11 0>;
                                        wp-gpios = <&gpio3 12 0>;
                                        status = "okay";
                                };
                        };
 
-                       wdog@53f98000 { /* WDOG1 */
-                               status = "okay";
-                       };
-
                        iomuxc@53fa8000 {
-                               compatible = "fsl,imx53-iomuxc-qsb";
-                               reg = <0x53fa8000 0x4000>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_hog>;
+
+                               hog {
+                                       pinctrl_hog: hoggrp {
+                                               fsl,pins = <
+                                                       1071 0x80000000 /* MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK */
+                                                       1141 0x80000000 /* MX53_PAD_GPIO_8__GPIO1_8 */
+                                                       982  0x80000000 /* MX53_PAD_PATA_DATA14__GPIO2_14 */
+                                                       989  0x80000000 /* MX53_PAD_PATA_DATA15__GPIO2_15 */
+                                                       693  0x80000000 /* MX53_PAD_EIM_DA11__GPIO3_11 */
+                                                       697  0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */
+                                                       701  0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
+                                                       868  0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
+                                                       873  0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */
+                                               >;
+                                       };
+                               };
                        };
 
                        uart1: serial@53fbc000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_uart1_1>;
                                status = "okay";
                        };
                };
 
                aips@60000000 { /* AIPS2 */
-                       sdma@63fb0000 {
-                               fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
-                       };
-
                        i2c@63fc4000 { /* I2C2 */
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_i2c2_1>;
                                status = "okay";
 
                                sgtl5000: codec@0a {
@@ -72,6 +88,8 @@
                        };
 
                        i2c@63fc8000 { /* I2C1 */
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_i2c1_1>;
                                status = "okay";
 
                                accelerometer: mma8450@1c {
                        };
 
                        audmux@63fd0000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_audmux_1>;
                                status = "okay";
                        };
 
                        ethernet@63fec000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_fec_1>;
                                phy-mode = "rmii";
                                phy-reset-gpios = <&gpio7 6 0>;
                                status = "okay";
index 0809102..06c6858 100644 (file)
                aips@50000000 { /* AIPS1 */
                        spba@50000000 {
                                esdhc@50004000 { /* ESDHC1 */
+                                       pinctrl-names = "default";
+                                       pinctrl-0 = <&pinctrl_esdhc1_1>;
                                        cd-gpios = <&gpio3 13 0>;
                                        wp-gpios = <&gpio4 11 0>;
                                        status = "okay";
                                };
 
                                esdhc@50008000 { /* ESDHC2 */
+                                       pinctrl-names = "default";
+                                       pinctrl-0 = <&pinctrl_esdhc2_1>;
                                        non-removable;
                                        status = "okay";
                                };
 
                                uart3: serial@5000c000 {
+                                       pinctrl-names = "default";
+                                       pinctrl-0 = <&pinctrl_uart3_1>;
                                        fsl,uart-has-rtscts;
                                        status = "okay";
                                };
 
                                ecspi@50010000 { /* ECSPI1 */
+                                       pinctrl-names = "default";
+                                       pinctrl-0 = <&pinctrl_ecspi1_1>;
                                        fsl,spi-num-chipselects = <2>;
                                        cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
                                        status = "okay";
                                };
 
                                esdhc@50020000 { /* ESDHC3 */
+                                       pinctrl-names = "default";
+                                       pinctrl-0 = <&pinctrl_esdhc3_1>;
                                        non-removable;
                                        status = "okay";
                                };
                        };
 
-                       wdog@53f98000 { /* WDOG1 */
-                               status = "okay";
-                       };
-
                        iomuxc@53fa8000 {
-                               compatible = "fsl,imx53-iomuxc-smd";
-                               reg = <0x53fa8000 0x4000>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_hog>;
+
+                               hog {
+                                       pinctrl_hog: hoggrp {
+                                               fsl,pins = <
+                                                       982  0x80000000 /* MX53_PAD_PATA_DATA14__GPIO2_14 */
+                                                       989  0x80000000 /* MX53_PAD_PATA_DATA15__GPIO2_15 */
+