[ARM] nommu: add ARM7TDMI core support
Hyok S. Choi [Tue, 26 Sep 2006 08:37:36 +0000 (17:37 +0900)]
This patch adds ARM7TDMI core support which has no cache and no CP15
register(no memory control unit).

Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

arch/arm/Makefile
arch/arm/mm/Kconfig
arch/arm/mm/Makefile
arch/arm/mm/proc-arm7tdmi.S [new file with mode: 0644]
include/asm-arm/cacheflush.h
include/asm-arm/proc-fns.h

index 80cee78..282333f 100644 (file)
@@ -55,6 +55,7 @@ arch-$(CONFIG_CPU_32v3)               :=-D__LINUX_ARM_ARCH__=3 -march=armv3
 # This selects how we optimise for the processor.
 tune-$(CONFIG_CPU_ARM610)      :=-mtune=arm610
 tune-$(CONFIG_CPU_ARM710)      :=-mtune=arm710
+tune-$(CONFIG_CPU_ARM7TDMI)    :=-mtune=arm7tdmi
 tune-$(CONFIG_CPU_ARM720T)     :=-mtune=arm7tdmi
 tune-$(CONFIG_CPU_ARM920T)     :=-mtune=arm9tdmi
 tune-$(CONFIG_CPU_ARM922T)     :=-mtune=arm9tdmi
index 0ac11ea..9f860aa 100644 (file)
@@ -25,6 +25,19 @@ config CPU_ARM610
          Say Y if you want support for the ARM610 processor.
          Otherwise, say N.
 
+# ARM7TDMI
+config CPU_ARM7TDMI
+       bool "Support ARM7TDMI processor"
+       select CPU_32v4T
+       select CPU_ABRT_LV4T
+       select CPU_CACHE_V4
+       help
+         A 32-bit RISC microprocessor based on the ARM7 processor core
+         which has no memory control unit and cache.
+
+         Say Y if you want support for the ARM7TDMI processor.
+         Otherwise, say N.
+
 # ARM710
 config CPU_ARM710
        bool "Support ARM710 processor" if !ARCH_CLPS7500 && ARCH_RPC
index 2d0ab19..908f6d4 100644 (file)
@@ -46,6 +46,7 @@ obj-$(CONFIG_CPU_TLB_V6)      += tlb-v6.o
 
 obj-$(CONFIG_CPU_ARM610)       += proc-arm6_7.o
 obj-$(CONFIG_CPU_ARM710)       += proc-arm6_7.o
+obj-$(CONFIG_CPU_ARM7TDMI)     += proc-arm7tdmi.o
 obj-$(CONFIG_CPU_ARM720T)      += proc-arm720.o
 obj-$(CONFIG_CPU_ARM920T)      += proc-arm920.o
 obj-$(CONFIG_CPU_ARM922T)      += proc-arm922.o
diff --git a/arch/arm/mm/proc-arm7tdmi.S b/arch/arm/mm/proc-arm7tdmi.S
new file mode 100644 (file)
index 0000000..22d7e31
--- /dev/null
@@ -0,0 +1,249 @@
+/*
+ *  linux/arch/arm/mm/proc-arm7tdmi.S: utility functions for ARM7TDMI
+ *
+ *  Copyright (C) 2003-2006 Hyok S. Choi <hyok.choi@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/linkage.h>
+#include <linux/init.h>
+#include <asm/assembler.h>
+#include <asm/asm-offsets.h>
+#include <asm/pgtable-hwdef.h>
+#include <asm/pgtable.h>
+#include <asm/procinfo.h>
+#include <asm/ptrace.h>
+
+       .text
+/*
+ * cpu_arm7tdmi_proc_init()
+ * cpu_arm7tdmi_do_idle()
+ * cpu_arm7tdmi_dcache_clean_area()
+ * cpu_arm7tdmi_switch_mm()
+ *
+ * These are not required.
+ */
+ENTRY(cpu_arm7tdmi_proc_init)
+ENTRY(cpu_arm7tdmi_do_idle)
+ENTRY(cpu_arm7tdmi_dcache_clean_area)
+ENTRY(cpu_arm7tdmi_switch_mm)
+               mov     pc, lr
+
+/*
+ * cpu_arm7tdmi_proc_fin()
+ */
+ENTRY(cpu_arm7tdmi_proc_fin)
+               mov     r0, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
+               msr     cpsr_c, r0
+               mov     pc, lr
+
+/*
+ * Function: cpu_arm7tdmi_reset(loc)
+ * Params  : loc(r0)   address to jump to
+ * Purpose : Sets up everything for a reset and jump to the location for soft reset.
+ */
+ENTRY(cpu_arm7tdmi_reset)
+               mov     pc, r0
+
+               __INIT
+
+               .type   __arm7tdmi_setup, #function
+__arm7tdmi_setup:
+               mov     pc, lr
+               .size   __arm7tdmi_setup, . - __arm7tdmi_setup
+
+               __INITDATA
+
+/*
+ * Purpose : Function pointers used to access above functions - all calls
+ *          come through these
+ */
+               .type   arm7tdmi_processor_functions, #object
+ENTRY(arm7tdmi_processor_functions)
+               .word   v4t_late_abort
+               .word   cpu_arm7tdmi_proc_init
+               .word   cpu_arm7tdmi_proc_fin
+               .word   cpu_arm7tdmi_reset
+               .word   cpu_arm7tdmi_do_idle
+               .word   cpu_arm7tdmi_dcache_clean_area
+               .word   cpu_arm7tdmi_switch_mm
+               .word   0               @ cpu_*_set_pte
+               .size   arm7tdmi_processor_functions, . - arm7tdmi_processor_functions
+
+               .section ".rodata"
+
+               .type   cpu_arch_name, #object
+cpu_arch_name:
+               .asciz  "armv4t"
+               .size   cpu_arch_name, . - cpu_arch_name
+
+               .type   cpu_elf_name, #object
+cpu_elf_name:
+               .asciz  "v4"
+               .size   cpu_elf_name, . - cpu_elf_name
+
+               .type   cpu_arm7tdmi_name, #object
+cpu_arm7tdmi_name:
+               .asciz  "ARM7TDMI"
+               .size   cpu_arm7tdmi_name, . - cpu_arm7tdmi_name
+
+               .type   cpu_triscenda7_name, #object
+cpu_triscenda7_name:
+               .asciz  "Triscend-A7x"
+               .size   cpu_triscenda7_name, . - cpu_triscenda7_name
+
+               .type   cpu_at91_name, #object
+cpu_at91_name:
+               .asciz  "Atmel-AT91M40xxx"
+               .size   cpu_at91_name, . - cpu_at91_name
+
+               .type   cpu_s3c3410_name, #object
+cpu_s3c3410_name:
+               .asciz  "Samsung-S3C3410"
+               .size   cpu_s3c3410_name, . - cpu_s3c3410_name
+
+               .type   cpu_s3c44b0x_name, #object
+cpu_s3c44b0x_name:
+               .asciz  "Samsung-S3C44B0x"
+               .size   cpu_s3c44b0x_name, . - cpu_s3c44b0x_name
+
+               .type   cpu_s3c4510b, #object
+cpu_s3c4510b_name:
+               .asciz  "Samsung-S3C4510B"
+               .size   cpu_s3c4510b_name, . - cpu_s3c4510b_name
+
+               .type   cpu_s3c4530_name, #object
+cpu_s3c4530_name:
+               .asciz  "Samsung-S3C4530"
+               .size   cpu_s3c4530_name, . - cpu_s3c4530_name
+
+               .type   cpu_netarm_name, #object
+cpu_netarm_name:
+               .asciz  "NETARM"
+               .size   cpu_netarm_name, . - cpu_netarm_name
+
+               .align
+
+               .section ".proc.info.init", #alloc, #execinstr
+
+               .type   __arm7tdmi_proc_info, #object
+__arm7tdmi_proc_info:
+               .long   0x41007700
+               .long   0xfff8ff00
+               .long   0
+               .long   0
+               b       __arm7tdmi_setup
+               .long   cpu_arch_name
+               .long   cpu_elf_name
+               .long   HWCAP_SWP | HWCAP_26BIT
+               .long   cpu_arm7tdmi_name
+               .long   arm7tdmi_processor_functions
+               .long   0
+               .long   0
+               .long   v4_cache_fns
+               .size   __arm7tdmi_proc_info, . - __arm7dmi_proc_info
+
+               .type   __triscenda7_proc_info, #object
+__triscenda7_proc_info:
+               .long   0x0001d2ff
+               .long   0x0001ffff
+               .long   0
+               .long   0
+               b       __arm7tdmi_setup
+               .long   cpu_arch_name
+               .long   cpu_elf_name
+               .long   HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
+               .long   cpu_triscenda7_name
+               .long   arm7tdmi_processor_functions
+               .long   0
+               .long   0
+               .long   v4_cache_fns
+               .size   __triscenda7_proc_info, . - __triscenda7_proc_info
+
+               .type   __at91_proc_info, #object
+__at91_proc_info:
+               .long   0x14000040
+               .long   0xfff000e0
+               .long   0
+               .long   0
+               b       __arm7tdmi_setup
+               .long   cpu_arch_name
+               .long   cpu_elf_name
+               .long   HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
+               .long   cpu_at91_name
+               .long   arm7tdmi_processor_functions
+               .long   0
+               .long   0
+               .long   v4_cache_fns
+               .size   __at91_proc_info, . - __at91_proc_info
+
+               .type   __s3c4510b_proc_info, #object
+__s3c4510b_proc_info:
+               .long   0x36365000
+               .long   0xfffff000
+               .long   0
+               .long   0
+               b       __arm7tdmi_setup
+               .long   cpu_arch_name
+               .long   cpu_elf_name
+               .long   HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
+               .long   cpu_s3c4510b_name
+               .long   arm7tdmi_processor_functions
+               .long   0
+               .long   0
+               .long   v4_cache_fns
+               .size   __s3c4510b_proc_info, . - __s3c4510b_proc_info
+
+               .type   __s3c4530_proc_info, #object
+__s3c4530_proc_info:
+               .long   0x4c000000
+               .long   0xfff000e0
+               .long   0
+               .long   0
+               b       __arm7tdmi_setup
+               .long   cpu_arch_name
+               .long   cpu_elf_name
+               .long   HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
+               .long   cpu_s3c4530_name
+               .long   arm7tdmi_processor_functions
+               .long   0
+               .long   0
+               .long   v4_cache_fns
+               .size   __s3c4530_proc_info, . - __s3c4530_proc_info
+
+               .type   __s3c3410_proc_info, #object
+__s3c3410_proc_info:
+               .long   0x34100000
+               .long   0xffff0000
+               .long   0
+               .long   0
+               b       __arm7tdmi_setup
+               .long   cpu_arch_name
+               .long   cpu_elf_name
+               .long   HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
+               .long   cpu_s3c3410_name
+               .long   arm7tdmi_processor_functions
+               .long   0
+               .long   0
+               .long   v4_cache_fns
+               .size   __s3c3410_proc_info, . - __s3c3410_proc_info
+
+               .type   __s3c44b0x_proc_info, #object
+__s3c44b0x_proc_info:
+               .long   0x44b00000
+               .long   0xffff0000
+               .long   0
+               .long   0
+               b       __arm7tdmi_setup
+               .long   cpu_arch_name
+               .long   cpu_elf_name
+               .long   HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
+               .long   cpu_s3c44b0x_name
+               .long   arm7tdmi_processor_functions
+               .long   0
+               .long   0
+               .long   v4_cache_fns
+               .size   __s3c44b0x_proc_info, . - __s3c44b0x_proc_info
index e4a2569..e7bfff2 100644 (file)
@@ -33,7 +33,7 @@
 # endif
 #endif
 
-#if defined(CONFIG_CPU_ARM720T)
+#if defined(CONFIG_CPU_ARM720T) || defined(CONFIG_CPU_ARM7TDMI)
 # ifdef _CACHE
 #  define MULTI_CACHE 1
 # else
index 1bde92c..3e8c057 100644 (file)
 #   define CPU_NAME cpu_arm6
 #  endif
 # endif
+# ifdef CONFIG_CPU_ARM7TDMI
+#  ifdef CPU_NAME
+#   undef  MULTI_CPU
+#   define MULTI_CPU
+#  else
+#   define CPU_NAME cpu_arm7tdmi
+#  endif
+# endif
 # ifdef CONFIG_CPU_ARM710
 #  ifdef CPU_NAME
 #   undef  MULTI_CPU