arm: tegra11: clocks: add CEC support
Benjamin Lu [Tue, 2 Apr 2013 06:35:09 +0000 (14:35 +0800)]
Bug 1258710

Change-Id: Iecb9b4e1449f3ef6d68b533ce9cc9177aad68e85
Signed-off-by: Benjamin Lu <benjaminl@nvidia.com>
Reviewed-on: http://git-master/r/215395
(cherry picked from commit 46c9a0aeef3fa6c7e67a38207ca3827daf98648a)
Reviewed-on: http://git-master/r/217832
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

arch/arm/mach-tegra/tegra11_clocks.c

index b71dd97..667c074 100644 (file)
@@ -6690,6 +6690,7 @@ struct clk tegra_list_clks[] = {
        PERIPH_CLK("vcp",       "tegra-avp",            "vcp",  29,     0,      250000000, mux_clk_m,                   0),
        PERIPH_CLK("bsea",      "tegra-avp",            "bsea", 62,     0,      250000000, mux_clk_m,                   0),
        PERIPH_CLK("bsev",      "tegra-aes",            "bsev", 63,     0,      250000000, mux_clk_m,                   0),
+       PERIPH_CLK("cec",       "tegra_cec",            NULL,   136,    0,      250000000, mux_clk_m,                   PERIPH_ON_APB),
        PERIPH_CLK("vde",       "vde",                  NULL,   61,     0x1c8,  600000000, mux_pllp_pllc2_c_c3_pllm_clkm,       MUX | MUX8 | DIV_U71 | DIV_U71_INT),
        PERIPH_CLK("csite",     "csite",                NULL,   73,     0x1d4,  144000000, mux_pllp_pllc_pllm_clkm,     MUX | DIV_U71 | PERIPH_ON_APB),
        PERIPH_CLK("la",        "la",                   NULL,   76,     0x1f8,  26000000,  mux_pllp_pllc_pllm_clkm,     MUX | DIV_U71 | PERIPH_ON_APB),