ARM: tegra11: dvfs: Separate dfll droop and out min rates
Alex Frid [Sun, 10 Jun 2012 00:54:39 +0000 (17:54 -0700)]
Added a separate entry for dfll minimum rate to dfll characterization
data, and applied it as dfll rate low boundary instead of dfll droop
minimum rate.

Change-Id: If6a4f77861e4912ff5cda29c77fdef1f1a334043
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/107806
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

Rebase-Id: R76aa53b0e2958aa24560ec9ea78063db7dd019c7

arch/arm/mach-tegra/tegra11_dvfs.c
arch/arm/mach-tegra/tegra_cl_dvfs.c
arch/arm/mach-tegra/tegra_cl_dvfs.h

index 0ce107b..af2841c 100644 (file)
@@ -128,17 +128,18 @@ static struct dvfs core_dvfs_table[] = {
 #endif
 };
 
-#define CL_DVFS(_speedo_id, _tune0, _tune1, _rate_min)         \
+#define CL_DVFS(_speedo_id, _tune0, _tune1, _droop_min, _out_min) \
        {                                                       \
                .dfll_clk_name  = "dfll_cpu",                   \
                .speedo_id      = _speedo_id,                   \
                .tune0          = _tune0,                       \
                .tune1          = _tune1,                       \
-               .droop_cpu_rate_min = _rate_min,                \
+               .dfll_droop_rate_min = _droop_min,              \
+               .dfll_out_rate_min = _out_min,                  \
        }
 
 static struct tegra_cl_dvfs_soc_data cl_dvfs_table[] = {
-       CL_DVFS(0, 0x030201, 0x00BB00AA, 700000000),
+       CL_DVFS(0, 0x030201, 0x000BB0AA, 640000000, 670000000),
 };
 
 int tegra_dvfs_disable_core_set(const char *arg, const struct kernel_param *kp)
index 1e42b71..3ff068f 100644 (file)
@@ -347,16 +347,15 @@ static void cl_dvfs_init_cntrl_logic(struct tegra_cl_dvfs *cld)
        cl_dvfs_writel(cld, cld->soc_data->tune1, CL_DVFS_TUNE1);
 
        /* configure droop (skipper 1) and scale (skipper 2) */
-       val = GET_DROOP_FREQ(cld->soc_data->droop_cpu_rate_min, cld->ref_rate);
+       val = GET_DROOP_FREQ(cld->soc_data->dfll_droop_rate_min, cld->ref_rate);
        val <<= CL_DVFS_DROOP_CTRL_MIN_FREQ_SHIFT;
        BUG_ON(val > CL_DVFS_DROOP_CTRL_MIN_FREQ_MASK);
        val |= (param->droop_cut_value << CL_DVFS_DROOP_CTRL_CUT_SHIFT);
        val |= (param->droop_restore_ramp << CL_DVFS_DROOP_CTRL_RAMP_SHIFT);
        cl_dvfs_writel(cld, val, CL_DVFS_DROOP_CTRL);
 
-       /* FIXME: does dfll_rate_min require separate charact entry ? */
        /* round minimum rate to request unit (ref_rate/2) boundary */
-       cld->dfll_rate_min = cld->soc_data->droop_cpu_rate_min;
+       cld->dfll_rate_min = cld->soc_data->dfll_out_rate_min;
        cld->dfll_rate_min = ROUND_MIN_RATE(cld->dfll_rate_min, cld->ref_rate);
 
        cld->last_req.freq = 0;
index 83691a0..0940632 100644 (file)
@@ -89,7 +89,8 @@ struct tegra_cl_dvfs_soc_data {
        int             speedo_id;
        u32             tune0;
        u32             tune1;
-       unsigned long   droop_cpu_rate_min;
+       unsigned long   dfll_droop_rate_min;
+       unsigned long   dfll_out_rate_min;
 };
 
 struct dfll_rate_req {