ARM: tegra: pinmux: correct clk3 & pcc1 group
Bibek Basu [Tue, 25 Nov 2014 04:38:37 +0000 (09:38 +0530)]
pcc1 & clk3_req_pee1 pins are moved to correct group

Bug 1551864

Change-Id: Icf106aac866eec02afe7e703f879e5e7f6d722be
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/655140
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>

drivers/pinctrl/pinctrl-tegra124.c

index 24ed49f..6e4ac77 100644 (file)
@@ -2016,8 +2016,8 @@ static const char * const rsvd2_groups[] = {
        "gen1_i2c_scl_pc4",
        "gen1_i2c_sda_pc5",
 
-       "clk2_out_pee0",
-       "clk2_req_pee1",
+       "clk3_out_pee0",
+       "clk3_req_pee1",
        "pc7",
        "pi5",
        "pj0",
@@ -3173,7 +3173,7 @@ static const struct tegra_pingroup tegra124_groups[] = {
        PINGROUP(sdmmc4_dat6_paa6,      SDMMC4,         SPI3,           GMI,            RSVD4,          SDMMC4,         0x3278,  N,  Y,  N),
        PINGROUP(sdmmc4_dat7_paa7,      SDMMC4,         RSVD1,          GMI,            RSVD4,          SDMMC4,         0x327c,  N,  Y,  N),
        PINGROUP(cam_mclk_pcc0,         VI,             VI_ALT1,        VI_ALT3,        SDMMC2,         VI,             0x3284,  N,  N,  N),
-       PINGROUP(pcc1,                  I2S4,           RSVD1,          RSVD3,          SDMMC2,         I2S4,           0x3288,  N,  N,  N),
+       PINGROUP(pcc1,                  I2S4,           RSVD2,          RSVD3,          SDMMC2,         I2S4,           0x3288,  N,  N,  N),
        PINGROUP(pbb0,                  VGP6,           VIMCLK2,        SDMMC2,         VIMCLK2_ALT,    VGP6,           0x328c,  N,  N,  N),
        PINGROUP(cam_i2c_scl_pbb1,      VGP1,           I2C3,           RSVD3,          SDMMC2,         VGP1,           0x3290,  Y,  N,  N),
        PINGROUP(cam_i2c_sda_pbb2,      VGP2,           I2C3,           RSVD3,          SDMMC2,         VGP2,           0x3294,  Y,  N,  N),