video: tegra: dc: synchronize dsi clock-gating
authorRakesh Iyer <riyer@nvidia.com>
Thu, 19 Jul 2012 19:44:08 +0000 (12:44 -0700)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 08:25:29 +0000 (01:25 -0700)
commitfb617c264f938fa3c49a7b1dbba49ac12b387aea
tree000ed7ca2b71db8003f5ba11115fa3da1c36645e
parent93a66ffca479104a3b27d9271e57a46067ebc59b
video: tegra: dc: synchronize dsi clock-gating

The one shot thread will clock gate the modules periodically. This will ensure
relevant paths in dc driver have an active dc clock and dsi host.

Bug 1013172

Change-Id: Ibb505e35044f31405c06cb9fa0d6fdf78aafd4a6
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/117137
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R2e928fd856cbf8f810b5fad09358df868d20c8ff
arch/arm/mach-tegra/include/mach/dc.h
drivers/video/tegra/dc/csc.c
drivers/video/tegra/dc/dc.c
drivers/video/tegra/dc/dc_priv.h
drivers/video/tegra/dc/dsi.c
drivers/video/tegra/dc/nvsd.c
drivers/video/tegra/dc/window.c