drm/i915: Sanitize BIOS debugging bits from PIPECONF
authorChris Wilson <chris@chris-wilson.co.uk>
Thu, 22 Mar 2012 15:00:50 +0000 (15:00 +0000)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Sun, 1 Apr 2012 10:23:53 +0000 (12:23 +0200)
commitf47166d2b0001fcb752b40c5a2d4db986dfbea68
tree439aa744068a97f0ab402e8e91b8d524ff0d3b8e
parentdd775ae2549217d3ae09363e3edb305d0fa19928
drm/i915: Sanitize BIOS debugging bits from PIPECONF

Quoting the BSpec from time immemorial:

  PIPEACONF, bits 28:27: Frame Start Delay (Debug)

  Used to delay the frame start signal that is sent to the display planes.
  Care must be taken to insure that there are enough lines during VBLANK
  to support this setting.

An instance of the BIOS leaving these bits set was found in the wild,
where it caused our modesetting to go all squiffy and skewiff.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47271
Reported-and-tested-by: Eva Wang <evawang@linpus.com>
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43012
Reported-and-tested-by: Carl Richell <carl@system76.com>
Cc: stable@kernel.org
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_display.c