ARM: tegra: power: Enable Tegra3 EMC bridge in suspend
authorAlex Frid <afrid@nvidia.com>
Sun, 23 Oct 2011 02:06:33 +0000 (19:06 -0700)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 07:57:56 +0000 (00:57 -0700)
commitf1973ae8446832455ac527485c78d18edbbb8edf
treee0199dff589ca56ffefb669b55c3f2b82efd9fdf
parented4a1967f3c54b7db32d8576a9ea3e576372e153
ARM: tegra: power: Enable Tegra3 EMC bridge in suspend

When dvfs is suspended core rail is set to nominal voltage underneath
clock framework. On Tegra3 DDR3 platforms low EMC rates are not safe
at high voltage that exceeds EMC bridge minimum level. Enabling EMC
bridge during suspend for Tegra3 DDR3 platforms guarantees safe EMC
operations at high voltage.

(cherry picked from commit 677c01d3d9edaf7e91f09de5025e7864b6a288d8)
(cherry picked from commit 75710c173caa46f2e3cd24e48cc82f030cdb52d9)

Change-Id: I1e300c18867295b1394184da39eeffcab43de4c7
Reviewed-on: http://git-master/r/62030
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

Rebase-Id: R2a3a91b370d2517e89e1d30f27f9fd41a9a81267
arch/arm/mach-tegra/tegra3_emc.c