ARM: tegra11: dvfs: Add CPU rail DFLL mode trip-point
authorAlex Frid <afrid@nvidia.com>
Thu, 6 Dec 2012 07:41:19 +0000 (23:41 -0800)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 19:46:18 +0000 (12:46 -0700)
commite4cd9fe71d68e3570b6a5a05f84844897f9aee06
tree94cd7b06d3e35771d5873a91dda3a2e8e7a9e93b
parent042d5a13220db6ad0e67e3cf6d63696ba1457b24
ARM: tegra11: dvfs: Add CPU rail DFLL mode trip-point

Added CPU rail DFLL mode trip-point necessary to limit minimum CPU
voltage at cold temperature. The respective cooling device is not
implemented, yet.

Bug 1177204

Change-Id: I6abe1bc3ace81935c25968385af1998052455da0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168999
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
arch/arm/mach-tegra/board-dalmore-sensors.c
arch/arm/mach-tegra/board-pluto-sensors.c
arch/arm/mach-tegra/board-roth-sensors.c
arch/arm/mach-tegra/dvfs.c
arch/arm/mach-tegra/dvfs.h
arch/arm/mach-tegra/tegra11_dvfs.c