video: tegra: host: Work towards enabling 3d power gating
authorShashank Garg <sgarg@nvidia.com>
Tue, 17 May 2011 11:25:23 +0000 (16:25 +0530)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 07:55:06 +0000 (00:55 -0700)
commite4b9760e58951d1a0dbf2fa30ebc95d82baac039
treef9d7e304a4d135db1059a1d6aa02aef411521f01
parent2d174a053051dc258553c8f0a5db23cc14149e0c
video: tegra: host: Work towards enabling 3d power gating

Fixed clock enable/disable balance issue. Added code for power gating 3d1.

Power gating still disabled as it won't work for T20 or T30 A01.

Original-Change-Id: Idcc5fd9d21d43c796bbeeac378a46f9eca3ab1c9
Reviewed-on: http://git-master/r/31142
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Shashank Garg <sgarg@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: Rd1a0e542b625f569e33c74c2edcaed4ff2d6fd3e
arch/arm/mach-tegra/common.c