serial: tegra: correct error handling sequence to avoid system hang
authorShardar Shariff Md <smohammed@nvidia.com>
Tue, 2 Aug 2016 13:35:26 +0000 (18:35 +0530)
committerWinnie Hsu <whsu@nvidia.com>
Fri, 5 Aug 2016 18:34:51 +0000 (11:34 -0700)
commite34d583b476c3ce99f8eb720f95ad3562da3318a
tree719f5f941a0da44d55652af816c7abc78ffa24cc
parentd11086cfab48a41ffee94bd01aad98b0c527d09f
serial: tegra: correct error handling sequence to avoid system hang

- Correct the error handling sequence to avoid FIFO errors
i.e handle break error first followed by other errors as
handling break error will clear other errors
- Handle break error by fifo flush as per IAS
- serial: tegra: keep rx irq disabled if there are spurious
errors and then tty buffer is exhausted and re-enable the
interrupts after 500msec.

Bug 1785924

Change-Id: I68c8322e0ff6808ebd0d38141853f88900b912b2
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/1195970
(cherry picked from commit 16317988c222e831346902e28bfce5375bea3df2)
Reviewed-on: http://git-master/r/1198554
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Tested-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
drivers/tty/serial/serial-tegra.c