security: tf_driver: integrate latest TL release
authorKaran Jhavar <kjhavar@nvidia.com>
Sat, 21 Jul 2012 02:42:55 +0000 (19:42 -0700)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 19:14:35 +0000 (12:14 -0700)
commitcdee5f91d6564813eb004286826e627f4bb1da54
tree2452d41816bc44e6cc13fd5f8320556e4e105766
parent378d7044516554eec3ec154c9901b0bb915a7550
security: tf_driver: integrate latest TL release

Tegra 3 version: TF_TEGRA3_AB01.11.35578, TF_TEGRA3_AB01.11p1.35578
                 TF_TEGRA3_AB01.11p2.36386, TF_TEGRA3_AB01.11p3.36518
         TF_TEGRA3_AB01.11p4.36577, TF_TEGRA3_AB01.11p5.36677

1)Add memory profiling tool to debug secure services's stack and heap
2)Add support to enable dynamic clock gating feature in PL310 register
3)TEE client API at kernel level
4)Stable FIQ debugging (SDK ver 1.09)
5)clrex stability change
6)GIC controller stability settings
7)Fix LP1
8)Fix floating pt support

Bug 1021831

Change-Id: I5c2a693a27dc591b62863aa0fe4ff65163e67aba
Signed-off-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-on: http://git-master/r/117515
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Hyung Taek Ryoo <hryoo@nvidia.com>
Reviewed-by: Marvin Zhang <mzhang@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Rebase-Id: R0eaf29c4f060f0ba51d39fd8d9372c2c87d14dd4
security/tf_driver/s_version.h