ARM: tegra: power: Fix LP2/LP3 states accounting on Tegra3
authorAlex Frid <afrid@nvidia.com>
Thu, 29 Sep 2011 03:41:30 +0000 (20:41 -0700)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 07:57:48 +0000 (00:57 -0700)
commitca6aaa3d6f8a2a5e0385d0e385dd57c026231aa8
treedcdaeecdd01e3acbbe504af002ee9420886a2f21
parenta0c672ac5dbde01ed160cee18fc6073ae958a6c5
ARM: tegra: power: Fix LP2/LP3 states accounting on Tegra3

- Made sure LP3 state is reported as last entered state to cpuidle
governor in case when LP3 is entered as a fall back from LP2 path.

- Accumulate idle time designated to LP2 state by cpuidle governor
and time actually spent in LP2 by each CPU separately. Update LP2
statistic output.

Change-Id: I55b461e94925ba7a41112756ed958f81fc0bc882
Reviewed-on: http://git-master/r/60381
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>

Rebase-Id: R240873bd1de225696d392ac5ba2c3d517c59d86e
arch/arm/mach-tegra/cpuidle-t3.c
arch/arm/mach-tegra/cpuidle.c