arm: tegra: curtain pllx freq to its max value
authorBibek Basu <bbasu@nvidia.com>
Mon, 17 Apr 2017 16:44:53 +0000 (21:44 +0530)
committerWinnie Hsu <whsu@nvidia.com>
Fri, 5 May 2017 21:56:54 +0000 (14:56 -0700)
commitc9c824bfb712f5104bbbb2f32a771a6c92493581
tree728fccf4b39b697e00fa5bccd5dc29ac6e662dbc
parentb05568ec3820faf539b307deb4ae8ac036994cf5
arm: tegra: curtain pllx freq to its max value

This patch fixes pllx max value to 1530 and 1836Mhz
based on embedded clok settings considering aging factor
for CD575MI 24x7 and CD575MI 4/4/16 config

Bug 1900076

Change-Id: I9c6a769787fc04eac7ce4548e1a37a9a76972a6c
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/1464315
GVS: Gerrit_Virtual_Submit
Reviewed-by: Peter Chiang <pchiang@nvidia.com>
arch/arm/mach-tegra/tegra12_dvfs.c