tegra: adsp: dfs: align policy min max with dfs table
authorPuneet Saxena <puneets@nvidia.com>
Tue, 21 Apr 2015 18:28:18 +0000 (23:28 +0530)
committerSachin Nikam <snikam@nvidia.com>
Fri, 22 May 2015 04:54:21 +0000 (21:54 -0700)
commitbf81dc5b783df4c59fc9ea1c01e0ec24abe59905
treef96a1e7af85cf46a6d50d5aa0fa2de46ebaf3f94
parenta2940c0ebbbf62f721f646b360fe514e898626bd
tegra: adsp: dfs: align policy min max with dfs table

Presently, policy min/max is assigned with adsp cpu min/max
frequency. ADSP cpu min/max freq defined in clock framework
is multiple of 12.8 MHz. However, for calculating ADSP timer
scaler value, it needs to be multiple of 51.2MHz.

It aligns policy min/max with adsp dfs table.

Bug 200098842

Change-Id: Ic5e3da10ce7949f27338a64aa2749a173192aadc
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/733687
(cherry picked from commit 6b81ee3002e7f0253e1e7e809a523274de38884e)
Reviewed-on: http://git-master/r/738429
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>
drivers/platform/tegra/nvadsp/adsp_dfs.c