ARM: tegra: t114: Pinmux LP0 entry/exit sequence
authorAshwini Ghuge <aghuge@nvidia.com>
Tue, 5 Jun 2012 08:50:11 +0000 (13:50 +0530)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 19:11:45 +0000 (12:11 -0700)
commitb4463222b9aba75946b3b11921cc32d68d4ba38a
tree93eb6afce33173030616fd6ddc4c6ff24934730a
parentb261417f82c2de970f25ee78bb2a5a7a4276b719
ARM: tegra: t114: Pinmux LP0 entry/exit sequence

Updating pinmux LP0 entry/exit sequence
to prevent pad glitches

Bug 988086

Change-Id: I68040ee8c744ae878f9aa96c2a2745fcdb94b650
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/105172
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

Rebase-Id: R2413e61ac8acb71b4f352a89d527ae687a43833c
arch/arm/mach-tegra/pinmux-t11-tables.c
arch/arm/mach-tegra/pm.c