ARM: tegra12: dvfs: Don't apply dfll min voltage in pll mode
authorBhanu Chetlapalli <bchetlapalli@nvidia.com>
Mon, 5 Nov 2012 18:56:26 +0000 (10:56 -0800)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 20:21:21 +0000 (13:21 -0700)
commita930e4e2301c9fb76feeca025af861bdc4993a07
tree38f884cf7c94733dd66f90ec3edccafa0c25c7d5
parent389e9f0311b390777b56414a9b900f41c1acaf9b
ARM: tegra12: dvfs: Don't apply dfll min voltage in pll mode

28fa89d56de8b0691c684727f58e79e0d42e42b4: Don't apply dfll min voltage in pll mode

Change-Id: I54e0dc1c958f5214ef492c6f9dbfc3a2fb393cee
Signed-off-by: Bhanu Chetlapalli <bchetlapalli@nvidia.com>
Reviewed-on: http://git-master/r/161402
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Chao Xu <cxu@nvidia.com>
arch/arm/mach-tegra/tegra12_dvfs.c