ARM: Tegra: Pinmux: Fix drive strength configuration
authorPavan Kunapuli <pkunapuli@nvidia.com>
Fri, 2 Sep 2011 10:02:00 +0000 (15:02 +0530)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 07:57:19 +0000 (00:57 -0700)
commita76673ea7d9abddc292263e3d0720ea5c1ead0c9
treedec0cff15052cce5e318ec1c6c7cee2c1d6fb1e7
parent7c233e606c1952772997b17db2efae10c406b91a
ARM: Tegra: Pinmux: Fix drive strength configuration

In T30, different pad ctrl group registers have
different pull up and pull down drive strength field
offsets and maximum values. Modified drive_strength
structure to be able to pass the offsets and masks of
each group to ensure that drive strengths are properly
configured.

Bug 870369

Original-Change-Id: Ib1872417542236c95c3b41a1ad860ef8418f5704
Reviewed-on: http://git-master/r/49872
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R4889bbb8bc0e5fef57d98bc68cd0116a9be3fdbd
arch/arm/mach-tegra/include/mach/pinmux.h
arch/arm/mach-tegra/pinmux-tegra20-tables.c
arch/arm/mach-tegra/pinmux-tegra30-tables.c
arch/arm/mach-tegra/pinmux.c