ARM: tegra: dvfs: Update CPU thermal control in dfll mode
authorAlex Frid <afrid@nvidia.com>
Sun, 17 Feb 2013 06:22:34 +0000 (22:22 -0800)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 20:02:38 +0000 (13:02 -0700)
commit79826928f8a605d66c41c50b5427fe49ec4d052f
treea776a5a55a0216af7ebd66f069898f007fea9335
parent1712d19846b87b15f9640c6cf3cf5ace670ad67b
ARM: tegra: dvfs: Update CPU thermal control in dfll mode

During CPU cluster switch set CPU rail cold temperature limit in dfll
mode before switching to G CPU. Thus, the limit may be set only if
temperature is already low (before this commit the limit was set when
switching to LP CPU, and as such must be set unconditionally for the
worst case of cold temperature).

Made sure dfll and pll mode cooling devices have the same trip-points,
and dfll cooling device is enabled only when cold temperature voltage
limit is below DFLL minimum voltage.

Change-Id: Ia26b6caf3fbbd56f723661513474babad64b5d97
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/201831
(cherry picked from commit 92de167904c19a9c353de0ed22a3422549effae8)
Reviewed-on: http://git-master/r/208920
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
arch/arm/mach-tegra/dvfs.c
arch/arm/mach-tegra/tegra11_clocks.c
arch/arm/mach-tegra/tegra11_dvfs.c