mmc: sdhci: set "clk" back to zero before configuring clock rate
authorVishal Singh <vissingh@nvidia.com>
Wed, 10 Apr 2013 09:23:08 +0000 (14:23 +0530)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 20:08:40 +0000 (13:08 -0700)
commit7452737cb1c89006bc843b3638e7a9bdb63d3f0a
tree210e04b37b53a8fbf0e8a7dd15cdca3323835950
parent0892ced6b8ec3ab890779c791535239db31b1f7d
mmc: sdhci: set "clk" back to zero before configuring clock rate

When we have clock gating disabled, as in the case of SDIO card
being used for WiFi, SDHCI_CLOCK_CONTROL register doesn't get
updated with intended value.
This is because the variable "clk", which is used to store the
register value, contains old value (corresponding to init
frequency of 400 KHz).
Setting this to zero so that clock rates can be configured
correctly.

Bug 1246186.
Bug 1256237.

Change-Id: I3f742afdf8aec76ffdbf3601ec42b66a9b22390a
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/218171
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
drivers/mmc/host/sdhci.c