gpu: nvgpu: Update GM20B GPCPLL bypass operations
authorAlex Frid <afrid@nvidia.com>
Thu, 4 Sep 2014 04:01:10 +0000 (21:01 -0700)
committerYu-Huan Hsu <yhsu@nvidia.com>
Tue, 16 Sep 2014 19:05:49 +0000 (12:05 -0700)
commit72c08c910e452577f5c3178bc37d246a5792b9e6
treeaa309116174065bc916d1b0f33433ae0d569d4c2
parentf7ef2ce2fad9085f051ecfddb443d8bd4a4e05ca
gpu: nvgpu: Update GM20B GPCPLL bypass operations

- Skipped PLL re-locking if only post-divider is changing under bypass
- Added 1us delay after switch to bypass clock source
- Changed wait for lock under bypass resolution from 2us to 1us

Change-Id: I259581c00c417752263ef3b2ea057200bb78ecbf
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/495473
(cherry picked from commit d90a19b8bf59c608a2a3a891b34ca714dfe990e9)
Reviewed-on: http://git-master/r/499192
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
drivers/gpu/nvgpu/gm20b/clk_gm20b.c