tegra: adsp: dfs: align policy min max with dfs table
authorPuneet Saxena <puneets@nvidia.com>
Tue, 21 Apr 2015 18:28:18 +0000 (23:28 +0530)
committermobile promotions <svcmobile_promotions@nvidia.com>
Wed, 29 Apr 2015 01:18:57 +0000 (18:18 -0700)
commit6b81ee3002e7f0253e1e7e809a523274de38884e
tree9c98a44ab13f5b17c8b0fc59886b2b4288a23573
parent658f7c6ffb51fc76825726e3453983e927473341
tegra: adsp: dfs: align policy min max with dfs table

Presently, policy min/max is assigned with adsp cpu min/max
frequency. ADSP cpu min/max freq defined in clock framework
is multiple of 12.8 MHz. However, for calculating ADSP timer
scaler value, it needs to be multiple of 51.2MHz.

It aligns policy min/max with adsp dfs table.

Bug 200098842

Change-Id: Ic5e3da10ce7949f27338a64aa2749a173192aadc
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/733687
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
drivers/platform/tegra/nvadsp/adsp_dfs.c