ARM: tegra: ardbeg: Mask HS200,SDR104,SDR50 modes
authorPavan Kunapuli <pkunapuli@nvidia.com>
Wed, 26 Jun 2013 12:37:26 +0000 (17:37 +0530)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 20:29:02 +0000 (13:29 -0700)
commit651c583267fced57b2c69262feafc687deeb3265
treea05692d4e7da50adde9b83847da724f6165b6a96
parentbd95ed4dac4247fc3ccc3645613a9f73cef1260e
ARM: tegra: ardbeg: Mask HS200,SDR104,SDR50 modes

Masking HS200, SDR104, SDR50 modes. These modes will be enabled once
the validation on silicon is done.
Remove default pm_flags settings for SDMMC1. The Wifi client driver
would set the required flags during suspend.
Pass card detect pin for SDMMC3 through platform data.
Updating SDIO1, SDIO3 drive strengths

Change-Id: I8a776b7f5f4e448e5f2b751ecda965e4bd01bf21
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/242428
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
arch/arm/mach-tegra/board-ardbeg-pinmux.c
arch/arm/mach-tegra/board-ardbeg-sdhci.c