i2c: tegra: override slcg for Master core logic
authorShardar Shariff Md <smohammed@nvidia.com>
Tue, 3 Nov 2015 21:09:10 +0000 (02:09 +0530)
committermobile promotions <svcmobile_promotions@nvidia.com>
Tue, 26 Jul 2016 23:05:56 +0000 (16:05 -0700)
commit57127ec8fbdb77a946e3f362c172f6d2aa53fa23
tree07f5161c9263e7ee55652e703cdda88358d19653
parent267346553642163967821d4022312cbf2b73bdcb
i2c: tegra: override slcg for Master core logic

- override(disable) 2nd-level clock for I2C master
core logic i.e keeping 2nd-level clock always ON
when bus is operating in multi-master mode.

Bug 200146630

Change-Id: I04840c2a0453ecbf5c10a9ea0e0f3d0523c5071a
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/842347
(cherry picked from commit 115380a0fff228cb606e135e703d87c297070835)
Reviewed-on: http://git-master/r/1190655
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
drivers/i2c/busses/i2c-tegra.c
include/linux/i2c-tegra.h