gpu: nvgpu: Update GM20b GPCPLL initial configuration
authorAlex Frid <afrid@nvidia.com>
Fri, 25 Jul 2014 06:18:20 +0000 (23:18 -0700)
committerYu-Huan Hsu <yhsu@nvidia.com>
Mon, 28 Jul 2014 20:10:31 +0000 (13:10 -0700)
commit4e22c2344a09e098c9acfa485e44324a08668a07
treec10fb096a78666fd6259920b1dbb50bf11352afd
parent095cf35d00848a0586d9e4581f8e6db3f5320431
gpu: nvgpu: Update GM20b GPCPLL initial configuration

- Set initial output rate to 1/3 of VCO minimum.
- Cleared global BYPASSCTRL to get ready for enabling PLL (this
  won't bring PLL out of bypass, since SEL_VCO register is cleared).
- Added debugfs nodes for BYPASSCTRL and SEL_VCO state.

Bug 1450787

Change-Id: I10b068b006b7e9fbdf7854eff0cfd5cfdc1dd546
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/447750
GVS: Gerrit_Virtual_Submit
Reviewed-by: Hoang Pham <hopham@nvidia.com>
Tested-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
drivers/gpu/nvgpu/gm20b/clk_gm20b.c