tegra: bonaire: set SDMMC max clk support to 26MHz
authorrrajk <rrajk@nvidia.com>
Mon, 18 Feb 2013 06:51:51 +0000 (11:51 +0530)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 20:22:44 +0000 (13:22 -0700)
commit4a91c302396a8c84edc14251c6e3634e4eb627dc
tree4fced6163b0c116da781ebc75ab33e5e7d8c7800
parentdbdde55eb0991a8e612f95101a96d378732db3fe
tegra: bonaire: set SDMMC max clk support to 26MHz

As 26MHz supply is available to SDMMC controller,
this hack is necessary to handle ambiguity of clk setting
for SDMMC controller. Setting to 26MHZ is handled in our driver

Bug 1218505

Change-Id: I049feb7515c642e6e09c3066ebfb2ce3d1fa96a2
Signed-off-by: rrajk <rrajk@nvidia.com>
Reviewed-on: http://git-master/r/201623
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
arch/arm/mach-tegra/board-bonaire.c