perf, arch: Rework perf_event_index()
authorPeter Zijlstra <a.p.zijlstra@chello.nl>
Sun, 20 Nov 2011 19:36:02 +0000 (20:36 +0100)
committerIngo Molnar <mingo@elte.hu>
Wed, 21 Dec 2011 10:01:07 +0000 (11:01 +0100)
commit35edc2a5095efb189e60dc32bbb9d2663aec6d24
tree3296a0dc54c4eb9d9ae5e0715d7521ecbb6d6f7e
parent9a0f05cb36888550d1509d60aa55788615abea44
perf, arch: Rework perf_event_index()

Put the logic to compute the event index into a per pmu method. This
is required because the x86 rules are weird and wonderful and don't
match the capabilities of the current scheme.

AFAIK only powerpc actually has a usable userspace read of the PMCs
but I'm not at all sure anybody actually used that.

ARM is restored to the default since it currently does not support
userspace access at all. And all software events are provided with a
method that reports their index as 0 (disabled).

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Michael Cree <mcree@orcon.net.nz>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: Anton Blanchard <anton@samba.org>
Cc: Eric B Munson <emunson@mgebm.net>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: David S. Miller <davem@davemloft.net>
Cc: Richard Kuo <rkuo@codeaurora.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Arun Sharma <asharma@fb.com>
Link: http://lkml.kernel.org/n/tip-dfydxodki16lylkt3gl2j7cw@git.kernel.org
Signed-off-by: Ingo Molnar <mingo@elte.hu>
arch/arm/include/asm/perf_event.h
arch/frv/include/asm/perf_event.h
arch/hexagon/include/asm/perf_event.h
arch/powerpc/include/asm/perf_event_server.h
arch/powerpc/kernel/perf_event.c
arch/s390/include/asm/perf_event.h
arch/x86/include/asm/perf_event.h
include/linux/perf_event.h
kernel/events/core.c
kernel/events/hw_breakpoint.c