ARM: tegra: Clean up flow controller CSR macros
authorBo Yan <byan@nvidia.com>
Sat, 19 May 2012 02:55:18 +0000 (19:55 -0700)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 19:11:27 +0000 (12:11 -0700)
commit04d92858c7aefe33a414a3790da0c724ed17dddc
tree525c083c50f8a38251d4f4f6dcb3d4f065a73c45
parent175688b060b343288a9e4dd93e142e695d0aa6d9
ARM: tegra: Clean up flow controller CSR macros

Group flow controller macros for CSR register in one place in sleep.h
Also strip "CPU" out of macro names because the corresponding COP CSR
register has only one field INTR_FLAG which is at bit 15, same as CPU
CSR, so there is no confusion here.

Change-Id: Ib3dea0bd3e9051d1e7b9048abc4afde5ddc8bab5
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/103478
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Jin Qian <jqian@nvidia.com>

Rebase-Id: R63c198f17e573818b8d44482c46cb61516bf1267
arch/arm/mach-tegra/cpuidle.c
arch/arm/mach-tegra/pm-t3.c
arch/arm/mach-tegra/pm.h
arch/arm/mach-tegra/sleep.h