ARM: tegra11: clock: Round down CPU rate when run on pll

ARM: tegra11: clock: Round down CPU rate when run on pll

Maximum rate for CPU clock is determined When dfll is CPU clock
source. It cannot be achieved if CPU is running on pll. Round
down CPU rate request in the latter case, respectively, to avoid
dvfs max voltage violation errors.

Reviewed-on: http://git-master/r/133968
(cherry picked from commit 628231ca70f92a2f7a772a3e2669faa5ca09a179)

Change-Id: Ia827b07af7d5113f08f0575176e6de7db3a0f370
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143127
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Rebase-Id: R63e0439b05949b12665007941eac453f3bc4b3ca