target: Fix >= v3.9+ regression in PR APTPL + ALUA metadata write-out
[linux-3.10.git] / drivers / ide / sl82c105.c
index 0924abf..8755df3 100644 (file)
 
 #define DRV_NAME "sl82c105"
 
-#undef DEBUG
-
-#ifdef DEBUG
-#define DBG(arg) printk arg
-#else
-#define DBG(fmt,...)
-#endif
 /*
  * SL82C105 PCI config register 0x40 bits.
  */
@@ -61,8 +54,7 @@ static unsigned int get_pio_timings(ide_drive_t *drive, u8 pio)
        if (cmd_off == 0)
                cmd_off = 1;
 
-       if ((pio > 2 || ata_id_has_iordy(drive->id)) &&
-           !(pio > 4 && ata_id_is_cfa(drive->id)))
+       if (ide_pio_need_iordy(drive, pio))
                iordy = 0x40;
 
        return (cmd_on - 1) << 8 | (cmd_off - 1) | iordy;
@@ -71,11 +63,13 @@ static unsigned int get_pio_timings(ide_drive_t *drive, u8 pio)
 /*
  * Configure the chipset for PIO mode.
  */
-static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio)
+static void sl82c105_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
 {
-       struct pci_dev *dev     = to_pci_dev(drive->hwif->dev);
+       struct pci_dev *dev     = to_pci_dev(hwif->dev);
+       unsigned long timings   = (unsigned long)ide_get_drivedata(drive);
        int reg                 = 0x44 + drive->dn * 4;
        u16 drv_ctrl;
+       const u8 pio            = drive->pio_mode - XFER_PIO_0;
 
        drv_ctrl = get_pio_timings(drive, pio);
 
@@ -83,8 +77,9 @@ static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio)
         * Store the PIO timings so that we can restore them
         * in case DMA will be turned off...
         */
-       drive->drive_data &= 0xffff0000;
-       drive->drive_data |= drv_ctrl;
+       timings &= 0xffff0000;
+       timings |= drv_ctrl;
+       ide_set_drivedata(drive, (void *)timings);
 
        pci_write_config_word(dev, reg,  drv_ctrl);
        pci_read_config_word (dev, reg, &drv_ctrl);
@@ -97,13 +92,12 @@ static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio)
 /*
  * Configure the chipset for DMA mode.
  */
-static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed)
+static void sl82c105_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
 {
        static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200};
+       unsigned long timings = (unsigned long)ide_get_drivedata(drive);
        u16 drv_ctrl;
-
-       DBG(("sl82c105_tune_chipset(drive:%s, speed:%s)\n",
-            drive->name, ide_xfer_verbose(speed)));
+       const u8 speed = drive->dma_mode;
 
        drv_ctrl = mwdma_timings[speed - XFER_MW_DMA_0];
 
@@ -111,8 +105,19 @@ static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed)
         * Store the DMA timings so that we can actually program
         * them when DMA will be turned on...
         */
-       drive->drive_data &= 0x0000ffff;
-       drive->drive_data |= (unsigned long)drv_ctrl << 16;
+       timings &= 0x0000ffff;
+       timings |= (unsigned long)drv_ctrl << 16;
+       ide_set_drivedata(drive, (void *)timings);
+}
+
+static int sl82c105_test_irq(ide_hwif_t *hwif)
+{
+       struct pci_dev *dev     = to_pci_dev(hwif->dev);
+       u32 val, mask           = hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA;
+
+       pci_read_config_dword(dev, 0x40, &val);
+
+       return (val & mask) ? 1 : 0;
 }
 
 /*
@@ -183,9 +188,8 @@ static void sl82c105_dma_start(ide_drive_t *drive)
        struct pci_dev *dev     = to_pci_dev(hwif->dev);
        int reg                 = 0x44 + drive->dn * 4;
 
-       DBG(("%s(drive:%s)\n", __func__, drive->name));
-
-       pci_write_config_word(dev, reg, drive->drive_data >> 16);
+       pci_write_config_word(dev, reg,
+                             (unsigned long)ide_get_drivedata(drive) >> 16);
 
        sl82c105_reset_host(dev);
        ide_dma_start(drive);
@@ -195,8 +199,6 @@ static void sl82c105_dma_clear(ide_drive_t *drive)
 {
        struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
 
-       DBG(("sl82c105_dma_clear(drive:%s)\n", drive->name));
-
        sl82c105_reset_host(dev);
 }
 
@@ -204,13 +206,10 @@ static int sl82c105_dma_end(ide_drive_t *drive)
 {
        struct pci_dev *dev     = to_pci_dev(drive->hwif->dev);
        int reg                 = 0x44 + drive->dn * 4;
-       int ret;
+       int ret                 = ide_dma_end(drive);
 
-       DBG(("%s(drive:%s)\n", __func__, drive->name));
-
-       ret = ide_dma_end(drive);
-
-       pci_write_config_word(dev, reg, drive->drive_data);
+       pci_write_config_word(dev, reg,
+                             (unsigned long)ide_get_drivedata(drive));
 
        return ret;
 }
@@ -224,8 +223,6 @@ static void sl82c105_resetproc(ide_drive_t *drive)
        struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
        u32 val;
 
-       DBG(("sl82c105_resetproc(drive:%s)\n", drive->name));
-
        pci_read_config_dword(dev, 0x40, &val);
        val |= (CTRL_P1F16 | CTRL_P0F16);
        pci_write_config_dword(dev, 0x40, val);
@@ -276,8 +273,6 @@ static int init_chipset_sl82c105(struct pci_dev *dev)
 {
        u32 val;
 
-       DBG(("init_chipset_sl82c105()\n"));
-
        pci_read_config_dword(dev, 0x40, &val);
        val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
        pci_write_config_dword(dev, 0x40, val);
@@ -289,6 +284,7 @@ static const struct ide_port_ops sl82c105_port_ops = {
        .set_pio_mode           = sl82c105_set_pio_mode,
        .set_dma_mode           = sl82c105_set_dma_mode,
        .resetproc              = sl82c105_resetproc,
+       .test_irq               = sl82c105_test_irq,
 };
 
 static const struct ide_dma_ops sl82c105_dma_ops = {
@@ -303,7 +299,7 @@ static const struct ide_dma_ops sl82c105_dma_ops = {
        .dma_sff_read_status    = ide_dma_sff_read_status,
 };
 
-static const struct ide_port_info sl82c105_chipset __devinitdata = {
+static const struct ide_port_info sl82c105_chipset = {
        .name           = DRV_NAME,
        .init_chipset   = init_chipset_sl82c105,
        .enablebits     = {{0x40,0x01,0x01}, {0x40,0x10,0x10}},
@@ -317,7 +313,7 @@ static const struct ide_port_info sl82c105_chipset __devinitdata = {
        .mwdma_mask     = ATA_MWDMA2,
 };
 
-static int __devinit sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id)
+static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 {
        struct ide_port_info d = sl82c105_chipset;
        u8 rev = sl82c105_bridge_revision(dev);