[PATCH] ARM: fixup irqflags breakage after ARM genirq merge
[linux-3.10.git] / arch / arm / mach-versatile / core.c
index 7e4bdd0..a432539 100644 (file)
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/device.h>
 #include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
 #include <linux/sysdev.h>
 #include <linux/interrupt.h>
+#include <linux/amba/bus.h>
+#include <linux/amba/clcd.h>
 
 #include <asm/system.h>
 #include <asm/hardware.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/leds.h>
-#include <asm/hardware/amba.h>
-#include <asm/hardware/amba_clcd.h>
 #include <asm/hardware/arm_timer.h>
 #include <asm/hardware/icst307.h>
+#include <asm/hardware/vic.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
 #define VA_VIC_BASE            __io_address(VERSATILE_VIC_BASE)
 #define VA_SIC_BASE            __io_address(VERSATILE_SIC_BASE)
 
-static void vic_mask_irq(unsigned int irq)
-{
-       irq -= IRQ_VIC_START;
-       writel(1 << irq, VA_VIC_BASE + VIC_IRQ_ENABLE_CLEAR);
-}
-
-static void vic_unmask_irq(unsigned int irq)
-{
-       irq -= IRQ_VIC_START;
-       writel(1 << irq, VA_VIC_BASE + VIC_IRQ_ENABLE);
-}
-
-static struct irqchip vic_chip = {
-       .ack    = vic_mask_irq,
-       .mask   = vic_mask_irq,
-       .unmask = vic_unmask_irq,
-};
-
 static void sic_mask_irq(unsigned int irq)
 {
        irq -= IRQ_SIC_START;
@@ -126,43 +109,11 @@ sic_handle_irq(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
 
 void __init versatile_init_irq(void)
 {
-       unsigned int i, value;
-
-       /* Disable all interrupts initially. */
+       unsigned int i;
 
-       writel(0, VA_VIC_BASE + VIC_INT_SELECT);
-       writel(0, VA_VIC_BASE + VIC_IRQ_ENABLE);
-       writel(~0, VA_VIC_BASE + VIC_IRQ_ENABLE_CLEAR);
-       writel(0, VA_VIC_BASE + VIC_IRQ_STATUS);
-       writel(0, VA_VIC_BASE + VIC_ITCR);
-       writel(~0, VA_VIC_BASE + VIC_IRQ_SOFT_CLEAR);
-
-       /*
-        * Make sure we clear all existing interrupts
-        */
-       writel(0, VA_VIC_BASE + VIC_VECT_ADDR);
-       for (i = 0; i < 19; i++) {
-               value = readl(VA_VIC_BASE + VIC_VECT_ADDR);
-               writel(value, VA_VIC_BASE + VIC_VECT_ADDR);
-       }
-
-       for (i = 0; i < 16; i++) {
-               value = readl(VA_VIC_BASE + VIC_VECT_CNTL0 + (i * 4));
-               writel(value | VICVectCntl_Enable | i, VA_VIC_BASE + VIC_VECT_CNTL0 + (i * 4));
-       }
-
-       writel(32, VA_VIC_BASE + VIC_DEF_VECT_ADDR);
-
-       for (i = IRQ_VIC_START; i <= IRQ_VIC_END; i++) {
-               if (i != IRQ_VICSOURCE31) {
-                       set_irq_chip(i, &vic_chip);
-                       set_irq_handler(i, do_level_IRQ);
-                       set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
-               }
-       }
+       vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0);
 
-       set_irq_handler(IRQ_VICSOURCE31, sic_handle_irq);
-       vic_unmask_irq(IRQ_VICSOURCE31);
+       set_irq_chained_handler(IRQ_VICSOURCE31, sic_handle_irq);
 
        /* Do second interrupt controller */
        writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
@@ -876,7 +827,7 @@ static unsigned long versatile_gettimeoffset(void)
        ticks2 = readl(TIMER0_VA_BASE + TIMER_VALUE) & 0xffff;
        do {
                ticks1 = ticks2;
-               status = __raw_readl(VA_IC_BASE + VIC_IRQ_RAW_STATUS);
+               status = __raw_readl(VA_IC_BASE + VIC_RAW_STATUS);
                ticks2 = readl(TIMER0_VA_BASE + TIMER_VALUE) & 0xffff;
        } while (ticks2 > ticks1);
 
@@ -918,7 +869,7 @@ static irqreturn_t versatile_timer_interrupt(int irq, void *dev_id, struct pt_re
 
 static struct irqaction versatile_timer_irq = {
        .name           = "Versatile Timer Tick",
-       .flags          = SA_INTERRUPT | SA_TIMER,
+       .flags          = IRQF_DISABLED | IRQF_TIMER,
        .handler        = versatile_timer_interrupt,
 };