ARM: tegra: powermon: Fix copyrights from GPLv3 to GPLv2
[linux-3.10.git] / arch / arm / mach-tegra / timer-t2.c
index b210161..45f12ec 100644 (file)
@@ -31,7 +31,7 @@
 #include <linux/export.h>
 
 #include <asm/mach/time.h>
-#include <asm/smp_twd.h>
+#include <asm/localtimer.h>
 #include <asm/sched_clock.h>
 
 #include <mach/irqs.h>
@@ -59,6 +59,7 @@
 #define timer_readl(reg) \
        __raw_readl(timer_reg_base + (reg))
 
+
 static void __iomem *timer_reg_base = IO_ADDRESS(TEGRA_TMR1_BASE);
 
 #ifdef CONFIG_PM_SLEEP
@@ -92,27 +93,10 @@ unsigned long tegra2_lp2_timer_remain(void)
 }
 #endif
 
-void __init tegra2_init_timer(u32 *offset, int *irq, unsigned long rate)
+void __init tegra20_init_timer(void)
 {
        int ret;
 
-       switch (rate) {
-       case 12000000:
-               timer_writel(0x000b, TIMERUS_USEC_CFG);
-               break;
-       case 13000000:
-               timer_writel(0x000c, TIMERUS_USEC_CFG);
-               break;
-       case 19200000:
-               timer_writel(0x045f, TIMERUS_USEC_CFG);
-               break;
-       case 26000000:
-               timer_writel(0x0019, TIMERUS_USEC_CFG);
-               break;
-       default:
-               WARN(1, "Unknown clock rate");
-       }
-
 #ifdef CONFIG_PM_SLEEP
        ret = setup_irq(tegra_lp2wake_irq.irq, &tegra_lp2wake_irq);
        if (ret) {
@@ -120,7 +104,4 @@ void __init tegra2_init_timer(u32 *offset, int *irq, unsigned long rate)
                BUG();
        }
 #endif
-
-       *offset = TIMER3_OFFSET;
-       *irq = INT_TMR3;
 }