ARM: tegra: loki: fix build error due to warning
[linux-3.10.git] / arch / arm / mach-tegra / pinmux-tegra30-tables.c
index b6c900a..a81c326 100644 (file)
@@ -3,7 +3,7 @@
  *
  * Common pinmux configurations for Tegra30 SoCs
  *
- * Copyright (C) 2010,2011 NVIDIA Corporation
+ * Copyright (c) 2010-2013, NVIDIA Corporation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -25,6 +25,7 @@
 #include <linux/io.h>
 #include <linux/init.h>
 #include <linux/string.h>
+#include <linux/syscore_ops.h>
 
 #include <mach/pinmux.h>
 #include <mach/pinmux-tegra30.h>
 const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE_PINGROUP] = {
        DEFAULT_DRIVE_PINGROUP(AO1,             0x868),
        DEFAULT_DRIVE_PINGROUP(AO2,             0x86c),
-       DEFAULT_DRIVE_PINGROUP(AT1,             0x870),
-       DEFAULT_DRIVE_PINGROUP(AT2,             0x874),
-       DEFAULT_DRIVE_PINGROUP(AT3,             0x878),
-       DEFAULT_DRIVE_PINGROUP(AT4,             0x87c),
-       DEFAULT_DRIVE_PINGROUP(AT5,             0x880),
+       SET_DRIVE_PINGROUP(AT1,         0x870,  14,     0x1f,   19,     0x1f,
+       24,     0x3,    28,     0x3),
+       SET_DRIVE_PINGROUP(AT2,         0x874,  14,     0x1f,   19,     0x1f,
+       24,     0x3,    28,     0x3),
+       SET_DRIVE_PINGROUP(AT3,         0x878,  14,     0x1f,   19,     0x1f,
+       28,     0x3,    30,     0x3),
+       SET_DRIVE_PINGROUP(AT4,         0x87c,  14,     0x1f,   19,     0x1f,
+       28,     0x3,    30,     0x3),
+       SET_DRIVE_PINGROUP(AT5,         0x880,  14,     0x1f,   19,     0x1f,
+       28,     0x3,    30,     0x3),
        DEFAULT_DRIVE_PINGROUP(CDEV1,           0x884),
        DEFAULT_DRIVE_PINGROUP(CDEV2,           0x888),
        DEFAULT_DRIVE_PINGROUP(CSUS,            0x88c),
@@ -107,10 +113,14 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE
                24,     0xf,    28,     0xf),
        SET_DRIVE_PINGROUP(GMD,                 0x90c,  14,     0x1f,   19,     0x1f,
                24,     0xf,    28,     0xf),
-       DEFAULT_DRIVE_PINGROUP(GME,             0x910),
-       DEFAULT_DRIVE_PINGROUP(GMF,             0x914),
-       DEFAULT_DRIVE_PINGROUP(GMG,             0x918),
-       DEFAULT_DRIVE_PINGROUP(GMH,             0x91c),
+       SET_DRIVE_PINGROUP(GME,         0x910,  14,     0x1f,   19,     0x1f,
+       28,     0x3,    30,     0x3),
+       SET_DRIVE_PINGROUP(GMF,         0x914,  14,     0x1f,   19,     0x1f,
+       28,     0x3,    30,     0x3),
+       SET_DRIVE_PINGROUP(GMG,         0x918,  14,     0x1f,   19,     0x1f,
+       28,     0x3,    30,     0x3),
+       SET_DRIVE_PINGROUP(GMH,         0x91c,  14,     0x1f,   19,     0x1f,
+       28,     0x3,    30,     0x3),
        DEFAULT_DRIVE_PINGROUP(OWR,             0x920),
        DEFAULT_DRIVE_PINGROUP(UAD,             0x924),
        DEFAULT_DRIVE_PINGROUP(GPV,             0x928),
@@ -143,6 +153,7 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE
                .od_bit = 6,                                    \
                .lock_bit = 7,                                  \
                .ioreset_bit = 8,                               \
+               .rcv_sel_bit = -1,                              \
        }
 
 /* !!!FIXME!!! FILL IN fSafe COLUMN IN TABLE ....... */
@@ -178,10 +189,10 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE
        PINGROUP(CLK2_OUT,              PW5,            SDMMC1,         EXTPERIPH2,     RSVD1,          RSVD2,          RSVD3,          EXTPERIPH2,     INPUT,  0x3068),\
        PINGROUP(CLK2_REQ,              PCC5,           SDMMC1,         DAP,            RSVD1,          RSVD2,          RSVD3,          DAP,    INPUT,  0x306c),\
        PINGROUP(LCD_PWR1,              PC1,            LCD,            DISPLAYA,       DISPLAYB,       RSVD1,          RSVD2,          DISPLAYA,       OUTPUT, 0x3070),\
-       PINGROUP(LCD_PWR2,              PC6,            LCD,            DISPLAYA,       DISPLAYB,       SPI5,           INVALID,        DISPLAYA,       OUTPUT, 0x3074),\
+       PINGROUP(LCD_PWR2,              PC6,            LCD,            DISPLAYA,       DISPLAYB,       SPI5,           RSVD,           DISPLAYA,       OUTPUT, 0x3074),\
        PINGROUP(LCD_SDIN,              PZ2,            LCD,            DISPLAYA,       DISPLAYB,       SPI5,           RSVD,           DISPLAYA,       OUTPUT, 0x3078),\
        PINGROUP(LCD_SDOUT,             PN5,            LCD,            DISPLAYA,       DISPLAYB,       SPI5,           INVALID,        DISPLAYA,       OUTPUT, 0x307c),\
-       PINGROUP(LCD_WR_N,              PZ3,            LCD,            DISPLAYA,       DISPLAYB,       SPI5,           INVALID,        DISPLAYA,       OUTPUT, 0x3080),\
+       PINGROUP(LCD_WR_N,              PZ3,            LCD,            DISPLAYA,       DISPLAYB,       SPI5,           RSVD,           DISPLAYA,       OUTPUT, 0x3080),\
        PINGROUP(LCD_CS0_N,             PN4,            LCD,            DISPLAYA,       DISPLAYB,       SPI5,           RSVD,           DISPLAYA,       OUTPUT, 0x3084),\
        PINGROUP(LCD_DC0,               PN6,            LCD,            DISPLAYA,       DISPLAYB,       RSVD1,          RSVD2,          DISPLAYA,       OUTPUT, 0x3088),\
        PINGROUP(LCD_SCK,               PZ4,            LCD,            DISPLAYA,       DISPLAYB,       SPI5,           INVALID,        DISPLAYA,       OUTPUT, 0x308c),\
@@ -320,7 +331,7 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE
        PINGROUP(GPIO_PBB5,             PBB5,           CAM,            VGP5,           DISPLAYA,       DISPLAYB,       POPSDMMC4,      RSVD,   INPUT,  0x32a0),\
        PINGROUP(GPIO_PBB6,             PBB6,           CAM,            VGP6,           DISPLAYA,       DISPLAYB,       POPSDMMC4,      RSVD,   INPUT,  0x32a4),\
        PINGROUP(GPIO_PBB7,             PBB7,           CAM,            I2S4,           RSVD1,          RSVD2,          POPSDMMC4,      RSVD,   INPUT,  0x32a8),\
-       PINGROUP(GPIO_PCC2,             PCC2,           CAM,            I2S4,           RSVD1,          RSVD2,          RSVD3,          RSVD,   INPUT,  0x32ac),\
+       PINGROUP(GPIO_PCC2,             PCC2,           CAM,            I2S4,           RSVD1,          RSVD2,          POPSDMMC4,      RSVD,   INPUT,  0x32ac),\
        PINGROUP(JTAG_RTCK,             PU7,            SYS,            RTCK,           RSVD1,          RSVD2,          RSVD3,          RTCK,   INPUT,  0x32b0),\
        PINGROUP(PWR_I2C_SCL,           PZ6,            SYS,            I2CPWR,         RSVD1,          RSVD2,          RSVD3,          I2CPWR, INPUT,  0x32b4),\
        PINGROUP(PWR_I2C_SDA,           PZ7,            SYS,            I2CPWR,         RSVD1,          RSVD2,          RSVD3,          I2CPWR, INPUT,  0x32b8),\
@@ -362,7 +373,7 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE
        PINGROUP(CLK1_REQ,              PEE2,           AUDIO,          DAP,            HDA,            RSVD2,          RSVD3,          DAP,    INPUT,  0x3348),\
        PINGROUP(CLK1_OUT,              PW4,            AUDIO,          EXTPERIPH1,     RSVD1,          RSVD2,          RSVD3,          EXTPERIPH1,     INPUT,  0x334c),\
        PINGROUP(SPDIF_IN,              PK6,            AUDIO,          SPDIF,          HDA,            INVALID,        DAPSDMMC2,      RSVD,   INPUT,  0x3350),\
-       PINGROUP(SPDIF_OUT,             PK5,            AUDIO,          SPDIF,          RSVD1,          INVALID,        DAPSDMMC2,      RSVD,   INPUT,  0x3354),\
+       PINGROUP(SPDIF_OUT,             PK5,            AUDIO,          SPDIF,          RSVD1,          INVALID,        DAPSDMMC2,      RSVD1,  INPUT,  0x3354),\
        PINGROUP(DAP2_FS,               PA2,            AUDIO,          I2S1,           HDA,            RSVD2,          GMI,            I2S1,   INPUT,  0x3358),\
        PINGROUP(DAP2_DIN,              PA4,            AUDIO,          I2S1,           HDA,            RSVD2,          GMI,            I2S1,   INPUT,  0x335c),\
        PINGROUP(DAP2_DOUT,             PA5,            AUDIO,          I2S1,           HDA,            RSVD2,          GMI,            I2S1,   INPUT,  0x3360),\
@@ -377,16 +388,16 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE
        PINGROUP(SPI1_MISO,             PX7,            AUDIO,          INVALID,        SPI1,           INVALID,        RSVD3,          RSVD,   INPUT,  0x3384),\
        PINGROUP(SPI2_CS1_N,            PW2,            AUDIO,          INVALID,        SPI2,           INVALID,        INVALID,        RSVD,   INPUT,  0x3388),\
        PINGROUP(SPI2_CS2_N,            PW3,            AUDIO,          INVALID,        SPI2,           INVALID,        INVALID,        RSVD,   INPUT,  0x338c),\
-       PINGROUP(SDMMC3_CLK,            PA6,            SDMMC3,         UARTA,          PWM2,           SDIO3,          INVALID,        SDMMC3, INPUT,  0x3390),\
+       PINGROUP(SDMMC3_CLK,            PA6,            SDMMC3,         UARTA,          PWM2,           SDIO3,          SPI3,           SDMMC3, INPUT,  0x3390),\
        PINGROUP(SDMMC3_CMD,            PA7,            SDMMC3,         UARTA,          PWM3,           SDIO3,          INVALID,        SDMMC3, INPUT,  0x3394),\
-       PINGROUP(SDMMC3_DAT0,           PB7,            SDMMC3,         RSVD,           RSVD1,          SDIO3,          INVALID,        SDMMC3, INPUT,  0x3398),\
-       PINGROUP(SDMMC3_DAT1,           PB6,            SDMMC3,         RSVD,           RSVD1,          SDIO3,          INVALID,        SDMMC3, INPUT,  0x339c),\
-       PINGROUP(SDMMC3_DAT2,           PB5,            SDMMC3,         RSVD,           PWM1,           SDIO3,          INVALID,        SDMMC3, INPUT,  0x33a0),\
+       PINGROUP(SDMMC3_DAT0,           PB7,            SDMMC3,         RSVD,           RSVD1,          SDIO3,          SPI3,           SDMMC3, INPUT,  0x3398),\
+       PINGROUP(SDMMC3_DAT1,           PB6,            SDMMC3,         RSVD,           RSVD1,          SDIO3,          SPI3,           SDMMC3, INPUT,  0x339c),\
+       PINGROUP(SDMMC3_DAT2,           PB5,            SDMMC3,         RSVD,           PWM1,           SDIO3,          SPI3,           SDMMC3, INPUT,  0x33a0),\
        PINGROUP(SDMMC3_DAT3,           PB4,            SDMMC3,         RSVD,           PWM0,           SDIO3,          INVALID,        SDMMC3, INPUT,  0x33a4),\
        PINGROUP(SDMMC3_DAT4,           PD1,            SDMMC3,         PWM1,           INVALID,        SDIO3,          INVALID,        SDMMC3, INPUT,  0x33a8),\
        PINGROUP(SDMMC3_DAT5,           PD0,            SDMMC3,         PWM0,           INVALID,        SDIO3,          INVALID,        SDMMC3, INPUT,  0x33ac),\
        PINGROUP(SDMMC3_DAT6,           PD3,            SDMMC3,         SPDIF,          INVALID,        SDIO3,          INVALID,        SDMMC3, INPUT,  0x33b0),\
-       PINGROUP(SDMMC3_DAT7,           PD4,            SDMMC3,         SPDIF,          INVALID,        SDIO3,          INVALID,        SDMMC3, INPUT,  0x33b4),\
+       PINGROUP(SDMMC3_DAT7,           PD4,            SDMMC3,         SPDIF,          RSVD,           SDIO3,          INVALID,        SDMMC3, INPUT,  0x33b4),\
        PINGROUP(PEX_L0_PRSNT_N,        PDD0,           PEXCTL,         PCIE,           HDA,            RSVD2,          RSVD3,          PCIE,   INPUT,  0x33b8),\
        PINGROUP(PEX_L0_RST_N,          PDD1,           PEXCTL,         PCIE,           HDA,            RSVD2,          RSVD3,          PCIE,   INPUT,  0x33bc),\
        PINGROUP(PEX_L0_CLKREQ_N,       PDD2,           PEXCTL,         PCIE,           HDA,            RSVD2,          RSVD3,          PCIE,   INPUT,  0x33c0),\
@@ -405,11 +416,13 @@ static const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP]
 };
 
 #undef PINGROUP
+#undef TEGRA_GPIO_INVALID
+#define TEGRA_GPIO_INVALID      TEGRA_MAX_GPIO
 
 #define PINGROUP(pg_name, gpio_nr, vdd, f0, f1, f2, f3, fs, iod, reg)  \
        [TEGRA_GPIO_##gpio_nr] =  TEGRA_PINGROUP_ ##pg_name\
 
-static const int gpio_to_pingroup[TEGRA_MAX_GPIO] = {
+static const int gpio_to_pingroup[TEGRA_MAX_GPIO + 1] = {
        PINGROUPS
 };
 
@@ -430,6 +443,50 @@ static __initdata struct tegra_drive_pingroup_config t30_def_drive_pinmux[] = {
        SET_DRIVE(DAP1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
 };
 
+#ifdef CONFIG_PM_SLEEP
+
+static u32 pinmux_reg[TEGRA_MAX_PINGROUP + ARRAY_SIZE(tegra_soc_drive_pingroups)];
+
+static int tegra30_pinmux_suspend(void)
+{
+       unsigned int i;
+       u32 *ctx = pinmux_reg;
+
+       for (i = 0; i < TEGRA_MAX_PINGROUP; i++) {
+               *ctx++ = pg_readl(tegra_soc_pingroups[i].mux_bank,
+                               tegra_soc_pingroups[i].mux_reg);
+       }
+
+       for (i = 0; i < ARRAY_SIZE(tegra_soc_drive_pingroups); i++) {
+               *ctx++ = pg_readl(tegra_soc_drive_pingroups[i].reg_bank,
+                               tegra_soc_drive_pingroups[i].reg);
+       }
+
+       return 0;
+}
+
+static void tegra30_pinmux_resume(void)
+{
+       unsigned int i;
+       u32 *ctx = pinmux_reg;
+
+       for (i = 0; i < TEGRA_MAX_PINGROUP; i++) {
+               pg_writel(*ctx++, tegra_soc_pingroups[i].mux_bank,
+                       tegra_soc_pingroups[i].mux_reg);
+       }
+
+       for (i = 0; i < ARRAY_SIZE(tegra_soc_drive_pingroups); i++) {
+               pg_writel(*ctx++, tegra_soc_drive_pingroups[i].reg_bank,
+                       tegra_soc_drive_pingroups[i].reg);
+       }
+}
+
+static struct syscore_ops tegra30_pinmux_syscore_ops = {
+       .suspend = tegra30_pinmux_suspend,
+       .resume = tegra30_pinmux_resume,
+};
+#endif
+
 void tegra30_pinmux_init(const struct tegra_pingroup_desc **pg,
                int *pg_max, const struct tegra_drive_pingroup_desc **pgdrive,
                int *pgdrive_max, const int **gpiomap, int *gpiomap_max)
@@ -440,9 +497,13 @@ void tegra30_pinmux_init(const struct tegra_pingroup_desc **pg,
        *pgdrive_max = TEGRA_MAX_DRIVE_PINGROUP;
        *gpiomap = gpio_to_pingroup;
        *gpiomap_max = TEGRA_MAX_GPIO;
+
+#ifdef CONFIG_PM_SLEEP
+       register_syscore_ops(&tegra30_pinmux_syscore_ops);
+#endif
 }
 
-void tegra30_default_pinmux()
+void tegra30_default_pinmux(void)
 {
        tegra_drive_pinmux_config_table(t30_def_drive_pinmux,
                                        ARRAY_SIZE(t30_def_drive_pinmux));