ARM: tegra12: set CPU rate to 2.2GHz for sku 0x87
[linux-3.10.git] / arch / arm / mach-tegra / board-vcm30_t124.c
index 49b259f..eebf65a 100644 (file)
@@ -1,7 +1,7 @@
 /*
  * arch/arm/mach-tegra/board-vcm30_t124.c
  *
- * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2013-2014, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
 
 static struct board_info board_info, display_board_info;
 
+/*
+ * Set clock values as per automotive POR
+ */
 static __initdata struct tegra_clk_init_table vcm30_t124_clk_init_table[] = {
-       /* name         parent          rate            enabled (always on)*/
-       { "pll_m",      NULL,           0,              false},
-       { "hda",        "pll_p",        108000000,      false},
-       { "hda2codec_2x", "pll_p",      48000000,       false},
-       { "pwm",        "pll_p",        3187500,        false},
-       { "i2s0",       "pll_a_out0",   0,              false},
-       { "i2s1",       "pll_a_out0",   0,              false},
-       { "i2s3",       "pll_a_out0",   0,              false},
-       { "i2s4",       "pll_a_out0",   0,              false},
-       { "spdif_out",  "pll_a_out0",   0,              false},
-       { "d_audio",    "clk_m",        12000000,       false},
-       { "dam0",       "clk_m",        12000000,       false},
-       { "dam1",       "clk_m",        12000000,       false},
-       { "dam2",       "clk_m",        12000000,       false},
-       { "audio1",     "i2s1_sync",    0,              false},
-       { "audio3",     "i2s3_sync",    0,              false},
-       { "vi_sensor",  "pll_p",        150000000,      false},
-       { "vi_sensor2", "pll_p",        150000000,      false},
-       { "cilab",      "pll_p",        150000000,      false},
-       { "cilcd",      "pll_p",        150000000,      false},
-       { "cile",       "pll_p",        150000000,      false},
-       { "i2c1",       "pll_p",        3200000,        false},
-       { "i2c2",       "pll_p",        3200000,        false},
-       { "i2c3",       "pll_p",        3200000,        false},
-       { "i2c4",       "pll_p",        3200000,        false},
-       { "i2c5",       "pll_p",        3200000,        false},
-       { "sbc1",       "pll_p",        25000000,       false},
-       { "sbc2",       "pll_p",        25000000,       false},
-       { "sbc3",       "pll_p",        25000000,       false},
-       { "sbc4",       "pll_p",        25000000,       false},
-       { "sbc5",       "pll_p",        25000000,       false},
-       { "sbc6",       "pll_p",        25000000,       false},
-       { "uarta",      "pll_p",        408000000,      false},
-       { "uartb",      "pll_p",        408000000,      false},
-       { "uartc",      "pll_p",        408000000,      false},
-       { "uartd",      "pll_p",        408000000,      false},
-       { "nor",        "pll_p",        102000000,      true},
-       { NULL,         NULL,           0,              0},
-};
-
-static struct tegra_i2c_platform_data vcm30_t124_i2c1_platform_data = {
-       .bus_clk_rate   = 100000,
-       .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
-       .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
-};
-
-static struct tegra_i2c_platform_data vcm30_t124_i2c2_platform_data = {
-       .bus_clk_rate   = 100000,
-       .is_clkon_always = true,
-       .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
-       .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
-};
-
-static struct tegra_i2c_platform_data vcm30_t124_i2c3_platform_data = {
-       .bus_clk_rate   = 400000,
-       .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
-       .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
-};
-
-static struct tegra_i2c_platform_data vcm30_t124_i2c4_platform_data = {
-       .bus_clk_rate   = 10000,
-       .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
-       .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
-};
-
-static struct tegra_i2c_platform_data vcm30_t124_i2c5_platform_data = {
-       .bus_clk_rate   = 400000,
-       .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
-       .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
+       /* name                 parent          rate    enabled (always on)*/
+
+       { "pll_c",              NULL,           792000000,      true},
+
+       { "automotive.sclk",    NULL,           316800000,      true},
+       { "automotive.hclk",    NULL,           316800000,      true},
+       { "automotive.pclk",    NULL,           158400000,      true},
+
+       { "mselect",            "pll_p",        408000000,      true},
+       { "automotive.mselect", NULL,           408000000,      true},
+
+       { "se.cbus",            NULL,           432000000,      false},
+       { "msenc.cbus",         NULL,           432000000,      false},
+       { "vde.cbus",           NULL,           432000000,      false},
+
+       { "vic03.cbus",         NULL,           660000000,      false},
+       { "tsec.cbus",          NULL,           660000000,      false},
+
+       { "vi.c4bus",           NULL,           600000000,      false},
+       { "isp.c4bus",          NULL,           600000000,      false},
+
+       { "pll_d_out0",         "pll_d",        474000000,      true},
+       { "disp2",              "pll_d_out0",   474000000,      false},
+       { "disp1",              "pll_d_out0",   474000000,      false},
+
+       { "pll_d2",             NULL,           297000000,      true},
+       { "hdmi",               "pll_d2",       297000000,      false},
+
+       { "pll_a_out0",         NULL,           24600000,       true},
+       { "i2s0",               "pll_a_out0",   24600000,       false},
+       { "i2s1",               "pll_a_out0",   24600000,       false},
+       { "i2s2",               "pll_a_out0",   24600000,       false},
+       { "i2s3",               "pll_a_out0",   24600000,       false},
+       { "i2s4",               "pll_a_out0",   24600000,       false},
+
+       { "dam0",               "pll_p",        19900000,       false},
+       { "dam1",               "pll_p",        19900000,       false},
+       { "dam2",               "pll_p",        19900000,       false},
+       { "adx",                "pll_p",        19900000,       false},
+       { "adx1",               "pll_p",        19900000,       false},
+       { "amx",                "pll_p",        19900000,       false},
+       { "amx1",               "pll_p",        19900000,       false},
+
+       { "spdif_out",          "pll_a_out0",   24600000,       false},
+       { "hda",                "pll_p",        48000000,       false},
+       { "cilab",              "pll_p",        10200000,       false},
+       { "cilcd",              "pll_p",        10200000,       false},
+       { "cile",               "pll_p",        10200000,       false},
+
+       { "nor",                "pll_p",        102000000,      false},
+
+       { "sbc1",               "pll_p",        25000000,       false},
+       { "sbc2",               "pll_p",        25000000,       false},
+       { "sbc3",               "pll_p",        25000000,       false},
+       { "sbc4",               "pll_p",        25000000,       false},
+       { "sbc5",               "pll_p",        25000000,       false},
+       { "sbc6",               "pll_p",        25000000,       false},
+
+       { "uarta",              "pll_p",        408000000,      false},
+       { "uartb",              "pll_p",        408000000,      false},
+       { "uartc",              "pll_p",        408000000,      false},
+       { "uartd",              "pll_p",        408000000,      false},
+
+       { NULL,                 NULL,           0,              0},
 };
 
 static struct tegra_nor_platform_data vcm30_t124_nor_data = {
@@ -181,20 +179,8 @@ static struct i2c_board_info __initdata ad1937_board_info = {
 static void vcm30_t124_i2c_init(void)
 {
        struct board_info board_info;
-       tegra_get_board_info(&board_info);
-       /* T124 does not use device tree as of now */
-       tegra12_i2c_device1.dev.platform_data = &vcm30_t124_i2c1_platform_data;
-       tegra12_i2c_device2.dev.platform_data = &vcm30_t124_i2c2_platform_data;
-       tegra12_i2c_device3.dev.platform_data = &vcm30_t124_i2c3_platform_data;
-       tegra12_i2c_device4.dev.platform_data = &vcm30_t124_i2c4_platform_data;
-       tegra12_i2c_device5.dev.platform_data = &vcm30_t124_i2c5_platform_data;
-
-       platform_device_register(&tegra12_i2c_device5);
-       platform_device_register(&tegra12_i2c_device4);
-       platform_device_register(&tegra12_i2c_device3);
-       platform_device_register(&tegra12_i2c_device2);
-       platform_device_register(&tegra12_i2c_device1);
 
+       tegra_get_board_info(&board_info);
        i2c_register_board_info(0, &wm8731_board_info, 1);
        i2c_register_board_info(0, &ad1937_board_info, 1);
 }
@@ -276,21 +262,15 @@ static struct platform_device tegra_rtc_device = {
 static struct tegra_pci_platform_data vcm30_t124_pcie_platform_data = {
        .port_status[0] = 1,
        .port_status[1] = 1,
-       .gpio_hot_plug  = TEGRA_GPIO_PO1,
-       .gpio_x1_slot   = PMU_TCA6416_GPIO(12),
+       .gpio_hot_plug = -1,
+       .gpio_wake = -1,
+       .gpio_x1_slot = -1,
 };
 
 static void vcm30_t124_pcie_init(void)
 {
-/* FIXME: Check this for VCM30_T124 */
-#if 0
-       struct board_info board_info;
-       /* root port 1(x1 slot) is supported only on of ERS-S board */
-       laguna_pcie_platform_data.port_status[1] = 0;
-
-       tegra_pci_device.dev.platform_data = &laguna_pcie_platform_data;
+       tegra_pci_device.dev.platform_data = &vcm30_t124_pcie_platform_data;
        platform_device_register(&tegra_pci_device);
-#endif
 }
 
 #ifdef CONFIG_SATA_AHCI_TEGRA
@@ -450,6 +430,7 @@ struct of_dev_auxdata vcm30_t124_auxdata_lookup[] __initdata = {
                                NULL),
        OF_DEV_AUXDATA("nvidia,tegra124-ahub", 0x70300000,
                                "tegra30-ahub-apbif", NULL),
+       T124_I2C_OF_DEV_AUXDATA,
        T124_SPI_OF_DEV_AUXDATA,
 
        {}
@@ -471,8 +452,6 @@ static void __init tegra_vcm30_t124_late_init(void)
                board_info.board_id, board_info.sku,
                board_info.fab, board_info.major_revision,
                board_info.minor_revision);
-       platform_device_register(&tegra124_pinctrl_device);
-       vcm30_t124_pinmux_init();
        vcm30_t124_usb_init();
 /*     vcm30_t124_xusb_init(); */
        vcm30_t124_nor_init();
@@ -508,11 +487,6 @@ static void __init tegra_vcm30_t124_late_init(void)
        vcm30_t124_panel_init();
 }
 
-static void __init vcm30_t124_ramconsole_reserve(unsigned long size)
-{
-       tegra_ram_console_debug_reserve(SZ_1M);
-}
-
 static void __init tegra_vcm30_t124_dt_init(void)
 {
        tegra_get_board_info(&board_info);
@@ -536,7 +510,6 @@ static void __init tegra_vcm30_t124_reserve(void)
 #else
        tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_4M);
 #endif
-       vcm30_t124_ramconsole_reserve(SZ_1M);
 }
 
 static const char * const vcm30_t124_dt_board_compat[] = {