/*
* arch/arm/mach-tegra/board-roth-power.c
*
- * Copyright (c) 2012 NVIDIA Corporation. All rights reserved.
+ * Copyright (c) 2012-2013 NVIDIA Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
#include <linux/regulator/driver.h>
#include <linux/regulator/fixed.h>
#include <linux/mfd/palmas.h>
+#include <linux/power/power_supply_extcon.h>
#include <linux/regulator/tps51632-regulator.h>
-#include <linux/mfd/bq2419x.h>
+#include <linux/power/bq2419x-charger.h>
+#include <linux/max17048_battery.h>
#include <linux/gpio.h>
#include <linux/regulator/userspace-consumer.h>
+#include <linux/tegra-soc.h>
#include <asm/mach-types.h>
#include <mach/irqs.h>
#include <mach/edp.h>
#include <mach/gpio-tegra.h>
-#include <mach/hardware.h>
#include "cpu-tegra.h"
#include "pm.h"
#include "tegra-board-id.h"
#include "board-pmu-defines.h"
#include "board.h"
-#include "board-common.h"
#include "gpio-names.h"
#include "board-roth.h"
#include "tegra_cl_dvfs.h"
#include "tegra11_soctherm.h"
#include "iomap.h"
#include "tegra3_tsensor.h"
+#include "battery-ini-model-data.h"
#define PMC_CTRL 0x0
#define PMC_CTRL_INTR_LOW (1 << 17)
};
static struct tps51632_regulator_platform_data tps51632_pdata = {
- .reg_init_data = &tps51632_init_data, \
- .enable_pwm = false, \
- .max_voltage_uV = 1520000, \
- .base_voltage_uV = 500000, \
- .slew_rate_uv_per_us = 6000, \
+ .reg_init_data = &tps51632_init_data,
+ .enable_pwm_dvfs = false,
+ .max_voltage_uV = 1520000,
+ .base_voltage_uV = 500000,
+/* .slew_rate_uv_per_us = 6000, */
};
static struct i2c_board_info __initdata tps51632_boardinfo[] = {
},
};
-
/* BQ2419X VBUS regulator */
static struct regulator_consumer_supply bq2419x_vbus_supply[] = {
REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.0"),
+ REGULATOR_SUPPLY("usb_vbus", "tegra-otg"),
};
-static struct regulator_init_data bq2419x_init_data = {
- .constraints = {
- .name = "bq2419x_vbus",
- .min_uV = 0,
- .max_uV = 5000000,
- .valid_modes_mask = (REGULATOR_MODE_NORMAL |
- REGULATOR_MODE_STANDBY),
- .valid_ops_mask = (REGULATOR_CHANGE_MODE |
- REGULATOR_CHANGE_STATUS |
- REGULATOR_CHANGE_VOLTAGE),
- },
- .num_consumer_supplies = ARRAY_SIZE(bq2419x_vbus_supply),
- .consumer_supplies = bq2419x_vbus_supply,
+
+static struct regulator_consumer_supply bq2419x_batt_supply[] = {
+ REGULATOR_SUPPLY("usb_bat_chg", "tegra-udc.0"),
};
-static struct bq2419x_regulator_platform_data bq2419x_reg_pdata = {
- .reg_init_data = &bq2419x_init_data,
+static struct bq2419x_vbus_platform_data bq2419x_vbus_pdata = {
.gpio_otg_iusb = TEGRA_GPIO_PI4,
+ .num_consumer_supplies = ARRAY_SIZE(bq2419x_vbus_supply),
+ .consumer_supplies = bq2419x_vbus_supply,
};
struct bq2419x_charger_platform_data bq2419x_charger_pdata = {
- .usb_in_current_limit = 400,
- .ac_in_current_limit = 1000,
- .use_usb = 1,
- .gpio_interrupt = TEGRA_GPIO_PJ0,
- .gpio_status = TEGRA_GPIO_PK0,
+ .max_charge_current_mA = 3000,
+ .charging_term_current_mA = 100,
+ .consumer_supplies = bq2419x_batt_supply,
+ .num_consumer_supplies = ARRAY_SIZE(bq2419x_batt_supply),
+ .wdt_timeout = 40,
+ .rtc_alarm_time = 3600,
+ .chg_restart_time = 1800,
};
struct bq2419x_platform_data bq2419x_pdata = {
- .reg_pdata = &bq2419x_reg_pdata,
+ .vbus_pdata = &bq2419x_vbus_pdata,
.bcharger_pdata = &bq2419x_charger_pdata,
- .disable_watchdog = true,
};
static struct i2c_board_info __initdata bq2419x_boardinfo[] = {
},
};
+static struct max17048_platform_data max17048_pdata;
+
+static struct i2c_board_info __initdata max17048_boardinfo[] = {
+ {
+ I2C_BOARD_INFO("max17048", 0x36),
+ .platform_data = &max17048_pdata,
+ },
+};
+
+static struct power_supply_extcon_plat_data psy_extcon_pdata = {
+ .extcon_name = "tegra-udc",
+};
+
+static struct platform_device psy_extcon_device = {
+ .name = "power-supply-extcon",
+ .id = -1,
+ .dev = {
+ .platform_data = &psy_extcon_pdata,
+ },
+};
+
/************************ Palmas based regulator ****************/
static struct regulator_consumer_supply palmas_smps12_supply[] = {
REGULATOR_SUPPLY("vddio_ddr0", NULL),
REGULATOR_SUPPLY("pwrdet_bb", NULL),
REGULATOR_SUPPLY("pwrdet_cam", NULL),
REGULATOR_SUPPLY("dbvdd", NULL),
- REGULATOR_SUPPLY("dvdd_lcd", NULL),
REGULATOR_SUPPLY("vlogic", "0-0068"),
};
REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.0"),
REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.1"),
- REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegra_camera"),
- REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
+ REGULATOR_SUPPLY("avdd_csi_dsi_pll", "vi"),
REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
REGULATOR_SUPPLY("avddio_usb", "tegra-ehci.2"),
};
REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.3"),
};
-static struct regulator_consumer_supply palmas_smps10_supply[] = {
+static struct regulator_consumer_supply palmas_smps10_out2_supply[] = {
REGULATOR_SUPPLY("vdd_vbrtr", NULL),
REGULATOR_SUPPLY("vdd_5v0", NULL),
};
static struct regulator_consumer_supply palmas_ldo3_supply[] = {
REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.0"),
REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.1"),
- REGULATOR_SUPPLY("avdd_dsi_csi", "tegra_camera"),
+ REGULATOR_SUPPLY("avdd_dsi_csi", "vi"),
REGULATOR_SUPPLY("pwrdet_mipi", NULL),
};
+static struct regulator_consumer_supply palmas_ldo4_supply[] = {
+ REGULATOR_SUPPLY("vpp_fuse", NULL),
+};
+
+static struct regulator_consumer_supply palmas_ldo5_supply[] = {
+ REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
+};
+
static struct regulator_consumer_supply palmas_ldo6_supply[] = {
REGULATOR_SUPPLY("vdd_sensor_2v85", NULL),
REGULATOR_SUPPLY("vdd", "0-004c"),
PALMAS_PDATA_INIT(smps457, 900, 1400, NULL, 1, 1, 0, NORMAL);
PALMAS_PDATA_INIT(smps8, 1050, 1050, NULL, 1, 1, 1, NORMAL);
PALMAS_PDATA_INIT(smps9, 2800, 2800, NULL, 0, 0, 0, NORMAL);
-PALMAS_PDATA_INIT(smps10, 5000, 5000, NULL, 0, 0, 0, 0);
+PALMAS_PDATA_INIT(smps10_out2, 5000, 5000, NULL, 0, 0, 0, 0);
PALMAS_PDATA_INIT(ldo2, 2800, 2800, NULL, 0, 0, 1, 0);
PALMAS_PDATA_INIT(ldo3, 1200, 1200, NULL, 1, 1, 1, 0);
+PALMAS_PDATA_INIT(ldo4, 1800, 1800, NULL, 0, 0, 1, 0);
+PALMAS_PDATA_INIT(ldo5, 1200, 1200, NULL, 0, 0, 1, 0);
PALMAS_PDATA_INIT(ldo6, 2850, 2850, NULL, 0, 0, 1, 0);
PALMAS_PDATA_INIT(ldo8, 900, 900, NULL, 1, 1, 1, 0);
PALMAS_PDATA_INIT(ldo9, 1800, 3300, NULL, 0, 0, 1, 0);
NULL,
PALMAS_REG_PDATA(smps8),
PALMAS_REG_PDATA(smps9),
- PALMAS_REG_PDATA(smps10),
+ PALMAS_REG_PDATA(smps10_out2),
+ NULL,
NULL, /* LDO1 */
PALMAS_REG_PDATA(ldo2),
PALMAS_REG_PDATA(ldo3),
- NULL,
- NULL,
+ PALMAS_REG_PDATA(ldo4),
+ PALMAS_REG_PDATA(ldo5),
PALMAS_REG_PDATA(ldo6),
NULL,
PALMAS_REG_PDATA(ldo8),
};
#define PALMAS_REG_INIT(_name, _warm_reset, _roof_floor, _mode_sleep, \
- _tstep, _vsel) \
+ _vsel) \
static struct palmas_reg_init reg_init_data_##_name = { \
.warm_reset = _warm_reset, \
.roof_floor = _roof_floor, \
.mode_sleep = _mode_sleep, \
- .tstep = _tstep, \
.vsel = _vsel, \
}
-PALMAS_REG_INIT(smps12, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(smps123, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(smps3, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(smps45, 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
-PALMAS_REG_INIT(smps457, 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
-PALMAS_REG_INIT(smps6, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(smps7, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(smps8, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(smps9, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(smps10, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(ldo1, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(ldo2, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(ldo3, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(ldo4, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(ldo5, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(ldo6, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(ldo7, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(ldo8, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(ldo9, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(ldoln, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(ldousb, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(regen1, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(regen2, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(regen3, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(sysen1, 0, 0, 0, 0, 0);
-PALMAS_REG_INIT(sysen2, 0, 0, 0, 0, 0);
+PALMAS_REG_INIT(smps12, 0, 0, 0, 0);
+PALMAS_REG_INIT(smps123, 0, 0, 0, 0);
+PALMAS_REG_INIT(smps3, 0, 0, 0, 0);
+PALMAS_REG_INIT(smps45, 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0);
+PALMAS_REG_INIT(smps457, 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0);
+PALMAS_REG_INIT(smps6, 0, 0, 0, 0);
+PALMAS_REG_INIT(smps7, 0, 0, 0, 0);
+PALMAS_REG_INIT(smps8, 0, 0, 0, 0);
+PALMAS_REG_INIT(smps9, 0, 0, 0, 0);
+PALMAS_REG_INIT(smps10_out2, 0, 0, 0, 0);
+PALMAS_REG_INIT(ldo1, 0, 0, 0, 0);
+PALMAS_REG_INIT(ldo2, 0, 0, 0, 0);
+PALMAS_REG_INIT(ldo3, 0, 0, 0, 0);
+PALMAS_REG_INIT(ldo4, 0, 0, 0, 0);
+PALMAS_REG_INIT(ldo5, 0, 0, 0, 0);
+PALMAS_REG_INIT(ldo6, 0, 0, 0, 0);
+PALMAS_REG_INIT(ldo7, 0, 0, 0, 0);
+PALMAS_REG_INIT(ldo8, 0, 0, 0, 0);
+PALMAS_REG_INIT(ldo9, 0, 0, 0, 0);
+PALMAS_REG_INIT(ldoln, 0, 0, 0, 0);
+PALMAS_REG_INIT(ldousb, 0, 0, 0, 0);
+PALMAS_REG_INIT(regen1, 0, 0, 0, 0);
+PALMAS_REG_INIT(regen2, 0, 0, 0, 0);
+PALMAS_REG_INIT(regen3, 0, 0, 0, 0);
+PALMAS_REG_INIT(sysen1, 0, 0, 0, 0);
+PALMAS_REG_INIT(sysen2, 0, 0, 0, 0);
#define PALMAS_REG_INIT_DATA(_sname) ®_init_data_##_sname
static struct palmas_reg_init *roth_reg_init[PALMAS_NUM_REGS] = {
PALMAS_REG_INIT_DATA(smps7),
PALMAS_REG_INIT_DATA(smps8),
PALMAS_REG_INIT_DATA(smps9),
- PALMAS_REG_INIT_DATA(smps10),
+ PALMAS_REG_INIT_DATA(smps10_out2),
+ NULL,
PALMAS_REG_INIT_DATA(ldo1),
PALMAS_REG_INIT_DATA(ldo2),
PALMAS_REG_INIT_DATA(ldo3),
};
static struct palmas_pmic_platform_data pmic_platform = {
- .enable_ldo8_tracking = true,
- .disabe_ldo8_tracking_suspend = true,
};
static struct palmas_pinctrl_config palmas_pincfg[] = {
- PALMAS_PINMUX(POWERGOOD, POWERGOOD, DEFAULT, DEFAULT),
- PALMAS_PINMUX(VAC, VAC, DEFAULT, DEFAULT),
- PALMAS_PINMUX(GPIO0, GPIO, DEFAULT, DEFAULT),
- PALMAS_PINMUX(GPIO1, GPIO, DEFAULT, DEFAULT),
- PALMAS_PINMUX(GPIO2, GPIO, DEFAULT, DEFAULT),
- PALMAS_PINMUX(GPIO3, GPIO, DEFAULT, DEFAULT),
- PALMAS_PINMUX(GPIO4, GPIO, DEFAULT, DEFAULT),
- PALMAS_PINMUX(GPIO5, GPIO, DEFAULT, DEFAULT),
- PALMAS_PINMUX(GPIO6, GPIO, DEFAULT, DEFAULT),
- PALMAS_PINMUX(GPIO7, GPIO, DEFAULT, DEFAULT),
+ PALMAS_PINMUX("powergood", "powergood", NULL, NULL),
+ PALMAS_PINMUX("vac", "vac", NULL, NULL),
+ PALMAS_PINMUX("gpio0", "gpio", NULL, NULL),
+ PALMAS_PINMUX("gpio1", "gpio", NULL, NULL),
+ PALMAS_PINMUX("gpio2", "gpio", NULL, NULL),
+ PALMAS_PINMUX("gpio3", "gpio", NULL, NULL),
+ PALMAS_PINMUX("gpio4", "gpio", NULL, NULL),
+ PALMAS_PINMUX("gpio5", "gpio", NULL, NULL),
+ PALMAS_PINMUX("gpio6", "gpio", NULL, NULL),
+ PALMAS_PINMUX("gpio7", "gpio", NULL, NULL),
};
static struct palmas_pinctrl_platform_data palmas_pinctrl_pdata = {
.gpio_base = PALMAS_TEGRA_GPIO_BASE,
.irq_base = PALMAS_TEGRA_IRQ_BASE,
.pmic_pdata = &pmic_platform,
- .mux_from_pdata = true,
- .pad1 = 0,
- .pad2 = 0,
- .pad3 = PALMAS_PRIMARY_SECONDARY_PAD3_DVFS1,
- .use_power_off = true,
.pinctrl_pdata = &palmas_pinctrl_pdata,
};
/* VDD_3V3_COM controled by Wifi */
static struct regulator_consumer_supply fixed_reg_com_3v3_supply[] = {
- REGULATOR_SUPPLY("vdd_wl_pa", "bcm4329_wlan.1"),
- REGULATOR_SUPPLY("vdd_bt_3v3", "bluedroid_pm.0"),
+ REGULATOR_SUPPLY("avdd", "bcm4329_wlan.1"),
+ REGULATOR_SUPPLY("avdd", "bluedroid_pm.0"),
REGULATOR_SUPPLY("vdd_wl_pa", "reg-userspace-consumer.2"),
};
/* VDD_1v8_COM controled by Wifi */
static struct regulator_consumer_supply fixed_reg_com_1v8_supply[] = {
- REGULATOR_SUPPLY("vddio", "bcm4329_wlan.1"),
- REGULATOR_SUPPLY("vddio_bt_1v8", "bluedroid_pm.0"),
+ REGULATOR_SUPPLY("dvdd", "bcm4329_wlan.1"),
+ REGULATOR_SUPPLY("dvdd", "bluedroid_pm.0"),
REGULATOR_SUPPLY("vddio", "reg-userspace-consumer.2"),
};
REGULATOR_SUPPLY("dvdd", "spi3.2"),
};
+/* EN_1V8_TS From TEGRA_GPIO_PU4 */
+static struct regulator_consumer_supply fixed_reg_dvdd_lcd_supply[] = {
+ REGULATOR_SUPPLY("dvdd_lcd", NULL),
+};
/* Macro for defining fixed regulator sub device data */
#define FIXED_SUPPLY(_name) "fixed_reg_"#_name
#define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on, \
}
FIXED_REG(0, fan_5v0, fan_5v0,
- palmas_rails(smps10), 0, 0,
+ palmas_rails(smps10_out2), 0, 0,
PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO6, false, true, 0, 5000);
FIXED_REG(1, vdd_hdmi_5v0, vdd_hdmi_5v0,
- palmas_rails(smps10), 0, 0,
+ palmas_rails(smps10_out2), 0, 0,
TEGRA_GPIO_PK1, false, true, 0, 5000);
FIXED_REG(2, lcd_bl_en, lcd_bl_en,
NULL, 0, 0,
- TEGRA_GPIO_PH2, false, true, 0, 5000);
+ TEGRA_GPIO_PH2, false, true, 1, 5000);
FIXED_REG(3, avdd_ts, avdd_ts,
palmas_rails(regen1), 0, 0,
palmas_rails(smps3), 0, 0,
TEGRA_GPIO_PX1, false, true, 0, 1800);
+FIXED_REG(8, dvdd_lcd, dvdd_lcd,
+ palmas_rails(smps3), 0, 0,
+ TEGRA_GPIO_PU4, false, true, 1, 1800);
+
/*
* Creating the fixed regulator device tables
*/
ADD_FIXED_REG(com_3v3),
ADD_FIXED_REG(sd_3v3),
ADD_FIXED_REG(com_1v8),
+ ADD_FIXED_REG(dvdd_lcd),
};
int __init roth_palmas_regulator_init(void)
*/
pmc_ctrl = readl(pmc + PMC_CTRL);
writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
+
+ /* Tracking configuration */
+ reg_init_data_ldo8.config_flags =
+ PALMAS_REGULATOR_CONFIG_TRACKING_ENABLE |
+ PALMAS_REGULATOR_CONFIG_SUSPEND_TRACKING_DISABLE;
+
for (i = 0; i < PALMAS_NUM_REGS ; i++) {
pmic_platform.reg_data[i] = roth_reg_data[i];
pmic_platform.reg_init[i] = roth_reg_init[i];
.sysclkreq_high = true,
.cpu_lp2_min_residency = 1000,
.min_residency_crail = 20000,
+#ifdef CONFIG_TEGRA_LP1_LOW_COREVOLTAGE
+ .lp1_lowvolt_support = false,
+ .i2c_base_addr = 0,
+ .pmuslave_addr = 0,
+ .core_reg_addr = 0,
+ .lp1_core_volt_low_cold = 0,
+ .lp1_core_volt_low = 0,
+ .lp1_core_volt_high = 0,
+#endif
};
#ifdef CONFIG_ARCH_TEGRA_HAS_CL_DVFS
/* board parameters for cpu dfll */
{
fill_reg_map();
if (tegra_revision < TEGRA_REVISION_A02)
- roth_cl_dvfs_data.out_quiet_then_disable = true;
+ roth_cl_dvfs_data.flags = TEGRA_CL_DVFS_FLAGS_I2C_WAIT_QUIET;
tegra_cl_dvfs_device.dev.platform_data = &roth_cl_dvfs_data;
platform_device_register(&tegra_cl_dvfs_device);
roth_cl_dvfs_init();
#endif
tegra_get_board_info(&board_info);
+
+ if (board_info.board_id == BOARD_P2560)
+ max17048_pdata.model_data = &max17048_mdata_p2560;
+ else
+ max17048_pdata.model_data = &max17048_mdata_p2454;
+
roth_palmas_regulator_init();
+ bq2419x_boardinfo[0].irq = gpio_to_irq(TEGRA_GPIO_PJ0);
i2c_register_board_info(4, tps51632_boardinfo, 1);
+ i2c_register_board_info(0, max17048_boardinfo, 1);
i2c_register_board_info(0, bq2419x_boardinfo, 1);
+ platform_device_register(&psy_extcon_device);
platform_device_register(&roth_pda_power_device);
return 0;
}
},
.throttle = {
[THROTTLE_HEAVY] = {
+ .priority = 100,
.devs = {
[THROTTLE_DEV_CPU] = {
- .enable = 1,
+ .enable = true,
+ .depth = 80,
+ },
+ [THROTTLE_DEV_GPU] = {
+ .enable = true,
+ .depth = 80,
},
},
},
int __init roth_soctherm_init(void)
{
- tegra_add_vc_trips(roth_soctherm_data.therm[THERM_CPU].trips,
- &roth_soctherm_data.therm[THERM_CPU].num_trips);
-
return tegra11_soctherm_init(&roth_soctherm_data);
}
Code Review / linux-3.10.git / blobdiff