static struct regulator_consumer_supply as3720_sd2_supply[] = {
REGULATOR_SUPPLY("avdd_hdmi", "tegradc.1"),
REGULATOR_SUPPLY("vcore_emmc", NULL),
- REGULATOR_SUPPLY("vdd_gps_3v3", NULL),
+ REGULATOR_SUPPLY("avdd", "reg-userspace-consumer.2"),
REGULATOR_SUPPLY("vdd_af_cam1", NULL),
};
REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
REGULATOR_SUPPLY("pwrdet_mipi", NULL),
- REGULATOR_SUPPLY("vddio_bt_1v8", NULL),
- REGULATOR_SUPPLY("vddio_wifi_1v8", NULL),
- REGULATOR_SUPPLY("vdd_gps_1v8", NULL),
+ REGULATOR_SUPPLY("dvdd", "reg-userspace-consumer.1"),
+ REGULATOR_SUPPLY("dvdd", "bcm4329_wlan.1"),
+ REGULATOR_SUPPLY("dvdd", "reg-userspace-consumer.2"),
};
static struct regulator_consumer_supply as3720_sd4_supply[] = {
REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
REGULATOR_SUPPLY("vddio_hv", "tegradc.1"),
REGULATOR_SUPPLY("pwrdet_hv", NULL),
- REGULATOR_SUPPLY("vdd_bt_3v3", NULL),
- REGULATOR_SUPPLY("vdd_wifi_3v3", NULL),
+ REGULATOR_SUPPLY("avdd", "reg-userspace-consumer.1"),
+ REGULATOR_SUPPLY("avdd", "bcm4329_wlan.1"),
};
static struct regulator_consumer_supply as3720_sd6_supply[] = {
static struct regulator_bulk_data pismo_gps_regulator_supply[] = {
[0] = {
- .supply = "vdd_gps_3v3",
+ .supply = "avdd",
},
[1] = {
- .supply = "vdd_gps_1v8",
+ .supply = "dvdd",
},
};
static struct regulator_bulk_data pismo_bt_regulator_supply[] = {
[0] = {
- .supply = "vdd_bt_3v3",
+ .supply = "avdd",
},
[1] = {
- .supply = "vddio_bt_1v8",
+ .supply = "dvdd",
},
};
/* Not gated */
static struct regulator_consumer_supply fixed_reg_usb1_vbus_supply[] = {
REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.0"),
+ REGULATOR_SUPPLY("usb_vbus", "tegra-otg"),
};
/* Not Gated */
tegra_platform_edp_init(pismo_soctherm_data.therm[THERM_CPU].trips,
&pismo_soctherm_data.therm[THERM_CPU].num_trips,
6000); /* edp temperature margin */
- tegra_add_tj_trips(pismo_soctherm_data.therm[THERM_CPU].trips,
+ tegra_add_cpu_vmax_trips(pismo_soctherm_data.therm[THERM_CPU].trips,
+ &pismo_soctherm_data.therm[THERM_CPU].num_trips);
+ tegra_add_core_edp_trips(pismo_soctherm_data.therm[THERM_CPU].trips,
&pismo_soctherm_data.therm[THERM_CPU].num_trips);
return tegra11_soctherm_init(&pismo_soctherm_data);