ARM: tegra12: set CPU rate to 2.2GHz for sku 0x87
[linux-3.10.git] / arch / arm / mach-tegra / board-common.c
index 575d286..c259533 100644 (file)
@@ -21,8 +21,8 @@
 
 #include <linux/clk.h>
 #include <linux/serial_8250.h>
+#include <linux/clk/tegra.h>
 
-#include <mach/clk.h>
 #include <mach/edp.h>
 
 #include "board.h"
@@ -30,6 +30,7 @@
 #include "devices.h"
 #include "clock.h"
 #include "dvfs.h"
+#include "cpu-tegra.h"
 
 extern unsigned long  debug_uart_port_base;
 extern struct clk *debug_uart_clk;
@@ -118,8 +119,10 @@ int uart_console_debug_init(int default_debug_port)
 
        if (!IS_ERR_OR_NULL(debug_uart_clk)) {
                struct clk *c;
+#ifndef CONFIG_COMMON_CLK
                pr_info("The debug console clock name is %s\n",
                                                debug_uart_clk->name);
+#endif
                c = tegra_get_clock_by_name("pll_p");
                if (IS_ERR_OR_NULL(c))
                        pr_err("Not getting the parent clock pll_p\n");
@@ -164,24 +167,53 @@ static void tegra_add_trip_points(struct thermal_trip_info *trips,
        }
 }
 
-void tegra_add_cdev_trips(struct thermal_trip_info *trips, int *num_trips)
+void tegra_add_all_vmin_trips(struct thermal_trip_info *trips, int *num_trips)
 {
        tegra_add_trip_points(trips, num_trips, tegra_dvfs_get_cpu_vmin_cdev());
        tegra_add_trip_points(trips, num_trips,
                              tegra_dvfs_get_core_vmin_cdev());
+       tegra_add_trip_points(trips, num_trips, tegra_dvfs_get_gpu_vmin_cdev());
+}
+
+void tegra_add_cpu_vmin_trips(struct thermal_trip_info *trips, int *num_trips)
+{
+       tegra_add_trip_points(trips, num_trips,
+                                       tegra_dvfs_get_cpu_vmin_cdev());
+}
+
+void tegra_add_gpu_vmin_trips(struct thermal_trip_info *trips, int *num_trips)
+{
+       tegra_add_trip_points(trips, num_trips,
+                                       tegra_dvfs_get_gpu_vmin_cdev());
+}
+
+void tegra_add_core_vmin_trips(struct thermal_trip_info *trips, int *num_trips)
+{
+       tegra_add_trip_points(trips, num_trips,
+                                       tegra_dvfs_get_core_vmin_cdev());
 }
 
-void tegra_add_tj_trips(struct thermal_trip_info *trips, int *num_trips)
+void tegra_add_cpu_vmax_trips(struct thermal_trip_info *trips, int *num_trips)
 {
        tegra_add_trip_points(trips, num_trips, tegra_dvfs_get_cpu_vmax_cdev());
+}
+
+void tegra_add_core_edp_trips(struct thermal_trip_info *trips, int *num_trips)
+{
        tegra_add_trip_points(trips, num_trips, tegra_core_edp_get_cdev());
 }
 
-#if defined(CONFIG_ARCH_TEGRA_11x_SOC)
+void tegra_add_tgpu_trips(struct thermal_trip_info *trips, int *num_trips)
+{
+       tegra_add_trip_points(trips, num_trips, tegra_dvfs_get_gpu_vts_cdev());
+}
+
 void tegra_add_vc_trips(struct thermal_trip_info *trips, int *num_trips)
 {
-#ifdef CONFIG_CPU_FREQ
        tegra_add_trip_points(trips, num_trips, tegra_vc_get_cdev());
-#endif
 }
-#endif
+void tegra_add_core_vmax_trips(struct thermal_trip_info *trips, int *num_trips)
+{
+       tegra_add_trip_points(trips, num_trips,
+                             tegra_dvfs_get_core_vmax_cdev());
+}