/*
* arch/arm/mach-tegra/board-bonaire.c
*
- * Copyright (c) 2011, NVIDIA Corporation.
+ * Copyright (C) 2013 NVIDIA Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/platform_data/tegra_usb.h>
+#include <linux/platform_data/serial-tegra.h>
+#include <linux/of_platform.h>
+#include <linux/clk/tegra.h>
+#include <linux/tegra-soc.h>
+#include <linux/usb/tegra_usb_phy.h>
+#include <linux/clocksource.h>
+#include <linux/irqchip.h>
+#include <linux/pci-tegra.h>
-#include <mach/clk.h>
#include <mach/gpio-tegra.h>
-#include <mach/iomap.h>
#include <mach/io_dpd.h>
#include <mach/irqs.h>
#include <mach/pinmux.h>
-#include <mach/iomap.h>
-#include <mach/io.h>
#include <mach/i2s.h>
#include <mach/audio.h>
-#include <mach/usb_phy.h>
#include <mach/nand.h>
-#include <mach/hardware.h>
-#include <asm/hardware/gic.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include "clock.h"
#include "common.h"
#include "devices.h"
-#include "fuse.h"
#include "gpio-names.h"
+#include "iomap.h"
#define ENABLE_OTG 0
+/*#define USB_HOST_ONLY*/
static struct plat_serial8250_port debug_uart_platform_data[] = {
{
{ "uartc", "clk_m", 13000000, true},
{ "uartd", "clk_m", 13000000, true},
{ "uarte", "clk_m", 13000000, true},
+ { "sdmmc1", "clk_m", 26000000, false},
+ { "sdmmc3", "clk_m", 26000000, false},
+ { "sdmmc4", "clk_m", 26000000, false},
{ "pll_m", NULL, 0, true},
{ "blink", "clk_32k", 32768, false},
{ "pll_p_out4", "pll_p", 24000000, true },
},
};
-static struct tegra_i2c_platform_data bonaire_i2c1_platform_data = {
- .adapter_nr = 0,
- .bus_count = 1,
- .bus_clk_rate = 100000,
-};
-
-#if 0 /* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
-static const struct tegra_pingroup_config i2c2_ddc = {
- .pingroup = TEGRA_PINGROUP_DDC,
- .func = TEGRA_MUX_I2C2,
-};
-
-static const struct tegra_pingroup_config i2c2_gen2 = {
- .pingroup = TEGRA_PINGROUP_PTA,
- .func = TEGRA_MUX_I2C2,
-};
-#endif
-
-static struct tegra_i2c_platform_data bonaire_i2c2_platform_data = {
- .adapter_nr = 1,
- .bus_count = 2,
- .bus_clk_rate = { 100000, 100000 },
-#if 0 /* !!!FIXME!!!! TESE ARE VENTANA SETTINGS */
- .bus_mux = { &i2c2_ddc, &i2c2_gen2 },
- .bus_mux_len = { 1, 1 },
-#endif
-};
-
-static struct tegra_i2c_platform_data bonaire_i2c3_platform_data = {
- .adapter_nr = 3,
- .bus_count = 1,
- .bus_clk_rate = { 100000, 0 },
-};
-
-static struct tegra_i2c_platform_data bonaire_i2c4_platform_data = {
- .adapter_nr = 4,
- .bus_count = 1,
- .bus_clk_rate = { 100000, 0 },
-};
-
-static struct tegra_i2c_platform_data bonaire_i2c5_platform_data = {
- .adapter_nr = 5,
- .bus_count = 1,
- .bus_clk_rate = { 100000, 0 },
-};
-
static void bonaire_i2c_init(void)
{
- tegra_i2c_device1.dev.platform_data = &bonaire_i2c1_platform_data;
- tegra_i2c_device2.dev.platform_data = &bonaire_i2c2_platform_data;
- tegra_i2c_device3.dev.platform_data = &bonaire_i2c3_platform_data;
- tegra_i2c_device4.dev.platform_data = &bonaire_i2c4_platform_data;
- tegra_i2c_device5.dev.platform_data = &bonaire_i2c5_platform_data;
-
i2c_register_board_info(0, bonaire_i2c_bus1_board_info, 1);
+}
- platform_device_register(&tegra_i2c_device5);
- platform_device_register(&tegra_i2c_device4);
- platform_device_register(&tegra_i2c_device3);
- platform_device_register(&tegra_i2c_device2);
- platform_device_register(&tegra_i2c_device1);
+static void bonaire_apbdma_init(void)
+{
+ platform_device_register(&tegra_apbdma);
}
#define GPIO_KEY(_id, _gpio, _iswake) \
};
#endif
-#if defined(CONFIG_TEGRA_SIMULATION_PLATFORM) && defined(CONFIG_SMC91X)
-static struct resource tegra_sim_smc91x_resources[] = {
- [0] = {
- .start = TEGRA_SIM_ETH_BASE,
- .end = TEGRA_SIM_ETH_BASE + TEGRA_SIM_ETH_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = IRQ_ETH,
- .end = IRQ_ETH,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device tegra_sim_smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .num_resources = ARRAY_SIZE(tegra_sim_smc91x_resources),
- .resource = tegra_sim_smc91x_resources,
-};
-#endif
-
static struct platform_device *bonaire_devices[] __initdata = {
#if ENABLE_OTG
&tegra_otg_device,
#endif
&debug_uart,
- &tegra_uartb_device,
- &tegra_uartc_device,
- &tegra_uartd_device,
- &tegra_uarte_device,
&tegra_pmu_device,
&tegra_rtc_device,
+#if !defined(USB_HOST_ONLY)
&tegra_udc_device,
-#if defined(CONFIG_TEGRA_IOVMM_SMMU)
- &tegra_smmu_device,
+#endif
+#if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
+ &tegra12_se_device,
#endif
&bonaire_keys_device,
#if defined(CONFIG_SND_HDA_TEGRA)
#if defined(CONFIG_MTD_NAND_TEGRA)
&tegra_nand_device,
#endif
-#if defined(CONFIG_TEGRA_SIMULATION_PLATFORM) && defined(CONFIG_SMC91X)
- &tegra_sim_smc91x_device,
-#endif
};
static int __init bonaire_touch_init(void)
return 0;
}
-#if defined(USB_HOST_ONLY)
-static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
- [0] = {
- .phy_config = &utmi_phy_config[0],
- .operating_mode = TEGRA_USB_HOST,
- .power_down_on_bus_suspend = 0,
- },
- [1] = {
- .phy_config = &ulpi_phy_config,
- .operating_mode = TEGRA_USB_HOST,
- .power_down_on_bus_suspend = 1,
- },
- [2] = {
- .phy_config = &utmi_phy_config[1],
- .operating_mode = TEGRA_USB_HOST,
- .power_down_on_bus_suspend = 0,
- },
-};
-#endif
-
static struct tegra_usb_platform_data tegra_udc_pdata = {
- .port_otg = true,
+ .port_otg = false,
.has_hostpc = true,
.phy_intf = TEGRA_USB_PHY_INTF_UTMI,
.op_mode = TEGRA_USB_OPMODE_DEVICE,
};
static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
- .port_otg = true,
+ .port_otg = false,
.has_hostpc = true,
.phy_intf = TEGRA_USB_PHY_INTF_UTMI,
.op_mode = TEGRA_USB_OPMODE_HOST,
.u_data.host = {
.vbus_gpio = -1,
- .vbus_reg = "vdd_vbus_micro_usb",
+ /*.vbus_reg = "vdd_vbus_micro_usb",*/
.hot_plug = true,
.remote_wakeup_supported = true,
.power_off_on_suspend = true,
.op_mode = TEGRA_USB_OPMODE_HOST,
.u_data.host = {
.vbus_gpio = -1,
- .vbus_reg = "vdd_vbus_typea_usb",
+ /*.vbus_reg = "vdd_vbus_typea_usb",*/
.hot_plug = true,
.remote_wakeup_supported = true,
.power_off_on_suspend = true,
#endif
}
+static struct platform_device *bonaire_hs_uart_devices[] __initdata = {
+ &tegra_uartd_device, &tegra_uartb_device, &tegra_uartc_device,
+};
+
+static struct tegra_serial_platform_data bonaire_uartb_pdata = {
+ .dma_req_selector = 9,
+ .modem_interrupt = false,
+};
+static struct tegra_serial_platform_data bonaire_uartc_pdata = {
+ .dma_req_selector = 10,
+ .modem_interrupt = false,
+};
+static struct tegra_serial_platform_data bonaire_uartd_pdata = {
+ .dma_req_selector = 19,
+ .modem_interrupt = false,
+};
+
+static void __init bonaire_hs_uart_init(void)
+{
+ tegra_uartb_device.dev.platform_data = &bonaire_uartb_pdata;
+ tegra_uartc_device.dev.platform_data = &bonaire_uartc_pdata;
+ tegra_uartd_device.dev.platform_data = &bonaire_uartd_pdata;
+ platform_add_devices(bonaire_hs_uart_devices,
+ ARRAY_SIZE(bonaire_hs_uart_devices));
+}
+
+static struct tegra_pci_platform_data bonaire_pcie_platform_data = {
+ .port_status[0] = 1,
+ .port_status[1] = 1,
+ .gpio_hot_plug = TEGRA_GPIO_PO1,
+};
+
+static void bonaire_pcie_init(void)
+{
+ tegra_pci_device.dev.platform_data = &bonaire_pcie_platform_data;
+ platform_device_register(&tegra_pci_device);
+}
+
static void __init tegra_bonaire_init(void)
{
tegra_clk_init_from_table(bonaire_clk_init_table);
tegra_enable_pinmux();
bonaire_pinmux_init();
+ tegra_soc_device_init("bonaire");
+ bonaire_apbdma_init();
- if (tegra_revision == TEGRA_REVISION_QT)
+ if (tegra_platform_is_fpga() && tegra_platform_is_qt())
debug_uart_platform_data[0].uartclk =
tegra_clk_measure_input_freq();
platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));
-#ifdef CONFIG_TEGRA_SIMULATION_PLATFORM
- bonaire_power_off_init();
-#endif
+ if (tegra_cpu_is_asim())
+ bonaire_power_off_init();
tegra_io_dpd_init();
-
+ bonaire_hs_uart_init();
bonaire_sdhci_init();
bonaire_i2c_init();
bonaire_regulator_init();
bonaire_touch_init();
bonaire_usb_init();
bonaire_panel_init();
+ bonaire_sensors_init();
bonaire_bt_rfkill();
+ bonaire_pcie_init();
+ tegra_register_fuse();
+}
+
+#ifdef CONFIG_USE_OF
+struct of_dev_auxdata tegra_bonaire_auxdata_lookup[] __initdata = {
+ OF_DEV_AUXDATA("nvidia,tegra124-host1x", TEGRA_HOST1X_BASE, "host1x",
+ NULL),
+ OF_DEV_AUXDATA("nvidia,tegra124-gk20a", TEGRA_GK20A_BAR0_BASE,
+ "gk20a.0", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra124-vic", TEGRA_VIC_BASE, "vic03.0", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra124-msenc", TEGRA_MSENC_BASE, "msenc",
+ NULL),
+ OF_DEV_AUXDATA("nvidia,tegra124-vi", TEGRA_VI_BASE, "vi.0", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISP_BASE, "isp.0", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISPB_BASE, "isp.1", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra124-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
+ T124_I2C_OF_DEV_AUXDATA,
+ {}
+};
+#endif
+
+static void __init tegra_bonaire_dt_init(void)
+{
+ of_platform_populate(NULL, of_default_bus_match_table,
+ tegra_bonaire_auxdata_lookup, &platform_bus);
+
+ tegra_bonaire_init();
}
static void __init tegra_bonaire_reserve(void)
{
#if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
- tegra_reserve(0, SZ_4M, 0);
+ tegra_reserve(0, SZ_16M + SZ_2M, SZ_16M);
#else
-#if defined(CONFIG_TEGRA_SIMULATION_SPLIT_MEM)
- if (tegra_split_mem_active())
+ if (tegra_cpu_is_asim() && tegra_split_mem_active())
tegra_reserve(0, 0, 0);
else
-#endif
- tegra_reserve(SZ_128M, SZ_4M, 0);
+ tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_16M);
#endif
}
+static const char * const bonaire_dt_board_compat[] = {
+ "nvidia,bonaire",
+ NULL
+};
-MACHINE_START(BONAIRE, BONAIRE_BOARD_NAME)
+MACHINE_START(BONAIRE, "bonaire")
.atag_offset = 0x80000100,
- .soc = &tegra_soc_desc,
.map_io = tegra_map_common_io,
.reserve = tegra_bonaire_reserve,
.init_early = tegra12x_init_early,
- .init_irq = tegra_init_irq,
- .handle_irq = gic_handle_irq,
- .init_machine = tegra_bonaire_init,
- .timer = &tegra_timer,
+ .init_irq = irqchip_init,
+ .init_machine = tegra_bonaire_dt_init,
+ .init_time = clocksource_of_init,
+ .dt_compat = bonaire_dt_board_compat,
MACHINE_END