ARM: tegra12: set CPU rate to 2.2GHz for sku 0x87
[linux-3.10.git] / arch / arm / mach-tegra / board-bonaire.c
index 032ddb7..205ef6e 100644 (file)
@@ -1,7 +1,7 @@
 /*
  * arch/arm/mach-tegra/board-bonaire.c
  *
- * Copyright (c) 2013, NVIDIA Corporation.
+ * Copyright (C) 2013 NVIDIA Corporation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -26,8 +26,6 @@
 #include <linux/clk.h>
 #include <linux/serial_8250.h>
 #include <linux/i2c.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/spi-tegra.h>
 #include <linux/i2c/panjit_ts.h>
 #include <linux/dma-mapping.h>
 #include <linux/delay.h>
 #include <linux/gpio_keys.h>
 #include <linux/input.h>
 #include <linux/platform_data/tegra_usb.h>
-#include <linux/tegra_uart.h>
-#include <linux/serial_tegra.h>
-#include <mach/clk.h>
+#include <linux/platform_data/serial-tegra.h>
+#include <linux/of_platform.h>
+#include <linux/clk/tegra.h>
+#include <linux/tegra-soc.h>
+#include <linux/usb/tegra_usb_phy.h>
+#include <linux/clocksource.h>
+#include <linux/irqchip.h>
+#include <linux/pci-tegra.h>
+
 #include <mach/gpio-tegra.h>
-#include <mach/iomap.h>
 
 #include <mach/io_dpd.h>
 
 #include <mach/irqs.h>
 #include <mach/pinmux.h>
-#include <mach/iomap.h>
-#include <mach/io.h>
 #include <mach/i2s.h>
 #include <mach/audio.h>
-#include <mach/usb_phy.h>
 #include <mach/nand.h>
-#include <mach/pci.h>
-#include <mach/hardware.h>
 
-#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
@@ -64,8 +61,8 @@
 #include "clock.h"
 #include "common.h"
 #include "devices.h"
-#include "fuse.h"
 #include "gpio-names.h"
+#include "iomap.h"
 
 #define ENABLE_OTG 0
 /*#define USB_HOST_ONLY*/
@@ -161,63 +158,9 @@ static struct i2c_board_info __initdata bonaire_i2c_bus1_board_info[] = {
        },
 };
 
-static struct tegra_i2c_platform_data bonaire_i2c1_platform_data = {
-       .bus_clk_rate   = 100000,
-};
-
-#if 0  /* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
-static const struct tegra_pingroup_config i2c2_ddc = {
-       .pingroup       = TEGRA_PINGROUP_DDC,
-       .func           = TEGRA_MUX_I2C2,
-};
-
-static const struct tegra_pingroup_config i2c2_gen2 = {
-       .pingroup       = TEGRA_PINGROUP_PTA,
-       .func           = TEGRA_MUX_I2C2,
-};
-#endif
-
-static struct tegra_i2c_platform_data bonaire_i2c2_platform_data = {
-       .bus_clk_rate   = 100000,
-#if 0  /* !!!FIXME!!!! TESE ARE VENTANA SETTINGS */
-       .bus_mux        = { &i2c2_ddc, &i2c2_gen2 },
-       .bus_mux_len    = { 1, 1 },
-#endif
-};
-
-static struct tegra_i2c_platform_data bonaire_i2c3_platform_data = {
-       .bus_clk_rate   = 100000,
-};
-
-static struct tegra_i2c_platform_data bonaire_i2c4_platform_data = {
-       .bus_clk_rate   = 100000,
-};
-
-static struct tegra_i2c_platform_data bonaire_i2c5_platform_data = {
-       .bus_clk_rate   = 100000,
-};
-
-static struct tegra_i2c_platform_data bonaire_i2c6_platform_data = {
-       .bus_clk_rate   = 100000,
-};
-
 static void bonaire_i2c_init(void)
 {
-       tegra14_i2c_device1.dev.platform_data = &bonaire_i2c1_platform_data;
-       tegra14_i2c_device2.dev.platform_data = &bonaire_i2c2_platform_data;
-       tegra14_i2c_device3.dev.platform_data = &bonaire_i2c3_platform_data;
-       tegra14_i2c_device4.dev.platform_data = &bonaire_i2c4_platform_data;
-       tegra14_i2c_device5.dev.platform_data = &bonaire_i2c5_platform_data;
-       tegra14_i2c_device6.dev.platform_data = &bonaire_i2c6_platform_data;
-
        i2c_register_board_info(0, bonaire_i2c_bus1_board_info, 1);
-
-       platform_device_register(&tegra14_i2c_device6);
-       platform_device_register(&tegra14_i2c_device5);
-       platform_device_register(&tegra14_i2c_device4);
-       platform_device_register(&tegra14_i2c_device3);
-       platform_device_register(&tegra14_i2c_device2);
-       platform_device_register(&tegra14_i2c_device1);
 }
 
 static void bonaire_apbdma_init(void)
@@ -225,53 +168,6 @@ static void bonaire_apbdma_init(void)
        platform_device_register(&tegra_apbdma);
 }
 
-static struct platform_device *bonaire_spi_devices[] __initdata = {
-       &tegra11_spi_device4,
-};
-
-/* struct spi_clk_parent spi_parent_clk_bonaire[] = { */
-/*     [0] = {.name = "pll_p"}, */
-/* #ifndef CONFIG_TEGRA_PLLM_RESTRICTED */
-/*     [1] = {.name = "pll_m"}, */
-/*     [2] = {.name = "clk_m"}, */
-/* #else */
-/*     [1] = {.name = "clk_m"}, */
-/* #endif */
-/* }; */
-
-/* static struct tegra_spi_platform_data bonaire_spi_pdata = { */
-/*     .is_dma_based           = true, */
-/*     .max_dma_buffer         = 16 * 1024, */
-/*     .is_clkon_always        = false, */
-/*     .max_rate               = 25000000, */
-/* }; */
-
-/* static void __init bonaire_spi_init(void) */
-/* { */
-/*     int i; */
-/*     struct clk *c; */
-/*     struct board_info board_info, display_board_info; */
-
-/*     tegra_get_board_info(&board_info); */
-/*     tegra_get_display_board_info(&display_board_info); */
-
-/*     for (i = 0; i < ARRAY_SIZE(spi_parent_clk_bonaire); ++i) { */
-/*             c = tegra_get_clock_by_name(spi_parent_clk_bonaire[i].name); */
-/*             if (IS_ERR_OR_NULL(c)) { */
-/*                     pr_err("Not able to get the clock for %s\n", */
-/*                                     spi_parent_clk_bonaire[i].name); */
-/*             continue; */
-/*             } */
-/*             spi_parent_clk_bonaire[i].parent_clk = c; */
-/*             spi_parent_clk_bonaire[i].fixed_clk_rate = clk_get_rate(c); */
-/*     } */
-/*     bonaire_spi_pdata.parent_clk_list = spi_parent_clk_bonaire; */
-/*     bonaire_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_bonaire); */
-/*     tegra11_spi_device4.dev.platform_data = &bonaire_spi_pdata; */
-/*     platform_add_devices(bonaire_spi_devices, */
-/*                     ARRAY_SIZE(bonaire_spi_devices)); */
-/* } */
-
 #define GPIO_KEY(_id, _gpio, _iswake)          \
        {                                       \
                .code = _id,                    \
@@ -538,10 +434,6 @@ static struct platform_device *bonaire_hs_uart_devices[] __initdata = {
        &tegra_uartd_device, &tegra_uartb_device, &tegra_uartc_device,
 };
 
-static struct uart_clk_parent uart_parent_clk[] = {
-       [0] = {.name = "clk_m"},
-};
-
 static struct tegra_serial_platform_data bonaire_uartb_pdata = {
        .dma_req_selector = 9,
        .modem_interrupt = false,
@@ -555,11 +447,8 @@ static struct tegra_serial_platform_data bonaire_uartd_pdata = {
        .modem_interrupt = false,
 };
 
-static struct tegra_uart_platform_data bonaire_loopback_uart_pdata;
-
 static void __init bonaire_hs_uart_init(void)
 {
-       bonaire_loopback_uart_pdata.is_loopback = true;
        tegra_uartb_device.dev.platform_data = &bonaire_uartb_pdata;
        tegra_uartc_device.dev.platform_data = &bonaire_uartc_pdata;
        tegra_uartd_device.dev.platform_data = &bonaire_uartd_pdata;
@@ -570,8 +459,7 @@ static void __init bonaire_hs_uart_init(void)
 static struct tegra_pci_platform_data bonaire_pcie_platform_data = {
        .port_status[0] = 1,
        .port_status[1] = 1,
-       .use_dock_detect        = 1,
-       .gpio                   = TEGRA_GPIO_PO1,
+       .gpio_hot_plug  = TEGRA_GPIO_PO1,
 };
 
 static void bonaire_pcie_init(void)
@@ -583,27 +471,21 @@ static void bonaire_pcie_init(void)
 static void __init tegra_bonaire_init(void)
 {
        tegra_clk_init_from_table(bonaire_clk_init_table);
-       tegra_enable_pinmux();
-       bonaire_pinmux_init();
        tegra_soc_device_init("bonaire");
        bonaire_apbdma_init();
 
-#ifdef CONFIG_TEGRA_FPGA_PLATFORM
-       if (tegra_platform_is_qt())
+       if (tegra_platform_is_fpga() && tegra_platform_is_qt())
                debug_uart_platform_data[0].uartclk =
                                                tegra_clk_measure_input_freq();
-#endif
 
        platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));
 
-#ifdef CONFIG_TEGRA_SIMULATION_PLATFORM
-       bonaire_power_off_init();
-#endif
+       if (tegra_cpu_is_asim())
+               bonaire_power_off_init();
        tegra_io_dpd_init();
        bonaire_hs_uart_init();
        bonaire_sdhci_init();
        bonaire_i2c_init();
-       /* bonaire_spi_init(); */
        bonaire_regulator_init();
        bonaire_suspend_init();
        bonaire_touch_init();
@@ -615,16 +497,40 @@ static void __init tegra_bonaire_init(void)
        tegra_register_fuse();
 }
 
+#ifdef CONFIG_USE_OF
+struct of_dev_auxdata tegra_bonaire_auxdata_lookup[] __initdata = {
+       OF_DEV_AUXDATA("nvidia,tegra124-host1x", TEGRA_HOST1X_BASE, "host1x",
+               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-gk20a", TEGRA_GK20A_BAR0_BASE,
+               "gk20a.0", NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-vic", TEGRA_VIC_BASE, "vic03.0", NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-msenc", TEGRA_MSENC_BASE, "msenc",
+               NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-vi", TEGRA_VI_BASE, "vi.0", NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISP_BASE, "isp.0", NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISPB_BASE, "isp.1", NULL),
+       OF_DEV_AUXDATA("nvidia,tegra124-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
+       T124_I2C_OF_DEV_AUXDATA,
+       {}
+};
+#endif
+
+static void __init tegra_bonaire_dt_init(void)
+{
+       of_platform_populate(NULL, of_default_bus_match_table,
+               tegra_bonaire_auxdata_lookup, &platform_bus);
+
+       tegra_bonaire_init();
+}
+
 static void __init tegra_bonaire_reserve(void)
 {
 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
        tegra_reserve(0, SZ_16M + SZ_2M, SZ_16M);
 #else
-#if defined(CONFIG_TEGRA_SIMULATION_SPLIT_MEM)
-       if (tegra_split_mem_active())
+       if (tegra_cpu_is_asim() && tegra_split_mem_active())
                tegra_reserve(0, 0, 0);
        else
-#endif
                tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_16M);
 #endif
 }
@@ -634,14 +540,13 @@ static const char * const bonaire_dt_board_compat[] = {
        NULL
 };
 
-MACHINE_START(BONAIRE, BONAIRE_BOARD_NAME)
+MACHINE_START(BONAIRE, "bonaire")
        .atag_offset    = 0x80000100,
        .map_io         = tegra_map_common_io,
        .reserve        = tegra_bonaire_reserve,
        .init_early     = tegra12x_init_early,
-       .init_irq       = tegra_dt_init_irq,
-       .handle_irq     = gic_handle_irq,
-       .init_machine   = tegra_bonaire_init,
-       .timer          = &tegra_sys_timer,
+       .init_irq       = irqchip_init,
+       .init_machine   = tegra_bonaire_dt_init,
+       .init_time      = clocksource_of_init,
        .dt_compat      = bonaire_dt_board_compat,
 MACHINE_END