ASoC: Tegra: use GPIO based HS detection
[linux-3.10.git] / sound / soc / tegra / tegra_max98090.c
1 /*
2  * tegra_max98090.c - Tegra machine ASoC driver for boards using
3  * MAX98090 codec.
4  *
5  * Author: Kamal Kannan Balagopalan <kbalagopalan@nvidia.com>
6  *
7  * Copyright 2007 Wolfson Microelectronics PLC.
8  * Author: Graeme Gregory
9  *         graeme.gregory@wolfsonmicro.com or linux@wolfsonmicro.com
10  *
11  * Copyright (c) 2010-2014, NVIDIA CORPORATION. All rights reserved.
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License
14  * version 2 as published by the Free Software Foundation.
15  *
16  * This program is distributed in the hope that it will be useful, but
17  * WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19  * General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24  * 02110-1301 USA
25  *
26  */
27
28 #include <asm/mach-types.h>
29
30 #include <linux/clk.h>
31 #include <linux/module.h>
32 #include <linux/platform_device.h>
33 #include <linux/slab.h>
34 #include <linux/gpio.h>
35 #include <linux/regulator/consumer.h>
36 #ifdef CONFIG_SWITCH
37 #include <linux/switch.h>
38 #endif
39
40 #include <mach/tegra_asoc_pdata.h>
41
42 #include <sound/core.h>
43 #include <sound/jack.h>
44 #include <sound/pcm.h>
45 #include <sound/pcm_params.h>
46 #include <sound/soc.h>
47
48 #include "../codecs/max98090.h"
49 #include "../codecs/max97236.h"
50
51 #include "tegra_pcm.h"
52 #include "tegra_asoc_utils.h"
53 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
54 #include "tegra30_ahub.h"
55 #include "tegra30_i2s.h"
56 #include "tegra30_dam.h"
57 #endif
58 #define DRV_NAME "tegra-snd-max98090"
59
60 #ifndef __devinit
61 #define __devinit
62 #endif
63 #ifndef __devexit
64 #define __devexit
65 #endif
66 #ifndef __devexit_p
67 #define __devexit_p(x)  (x)
68 #endif
69
70 #define GPIO_SPKR_EN    BIT(0)
71 #define GPIO_HP_MUTE    BIT(1)
72 #define GPIO_INT_MIC_EN BIT(2)
73 #define GPIO_EXT_MIC_EN BIT(3)
74 #define GPIO_HP_DET     BIT(4)
75
76 #define DAI_LINK_HIFI           0
77 #define DAI_LINK_BTSCO          1
78 #define DAI_LINK_VOICE_CALL     2
79 #define DAI_LINK_BT_VOICE_CALL  3
80 #define DAI_LINK_HIFI_MAX97236  4
81
82 const char *tegra_max98090_i2s_dai_name[TEGRA30_NR_I2S_IFC] = {
83         "tegra30-i2s.0",
84         "tegra30-i2s.1",
85         "tegra30-i2s.2",
86         "tegra30-i2s.3",
87         "tegra30-i2s.4",
88 };
89
90 struct tegra_max98090 {
91         struct tegra_asoc_utils_data util_data;
92         struct tegra_asoc_platform_data *pdata;
93         int gpio_requested;
94         bool init_done;
95         int is_call_mode;
96         int is_device_bt;
97         struct codec_config codec_info[NUM_I2S_DEVICES];
98         struct ahub_bbc1_config ahub_bbc1_info;
99         struct regulator *avdd_aud_reg;
100         struct regulator *vdd_sw_1v8_reg;
101         enum snd_soc_bias_level bias_level;
102         struct snd_soc_card *pcard;
103 #ifdef CONFIG_SWITCH
104         int jack_status;
105 #endif
106         int clock_enabled;
107 };
108
109 static int tegra_call_mode_info(struct snd_kcontrol *kcontrol,
110                         struct snd_ctl_elem_info *uinfo)
111 {
112         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
113         uinfo->count = 1;
114         uinfo->value.integer.min = 0;
115         uinfo->value.integer.max = 1;
116         return 0;
117 }
118
119 static int tegra_call_mode_get(struct snd_kcontrol *kcontrol,
120                 struct snd_ctl_elem_value *ucontrol)
121 {
122         struct tegra_max98090 *machine = snd_kcontrol_chip(kcontrol);
123
124         ucontrol->value.integer.value[0] = machine->is_call_mode;
125
126         return 0;
127 }
128
129 static int tegra_call_mode_put(struct snd_kcontrol *kcontrol,
130                 struct snd_ctl_elem_value *ucontrol)
131 {
132         struct tegra_max98090 *machine = snd_kcontrol_chip(kcontrol);
133         int is_call_mode_new = ucontrol->value.integer.value[0];
134         int codec_index;
135         unsigned int i;
136
137         if (machine->is_call_mode == is_call_mode_new)
138                 return 0;
139
140         if (machine->is_device_bt)
141                 codec_index = BT_SCO;
142         else
143                 codec_index = HIFI_CODEC;
144
145         if (is_call_mode_new) {
146                 if (machine->codec_info[codec_index].rate == 0 ||
147                         machine->codec_info[codec_index].channels == 0)
148                                 return -EINVAL;
149
150                 for (i = 0; i < machine->pcard->num_links; i++)
151                         machine->pcard->dai_link[i].ignore_suspend = 1;
152
153 #if defined(CONFIG_ARCH_TEGRA_14x_SOC)
154         tegra_asoc_utils_tristate_dap(
155                 machine->codec_info[codec_index].i2s_id, false);
156         if (machine->is_device_bt) {
157                 t14x_make_bt_voice_call_connections(
158                         &machine->codec_info[codec_index],
159                         &machine->ahub_bbc1_info, 0);
160         } else {
161                 t14x_make_voice_call_connections(
162                         &machine->codec_info[codec_index],
163                         &machine->ahub_bbc1_info, 0);
164         }
165 #else
166                 tegra30_make_voice_call_connections(
167                         &machine->codec_info[codec_index],
168                         &machine->codec_info[BASEBAND], 0);
169 #endif
170         } else {
171 #if defined(CONFIG_ARCH_TEGRA_14x_SOC)
172                 if (machine->is_device_bt) {
173                         t14x_break_bt_voice_call_connections(
174                                 &machine->codec_info[codec_index],
175                                 &machine->ahub_bbc1_info, 0);
176                 } else {
177                         t14x_break_voice_call_connections(
178                         &machine->codec_info[codec_index],
179                         &machine->ahub_bbc1_info, 0);
180                 }
181                 tegra_asoc_utils_tristate_dap(
182                         machine->codec_info[codec_index].i2s_id, true);
183 #else
184                 tegra30_break_voice_call_connections(
185                         &machine->codec_info[codec_index],
186                         &machine->codec_info[BASEBAND], 0);
187 #endif
188
189                 for (i = 0; i < machine->pcard->num_links; i++)
190                         machine->pcard->dai_link[i].ignore_suspend = 0;
191         }
192
193         machine->is_call_mode = is_call_mode_new;
194         g_is_call_mode = machine->is_call_mode;
195
196         return 1;
197 }
198
199 struct snd_kcontrol_new tegra_max98090_call_mode_control = {
200         .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
201         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
202         .name = "Call Mode Switch",
203         .private_value = 0xffff,
204         .info = tegra_call_mode_info,
205         .get = tegra_call_mode_get,
206         .put = tegra_call_mode_put
207 };
208
209 static int tegra_max98090_set_dam_cif(int dam_ifc, int srate,
210                         int channels, int bit_size, int src_on, int src_srate,
211                         int src_channels, int src_bit_size)
212 {
213         tegra30_dam_set_gain(dam_ifc, TEGRA30_DAM_CHIN1, 0x1000);
214         tegra30_dam_set_samplerate(dam_ifc, TEGRA30_DAM_CHOUT,
215                                 srate);
216         tegra30_dam_set_samplerate(dam_ifc, TEGRA30_DAM_CHIN1,
217                                 srate);
218 #ifndef CONFIG_ARCH_TEGRA_3x_SOC
219         tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN1,
220                 channels, bit_size, channels,
221                                 32);
222         tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHOUT,
223                 channels, bit_size, channels,
224                                 32);
225 #else
226         tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN1,
227                 channels, bit_size, channels,
228                                 bit_size);
229         tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHOUT,
230                 channels, bit_size, channels,
231                                 bit_size);
232 #endif
233
234         if (src_on) {
235                 tegra30_dam_set_gain(dam_ifc, TEGRA30_DAM_CHIN0_SRC, 0x1000);
236                 tegra30_dam_set_samplerate(dam_ifc, TEGRA30_DAM_CHIN0_SRC,
237                         src_srate);
238 #ifndef CONFIG_ARCH_TEGRA_3x_SOC
239                 tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN0_SRC,
240                         src_channels, src_bit_size, 1, 32);
241 #else
242                 tegra30_dam_set_acif(dam_ifc, TEGRA30_DAM_CHIN0_SRC,
243                         src_channels, src_bit_size, 1, 16);
244 #endif
245         }
246
247         return 0;
248 }
249
250 static int tegra_max98090_hw_params(struct snd_pcm_substream *substream,
251                                         struct snd_pcm_hw_params *params)
252 {
253         struct snd_soc_pcm_runtime *rtd = substream->private_data;
254         struct snd_soc_dai *codec_dai = rtd->codec_dai;
255         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
256         struct snd_soc_codec *codec = rtd->codec;
257         struct snd_soc_card *card = codec->card;
258         struct tegra_max98090 *machine = snd_soc_card_get_drvdata(card);
259         struct tegra_asoc_platform_data *pdata = machine->pdata;
260         struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(cpu_dai);
261         int srate, mclk, sample_size, i2s_daifmt, i2s_master;
262         int err;
263         int rate;
264
265         i2s_master = pdata->i2s_param[HIFI_CODEC].is_i2s_master;
266
267         switch (params_format(params)) {
268         case SNDRV_PCM_FORMAT_S16_LE:
269                 sample_size = 16;
270                 break;
271         case SNDRV_PCM_FORMAT_S24_LE:
272                 sample_size = 24;
273                 break;
274         default:
275                 return -EINVAL;
276         }
277
278         srate = params_rate(params);
279         switch (srate) {
280         case 8000:
281         case 16000:
282         case 24000:
283         case 32000:
284         case 48000:
285         case 64000:
286         case 96000:
287                 mclk = 12288000;
288                 break;
289         case 11025:
290         case 22050:
291         case 44100:
292         case 88200:
293                 mclk = 11289600;
294                 break;
295         default:
296                 mclk = 12000000;
297                 break;
298         }
299
300         i2s_daifmt = SND_SOC_DAIFMT_NB_NF;
301         i2s_daifmt |= i2s_master ? SND_SOC_DAIFMT_CBS_CFS :
302                                 SND_SOC_DAIFMT_CBM_CFM;
303
304         switch (pdata->i2s_param[HIFI_CODEC].i2s_mode) {
305         case TEGRA_DAIFMT_I2S:
306                 i2s_daifmt |= SND_SOC_DAIFMT_I2S;
307                 break;
308         case TEGRA_DAIFMT_DSP_A:
309                 i2s_daifmt |= SND_SOC_DAIFMT_DSP_A;
310                 break;
311         case TEGRA_DAIFMT_DSP_B:
312                 i2s_daifmt |= SND_SOC_DAIFMT_DSP_B;
313                 break;
314         case TEGRA_DAIFMT_LEFT_J:
315                 i2s_daifmt |= SND_SOC_DAIFMT_LEFT_J;
316                 break;
317         case TEGRA_DAIFMT_RIGHT_J:
318                 i2s_daifmt |= SND_SOC_DAIFMT_RIGHT_J;
319                 break;
320         default:
321                 dev_err(card->dev, "Can't configure i2s format\n");
322                 return -EINVAL;
323         }
324
325         err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
326         if (err < 0) {
327                 if (!(machine->util_data.set_mclk % mclk))
328                         mclk = machine->util_data.set_mclk;
329                 else {
330                         dev_err(card->dev, "Can't configure clocks\n");
331                         return err;
332                 }
333         }
334
335         tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
336
337         rate = clk_get_rate(machine->util_data.clk_cdev1);
338
339         err = snd_soc_dai_set_fmt(cpu_dai, i2s_daifmt);
340         if (err < 0) {
341                 dev_err(card->dev, "cpu_dai fmt not set\n");
342                 return err;
343         }
344
345         err = snd_soc_dai_set_sysclk(codec_dai, 0, rate, SND_SOC_CLOCK_IN);
346
347         if (err < 0) {
348                 dev_err(card->dev, "codec_dai clock not set\n");
349                 return err;
350         }
351
352         if (pdata->i2s_param[HIFI_CODEC].i2s_mode == TEGRA_DAIFMT_I2S) {
353                 err = snd_soc_dai_set_fmt(codec_dai, i2s_daifmt);
354                 if (err < 0) {
355                         dev_err(card->dev, "codec_dai fmt not set\n");
356                         return err;
357                 }
358         } else {
359                 err = snd_soc_dai_set_tdm_slot(codec_dai, 3, 3, 2, sample_size);
360                 if (err < 0) {
361                         dev_err(card->dev, "codec_dai tdm mode not set\n");
362                         return err;
363                 }
364         }
365
366         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK && i2s->is_dam_used)
367                 tegra_max98090_set_dam_cif(i2s->dam_ifc, srate,
368                         params_channels(params), sample_size, 0, 0, 0, 0);
369
370         return 0;
371 }
372
373 static int tegra_bt_hw_params(struct snd_pcm_substream *substream,
374                 struct snd_pcm_hw_params *params)
375 {
376         struct snd_soc_pcm_runtime *rtd = substream->private_data;
377         struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(rtd->cpu_dai);
378         struct snd_soc_card *card = rtd->card;
379         struct tegra_max98090 *machine = snd_soc_card_get_drvdata(card);
380         struct tegra_asoc_platform_data *pdata = machine->pdata;
381         int err, srate, mclk, min_mclk, sample_size;
382         int i2s_daifmt;
383
384         switch (params_format(params)) {
385         case SNDRV_PCM_FORMAT_S16_LE:
386                 sample_size = 16;
387                 break;
388         default:
389                 return -EINVAL;
390         }
391
392         srate = params_rate(params);
393         switch (srate) {
394         case 11025:
395         case 22050:
396         case 44100:
397         case 88200:
398                 mclk = 11289600;
399                 break;
400         case 8000:
401         case 16000:
402         case 32000:
403         case 48000:
404         case 64000:
405         case 96000:
406                 mclk = 12288000;
407                 break;
408         default:
409                 return -EINVAL;
410         }
411         min_mclk = 64 * srate;
412
413         err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
414         if (err < 0) {
415                 if (!(machine->util_data.set_mclk % min_mclk))
416                         mclk = machine->util_data.set_mclk;
417                 else {
418                         dev_err(card->dev, "Can't configure clocks\n");
419                         return err;
420                 }
421         }
422
423         tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
424
425         i2s_daifmt = SND_SOC_DAIFMT_NB_NF;
426         i2s_daifmt |= pdata->i2s_param[BT_SCO].is_i2s_master ?
427                         SND_SOC_DAIFMT_CBS_CFS : SND_SOC_DAIFMT_CBM_CFM;
428
429         switch (pdata->i2s_param[BT_SCO].i2s_mode) {
430         case TEGRA_DAIFMT_I2S:
431                 i2s_daifmt |= SND_SOC_DAIFMT_I2S;
432                 break;
433         case TEGRA_DAIFMT_DSP_A:
434                 i2s_daifmt |= SND_SOC_DAIFMT_DSP_A;
435                 break;
436         case TEGRA_DAIFMT_DSP_B:
437                 i2s_daifmt |= SND_SOC_DAIFMT_DSP_B;
438                 break;
439         case TEGRA_DAIFMT_LEFT_J:
440                 i2s_daifmt |= SND_SOC_DAIFMT_LEFT_J;
441                 break;
442         case TEGRA_DAIFMT_RIGHT_J:
443                 i2s_daifmt |= SND_SOC_DAIFMT_RIGHT_J;
444                 break;
445         default:
446                 dev_err(card->dev, "Can't configure i2s format\n");
447                 return -EINVAL;
448         }
449
450         err = snd_soc_dai_set_fmt(rtd->cpu_dai, i2s_daifmt);
451         if (err < 0) {
452                 dev_err(rtd->codec->card->dev, "cpu_dai fmt not set\n");
453                 return err;
454         }
455
456         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK && i2s->is_dam_used)
457                 tegra_max98090_set_dam_cif(i2s->dam_ifc, params_rate(params),
458                         params_channels(params), sample_size, 0, 0, 0, 0);
459
460         return 0;
461 }
462
463 static int tegra_hw_free(struct snd_pcm_substream *substream)
464 {
465         struct snd_soc_pcm_runtime *rtd = substream->private_data;
466         struct tegra_max98090 *machine = snd_soc_card_get_drvdata(rtd->card);
467
468         tegra_asoc_utils_lock_clk_rate(&machine->util_data, 0);
469
470         return 0;
471 }
472
473 static int tegra_max98090_startup(struct snd_pcm_substream *substream)
474 {
475         struct snd_soc_pcm_runtime *rtd = substream->private_data;
476         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
477         struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(cpu_dai);
478         struct tegra_max98090 *machine = snd_soc_card_get_drvdata(rtd->card);
479         struct codec_config *codec_info;
480         struct codec_config *bb_info;
481         int codec_index;
482
483         tegra_asoc_utils_tristate_dap(i2s->id, false);
484
485         if (!i2s->is_dam_used)
486                 return 0;
487
488         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
489                 /*dam configuration*/
490                 if (!i2s->dam_ch_refcount)
491                         i2s->dam_ifc = tegra30_dam_allocate_controller();
492                 if (i2s->dam_ifc < 0)
493                         return i2s->dam_ifc;
494
495                 tegra30_dam_allocate_channel(i2s->dam_ifc, TEGRA30_DAM_CHIN1);
496                 i2s->dam_ch_refcount++;
497                 tegra30_dam_enable_clock(i2s->dam_ifc);
498
499                 tegra30_ahub_set_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX1 +
500                                 (i2s->dam_ifc*2), i2s->playback_fifo_cif);
501
502                 /*
503                 *make the dam tx to i2s rx connection if this is the only
504                 *client using i2s for playback
505                 */
506                 if (i2s->playback_ref_count == 1)
507                         tegra30_ahub_set_rx_cif_source(
508                                 TEGRA30_AHUB_RXCIF_I2S0_RX0 + i2s->id,
509                                 TEGRA30_AHUB_TXCIF_DAM0_TX0 + i2s->dam_ifc);
510
511                 /* enable the dam*/
512                 tegra30_dam_enable(i2s->dam_ifc, TEGRA30_DAM_ENABLE,
513                                 TEGRA30_DAM_CHIN1);
514         } else {
515
516                 i2s->is_call_mode_rec = machine->is_call_mode;
517
518                 if (!i2s->is_call_mode_rec)
519                         return 0;
520
521                 if (machine->is_device_bt)
522                         codec_index = BT_SCO;
523                 else
524                         codec_index = HIFI_CODEC;
525
526                 codec_info = &machine->codec_info[codec_index];
527                 bb_info = &machine->codec_info[BASEBAND];
528
529                 /* allocate a dam for voice call recording */
530
531                 i2s->call_record_dam_ifc = tegra30_dam_allocate_controller();
532                 if (i2s->call_record_dam_ifc < 0)
533                         return i2s->call_record_dam_ifc;
534
535                 tegra30_dam_allocate_channel(i2s->call_record_dam_ifc,
536                         TEGRA30_DAM_CHIN0_SRC);
537                 tegra30_dam_allocate_channel(i2s->call_record_dam_ifc,
538                         TEGRA30_DAM_CHIN1);
539                 tegra30_dam_enable_clock(i2s->call_record_dam_ifc);
540
541                 /* setup the connections for voice call record */
542                 tegra30_ahub_unset_rx_cif_source(i2s->capture_fifo_cif);
543 #if defined(CONFIG_ARCH_TEGRA_14x_SOC)
544                 /* configure the dam */
545                 tegra_max98090_set_dam_cif(i2s->call_record_dam_ifc,
546                         codec_info->rate, codec_info->channels,
547                         codec_info->bitsize, 1,
548                         machine->ahub_bbc1_info.rate,
549                         machine->ahub_bbc1_info.channels,
550                         machine->ahub_bbc1_info.sample_size);
551
552                 tegra30_ahub_set_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX0 +
553                         (i2s->call_record_dam_ifc*2),
554                         TEGRA30_AHUB_TXCIF_BBC1_TX0);
555 #else
556                 /* configure the dam */
557                 tegra_max98090_set_dam_cif(i2s->call_record_dam_ifc,
558                         codec_info->rate, codec_info->channels,
559                         codec_info->bitsize, 1, bb_info->rate,
560                         bb_info->channels, bb_info->bitsize);
561
562                 tegra30_ahub_set_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX0 +
563                         (i2s->call_record_dam_ifc*2),
564                         TEGRA30_AHUB_TXCIF_I2S0_TX0 + bb_info->i2s_id);
565 #endif
566                 tegra30_ahub_set_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX1 +
567                         (i2s->call_record_dam_ifc*2),
568                         TEGRA30_AHUB_TXCIF_I2S0_TX0 + codec_info->i2s_id);
569                 tegra30_ahub_set_rx_cif_source(i2s->capture_fifo_cif,
570                         TEGRA30_AHUB_TXCIF_DAM0_TX0 +
571                         i2s->call_record_dam_ifc);
572
573                 /* enable the dam*/
574                 tegra30_dam_enable(i2s->call_record_dam_ifc,
575                                 TEGRA30_DAM_ENABLE,
576                                 TEGRA30_DAM_CHIN1);
577                 tegra30_dam_enable(i2s->call_record_dam_ifc,
578                                 TEGRA30_DAM_ENABLE,
579                                 TEGRA30_DAM_CHIN0_SRC);
580         }
581
582         return 0;
583 }
584
585 static void tegra_max98090_shutdown(struct snd_pcm_substream *substream)
586 {
587         struct snd_soc_pcm_runtime *rtd = substream->private_data;
588         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
589         struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(cpu_dai);
590
591         tegra_asoc_utils_tristate_dap(i2s->id, true);
592
593         if (!i2s->is_dam_used)
594                 return;
595
596         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
597                 /* disable the dam*/
598                 tegra30_dam_enable(i2s->dam_ifc, TEGRA30_DAM_DISABLE,
599                                 TEGRA30_DAM_CHIN1);
600
601                 /* disconnect the ahub connections*/
602                 tegra30_ahub_unset_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX1 +
603                                         (i2s->dam_ifc*2));
604
605                 /* disable the dam and free the controller */
606                 tegra30_dam_disable_clock(i2s->dam_ifc);
607                 tegra30_dam_free_channel(i2s->dam_ifc, TEGRA30_DAM_CHIN1);
608                 i2s->dam_ch_refcount--;
609                 if (!i2s->dam_ch_refcount)
610                         tegra30_dam_free_controller(i2s->dam_ifc);
611          } else {
612
613                 if (!i2s->is_call_mode_rec)
614                         return;
615
616                 i2s->is_call_mode_rec = 0;
617
618                 /* disable the dam*/
619                 tegra30_dam_enable(i2s->call_record_dam_ifc,
620                         TEGRA30_DAM_DISABLE, TEGRA30_DAM_CHIN1);
621                 tegra30_dam_enable(i2s->call_record_dam_ifc,
622                         TEGRA30_DAM_DISABLE, TEGRA30_DAM_CHIN0_SRC);
623
624                 /* disconnect the ahub connections*/
625                 tegra30_ahub_unset_rx_cif_source(i2s->capture_fifo_cif);
626                 tegra30_ahub_unset_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX0 +
627                         (i2s->call_record_dam_ifc*2));
628                 tegra30_ahub_unset_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX1 +
629                         (i2s->call_record_dam_ifc*2));
630
631                 /* free the dam channels and dam controller */
632                 tegra30_dam_disable_clock(i2s->call_record_dam_ifc);
633                 tegra30_dam_free_channel(i2s->call_record_dam_ifc,
634                         TEGRA30_DAM_CHIN1);
635                 tegra30_dam_free_channel(i2s->call_record_dam_ifc,
636                         TEGRA30_DAM_CHIN0_SRC);
637                 tegra30_dam_free_controller(i2s->call_record_dam_ifc);
638          }
639
640         return;
641 }
642
643 static int tegra_voice_call_hw_params(struct snd_pcm_substream *substream,
644                         struct snd_pcm_hw_params *params)
645 {
646         struct snd_soc_pcm_runtime *rtd = substream->private_data;
647         struct snd_soc_dai *codec_dai = rtd->codec_dai;
648         struct snd_soc_codec *codec = rtd->codec;
649         struct snd_soc_card *card = codec->card;
650         struct tegra_max98090 *machine = snd_soc_card_get_drvdata(card);
651         struct tegra_asoc_platform_data *pdata = machine->pdata;
652         int srate, mclk, i2s_daifmt;
653         int err, rate, sample_size;
654
655         switch (params_format(params)) {
656         case SNDRV_PCM_FORMAT_S16_LE:
657                 sample_size = 16;
658                 break;
659         case SNDRV_PCM_FORMAT_S24_LE:
660                 sample_size = 24;
661                 break;
662         default:
663                 return -EINVAL;
664         }
665
666         srate = params_rate(params);
667         switch (srate) {
668         case 8000:
669         case 16000:
670         case 24000:
671         case 32000:
672         case 48000:
673         case 64000:
674         case 96000:
675                 mclk = 12288000;
676                 break;
677         case 11025:
678         case 22050:
679         case 44100:
680         case 88200:
681                 mclk = 11289600;
682                 break;
683         default:
684                 return -EINVAL;
685                 break;
686         }
687
688         i2s_daifmt = SND_SOC_DAIFMT_NB_NF;
689         i2s_daifmt |= pdata->i2s_param[HIFI_CODEC].is_i2s_master ?
690                         SND_SOC_DAIFMT_CBS_CFS : SND_SOC_DAIFMT_CBM_CFM;
691
692         switch (pdata->i2s_param[HIFI_CODEC].i2s_mode) {
693         case TEGRA_DAIFMT_I2S:
694                 i2s_daifmt |= SND_SOC_DAIFMT_I2S;
695                 break;
696         case TEGRA_DAIFMT_DSP_A:
697                 i2s_daifmt |= SND_SOC_DAIFMT_DSP_A;
698                 break;
699         case TEGRA_DAIFMT_DSP_B:
700                 i2s_daifmt |= SND_SOC_DAIFMT_DSP_B;
701                 break;
702         case TEGRA_DAIFMT_LEFT_J:
703                 i2s_daifmt |= SND_SOC_DAIFMT_LEFT_J;
704                 break;
705         case TEGRA_DAIFMT_RIGHT_J:
706                 i2s_daifmt |= SND_SOC_DAIFMT_RIGHT_J;
707                 break;
708         default:
709                 dev_err(card->dev, "Can't configure i2s format\n");
710                 return -EINVAL;
711         }
712
713         err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
714         if (err < 0) {
715                 if (!(machine->util_data.set_mclk % mclk))
716                         mclk = machine->util_data.set_mclk;
717                 else {
718                         dev_err(card->dev, "Can't configure clocks\n");
719                         return err;
720                 }
721         }
722
723         tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
724
725         rate = clk_get_rate(machine->util_data.clk_cdev1);
726
727         if (pdata->i2s_param[HIFI_CODEC].i2s_mode == TEGRA_DAIFMT_I2S) {
728                 err = snd_soc_dai_set_fmt(codec_dai, i2s_daifmt);
729                 if (err < 0) {
730                         dev_err(card->dev, "codec_dai fmt not set\n");
731                         return err;
732                 }
733         } else {
734                 err = snd_soc_dai_set_tdm_slot(codec_dai, 3, 3, 2, sample_size);
735                 if (err < 0) {
736                         dev_err(card->dev, "codec_dai tdm mode not set\n");
737                         return err;
738                 }
739         }
740
741         err = snd_soc_dai_set_sysclk(codec_dai, 0, rate, SND_SOC_CLOCK_IN);
742         if (err < 0) {
743                 dev_err(card->dev, "codec_dai clock not set\n");
744                 return err;
745         }
746
747         /* codec configuration */
748         machine->codec_info[HIFI_CODEC].rate = params_rate(params);
749         machine->codec_info[HIFI_CODEC].channels = params_channels(params);
750
751         machine->is_device_bt = 0;
752
753         return 0;
754 }
755
756 static void tegra_voice_call_shutdown(struct snd_pcm_substream *substream)
757 {
758         struct snd_soc_pcm_runtime *rtd = substream->private_data;
759         struct tegra_max98090 *machine  =
760                         snd_soc_card_get_drvdata(rtd->codec->card);
761
762         machine->codec_info[HIFI_CODEC].rate = 0;
763         machine->codec_info[HIFI_CODEC].channels = 0;
764
765         return;
766 }
767
768 static int tegra_bt_voice_call_hw_params(struct snd_pcm_substream *substream,
769                         struct snd_pcm_hw_params *params)
770 {
771         struct snd_soc_pcm_runtime *rtd = substream->private_data;
772         struct snd_soc_card *card = rtd->card;
773         struct tegra_max98090 *machine = snd_soc_card_get_drvdata(card);
774         int err, srate, mclk, min_mclk;
775
776         srate = params_rate(params);
777         switch (srate) {
778         case 11025:
779         case 22050:
780         case 44100:
781         case 88200:
782                 mclk = 11289600;
783                 break;
784         case 8000:
785         case 16000:
786         case 32000:
787         case 48000:
788         case 64000:
789         case 96000:
790                 mclk = 12288000;
791                 break;
792         default:
793                 return -EINVAL;
794         }
795         min_mclk = 64 * srate;
796
797         err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk);
798         if (err < 0) {
799                 if (!(machine->util_data.set_mclk % min_mclk))
800                         mclk = machine->util_data.set_mclk;
801                 else {
802                         dev_err(card->dev, "Can't configure clocks\n");
803                         return err;
804                 }
805         }
806
807         tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1);
808
809         /* codec configuration */
810         machine->codec_info[BT_SCO].rate = params_rate(params);
811         machine->codec_info[BT_SCO].channels = params_channels(params);
812
813         machine->is_device_bt = 1;
814
815         return 0;
816 }
817
818 static void tegra_bt_voice_call_shutdown(struct snd_pcm_substream *substream)
819 {
820         struct snd_soc_pcm_runtime *rtd = substream->private_data;
821         struct tegra_max98090 *machine  =
822                         snd_soc_card_get_drvdata(rtd->codec->card);
823
824         machine->codec_info[BT_SCO].rate = 0;
825         machine->codec_info[BT_SCO].channels = 0;
826
827         return;
828 }
829
830 static struct snd_soc_ops tegra_max98090_ops = {
831         .hw_params = tegra_max98090_hw_params,
832         .hw_free = tegra_hw_free,
833         .startup = tegra_max98090_startup,
834         .shutdown = tegra_max98090_shutdown,
835 };
836
837 static struct snd_soc_ops tegra_voice_call_ops = {
838         .hw_params = tegra_voice_call_hw_params,
839         .shutdown = tegra_voice_call_shutdown,
840         .hw_free = tegra_hw_free,
841 };
842
843 static struct snd_soc_ops tegra_bt_voice_call_ops = {
844         .hw_params = tegra_bt_voice_call_hw_params,
845         .shutdown = tegra_bt_voice_call_shutdown,
846         .hw_free = tegra_hw_free,
847 };
848
849 static struct snd_soc_ops tegra_bt_ops = {
850         .hw_params = tegra_bt_hw_params,
851         .hw_free = tegra_hw_free,
852         .startup = tegra_max98090_startup,
853         .shutdown = tegra_max98090_shutdown,
854 };
855
856 /* Headphone jack */
857 struct snd_soc_jack tegra_max98090_hp_jack;
858
859 #ifdef CONFIG_SWITCH
860 static struct switch_dev tegra_max98090_headset_switch = {
861         .name = "h2w",
862 };
863
864 /* These values are copied from WiredAccessoryObserver */
865 enum headset_state {
866         BIT_NO_HEADSET = 0,
867         BIT_HEADSET = (1 << 0),
868         BIT_HEADSET_NO_MIC = (1 << 1),
869 };
870
871 /* Headphone jack detection gpios */
872 static struct snd_soc_jack_gpio tegra_max98090_hp_jack_gpio = {
873         .name = "headphone detect",
874         .report = SND_JACK_HEADPHONE,
875         .debounce_time = 150,
876         .invert = 1,
877 };
878
879 static int tegra_max98090_jack_notifier(struct notifier_block *self,
880         unsigned long action, void *dev)
881 {
882         struct snd_soc_jack *jack = dev;
883         struct snd_soc_codec *codec = jack->codec;
884         struct snd_soc_card *card = codec->card;
885         struct tegra_max98090 *machine = snd_soc_card_get_drvdata(card);
886         enum headset_state state = BIT_NO_HEADSET;
887
888         if (jack == &tegra_max98090_hp_jack) {
889                 machine->jack_status &= ~SND_JACK_HEADPHONE;
890                 machine->jack_status |= (action & SND_JACK_HEADPHONE);
891         } else {
892                 machine->jack_status &= ~SND_JACK_MICROPHONE;
893                 machine->jack_status |= (action & SND_JACK_MICROPHONE);
894         }
895
896         switch (machine->jack_status) {
897         case SND_JACK_HEADPHONE:
898                 /* For now force headset mic mode */
899                 /* state = BIT_HEADSET_NO_MIC; */
900                 state = BIT_HEADSET;
901                 break;
902         case SND_JACK_HEADSET:
903                 state = BIT_HEADSET;
904                 break;
905         case SND_JACK_MICROPHONE:
906                 /* mic: would not report */
907         default:
908                 state = BIT_NO_HEADSET;
909         }
910
911         if (action == jack->status)
912                 switch_set_state(&tegra_max98090_headset_switch, state);
913
914         return NOTIFY_OK;
915 }
916
917 static struct notifier_block tegra_max98090_jack_detect_nb = {
918         .notifier_call = tegra_max98090_jack_notifier,
919 };
920 #else
921 /* Headset jack detection DAPM pins */
922 static struct snd_soc_jack_pin tegra_max98090_hs_jack_pins[] = {
923         {
924                 .pin = "Headset Mic",
925                 .mask = SND_JACK_MICROPHONE,
926         },
927         {
928                 .pin = "Headphone Jack",
929                 .mask = SND_JACK_HEADPHONE,
930         },
931 };
932 #endif
933
934 static int tegra_max98090_event_hp(struct snd_soc_dapm_widget *w,
935                                         struct snd_kcontrol *k, int event)
936 {
937         struct snd_soc_dapm_context *dapm = w->dapm;
938         struct snd_soc_card *card = dapm->card;
939         struct tegra_max98090 *machine = snd_soc_card_get_drvdata(card);
940         struct tegra_asoc_platform_data *pdata = machine->pdata;
941
942         if (!(machine->gpio_requested & GPIO_HP_DET))
943                 return 0;
944
945         gpio_set_value_cansleep(pdata->gpio_hp_det,
946                                 !SND_SOC_DAPM_EVENT_ON(event));
947
948         return 0;
949 }
950
951 static const struct snd_soc_dapm_widget tegra_max98090_dapm_widgets[] = {
952         SND_SOC_DAPM_SPK("Int Spk", NULL),
953         SND_SOC_DAPM_OUTPUT("Earpiece"),
954         SND_SOC_DAPM_HP("Headphone Jack", tegra_max98090_event_hp),
955         SND_SOC_DAPM_MIC("Mic Jack", NULL),
956         SND_SOC_DAPM_INPUT("Ext Mic"),
957         SND_SOC_DAPM_INPUT("Int Mic"),
958         SND_SOC_DAPM_MIC("DMic Pri", NULL),
959         SND_SOC_DAPM_MIC("DMic Sec", NULL),
960 };
961
962 static const struct snd_soc_dapm_route tegra_max98090_audio_map[] = {
963         {"Int Spk", NULL, "SPKL"},
964         {"Int Spk", NULL, "SPKR"},
965         {"Earpiece", NULL, "RCVL"},
966         {"Earpiece", NULL, "RCVR"},
967         {"Headphone Jack", NULL, "HPL"},
968         {"Headphone Jack", NULL, "HPR"},
969
970         { "MIC2", NULL, "Mic Jack" },
971
972         {"MICBIAS", NULL, "Int Mic"},
973         {"IN12", NULL, "MICBIAS"},
974         {"MICBIAS", NULL, "Ext Mic"},
975         {"IN34", NULL, "MICBIAS"},
976         {"MICBIAS", NULL, "Mic Jack"},
977         {"IN56", NULL, "MICBIAS"},
978         {"DMICL", NULL, "DMic Pri"},
979         {"DMICR", NULL, "DMic Pri"},
980         {"DMIC3", NULL, "DMic Sec"},
981         {"DMIC4", NULL, "DMic Sec"},
982 };
983
984 static const struct snd_kcontrol_new tegra_max98090_controls[] = {
985         SOC_DAPM_PIN_SWITCH("Int Spk"),
986         SOC_DAPM_PIN_SWITCH("Earpiece"),
987         SOC_DAPM_PIN_SWITCH("Headphone Jack"),
988         SOC_DAPM_PIN_SWITCH("Mic Jack"),
989         SOC_DAPM_PIN_SWITCH("Int Mic"),
990         SOC_DAPM_PIN_SWITCH("Ext Mic"),
991         SOC_DAPM_PIN_SWITCH("DMic Pri"),
992         SOC_DAPM_PIN_SWITCH("DMic Sec"),
993 };
994
995 static int tegra_max98090_init(struct snd_soc_pcm_runtime *rtd)
996 {
997         struct snd_soc_codec *codec = rtd->codec;
998         struct snd_soc_dapm_context *dapm = &codec->dapm;
999         struct snd_soc_card *card = codec->card;
1000         struct tegra_max98090 *machine = snd_soc_card_get_drvdata(card);
1001         struct tegra_asoc_platform_data *pdata = machine->pdata;
1002         struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(rtd->cpu_dai);
1003         int ret;
1004
1005         i2s->is_dam_used = false;
1006         if (i2s->id == machine->codec_info[BT_SCO].i2s_id)
1007                 i2s->is_dam_used = true;
1008
1009         if (machine->init_done)
1010                 return 0;
1011
1012         machine->init_done = true;
1013
1014         if (gpio_is_valid(pdata->gpio_hp_mute)) {
1015                 ret = gpio_request(pdata->gpio_hp_mute, "hp_mute");
1016                 if (ret) {
1017                         dev_err(card->dev, "cannot get hp_mute gpio\n");
1018                         return ret;
1019                 }
1020                 machine->gpio_requested |= GPIO_HP_MUTE;
1021
1022                 gpio_direction_output(pdata->gpio_hp_mute, 0);
1023         }
1024
1025         if (gpio_is_valid(pdata->gpio_hp_det) &&
1026                 of_machine_is_compatible("nvidia,norrin")) {
1027                 tegra_max98090_hp_jack_gpio.gpio = pdata->gpio_hp_det;
1028                 tegra_max98090_hp_jack_gpio.invert =
1029                         !pdata->gpio_hp_det_active_high;
1030                 snd_soc_jack_new(codec, "Headphone Jack", SND_JACK_HEADPHONE,
1031                                         &tegra_max98090_hp_jack);
1032 #ifndef CONFIG_SWITCH
1033                 snd_soc_jack_add_pins(&tegra_max98090_hp_jack,
1034                                         ARRAY_SIZE(tegra_max98090_hs_jack_pins),
1035                                         tegra_max98090_hs_jack_pins);
1036 #else
1037                 snd_soc_jack_notifier_register(&tegra_max98090_hp_jack,
1038                                                 &tegra_max98090_jack_detect_nb);
1039 #endif
1040                 snd_soc_jack_add_gpios(&tegra_max98090_hp_jack,
1041                                         1, &tegra_max98090_hp_jack_gpio);
1042                 machine->gpio_requested |= GPIO_HP_DET;
1043         }
1044
1045         /* Add call mode switch control */
1046         ret = snd_ctl_add(codec->card->snd_card,
1047                 snd_ctl_new1(&tegra_max98090_call_mode_control, machine));
1048         if (ret < 0)
1049                 return ret;
1050
1051         ret = tegra_asoc_utils_register_ctls(&machine->util_data);
1052         if (ret < 0)
1053                 return ret;
1054
1055         snd_soc_dapm_sync(dapm);
1056         return 0;
1057 }
1058
1059 static struct snd_soc_dai_link tegra_max98090_dai[] = {
1060         [DAI_LINK_HIFI] = {
1061                         .name = "MAX98090",
1062                         .stream_name = "MAX98090 HIFI",
1063                         .codec_name = "max98090.5-0010",
1064                         .codec_dai_name = "HiFi",
1065                         .init = tegra_max98090_init,
1066                         .ops = &tegra_max98090_ops,
1067                 },
1068         [DAI_LINK_BTSCO] = {
1069                         .name = "BT SCO",
1070                         .stream_name = "BT SCO PCM",
1071                         .codec_name = "spdif-dit.1",
1072                         .codec_dai_name = "dit-hifi",
1073                         .init = tegra_max98090_init,
1074                         .ops = &tegra_bt_ops,
1075                 },
1076         [DAI_LINK_VOICE_CALL] = {
1077                         .name = "VOICE CALL",
1078                         .stream_name = "VOICE CALL PCM",
1079                         .codec_name = "max98090.5-0010",
1080                         .cpu_dai_name = "dit-hifi",
1081                         .codec_dai_name = "HiFi",
1082                         .ops = &tegra_voice_call_ops,
1083                 },
1084         [DAI_LINK_BT_VOICE_CALL] = {
1085                         .name = "BT VOICE CALL",
1086                         .stream_name = "BT VOICE CALL PCM",
1087                         .codec_name = "spdif-dit.2",
1088                         .cpu_dai_name = "dit-hifi",
1089                         .codec_dai_name = "dit-hifi",
1090                         .ops = &tegra_bt_voice_call_ops,
1091                 },
1092         [DAI_LINK_HIFI_MAX97236] {
1093                 .name = "MAX97236",
1094                 .stream_name = "MAX97236 HIFI",
1095                 .codec_name = "max97236.5-0040",
1096                 .platform_name = "tegra-pcm-audio",
1097                 .codec_dai_name = "max97236-HiFi",
1098                 .ops = NULL,
1099         },
1100 };
1101
1102 static int tegra_max98090_suspend_post(struct snd_soc_card *card)
1103 {
1104         struct snd_soc_jack_gpio *gpio = &tegra_max98090_hp_jack_gpio;
1105         struct tegra_max98090 *machine = snd_soc_card_get_drvdata(card);
1106         int i, suspend_allowed = 1;
1107
1108         for (i = 0; i < machine->pcard->num_links; i++) {
1109                 if (machine->pcard->dai_link[i].ignore_suspend) {
1110                         suspend_allowed = 0;
1111                         break;
1112                 }
1113         }
1114
1115         if (suspend_allowed) {
1116                 if (gpio_is_valid(gpio->gpio))
1117                         disable_irq(gpio_to_irq(gpio->gpio));
1118
1119                 if (machine->clock_enabled) {
1120                         machine->clock_enabled = 0;
1121                         tegra_asoc_utils_clk_disable(&machine->util_data);
1122                 }
1123
1124                 if (machine->avdd_aud_reg)
1125                         regulator_disable(machine->avdd_aud_reg);
1126                 if (machine->vdd_sw_1v8_reg)
1127                         regulator_disable(machine->vdd_sw_1v8_reg);
1128         }
1129
1130         return 0;
1131 }
1132
1133 static int tegra_max98090_resume_pre(struct snd_soc_card *card)
1134 {
1135         int val;
1136         struct snd_soc_jack_gpio *gpio = &tegra_max98090_hp_jack_gpio;
1137         struct tegra_max98090 *machine = snd_soc_card_get_drvdata(card);
1138         int i, suspend_allowed = 1;
1139         int ret;
1140
1141         for (i = 0; i < machine->pcard->num_links; i++) {
1142                 if (machine->pcard->dai_link[i].ignore_suspend) {
1143                         suspend_allowed = 0;
1144                         break;
1145                 }
1146         }
1147
1148         if (suspend_allowed) {
1149                 if (gpio_is_valid(gpio->gpio)) {
1150                         val = gpio_get_value(gpio->gpio);
1151                         val = gpio->invert ? !val : val;
1152                         snd_soc_jack_report(gpio->jack, val, gpio->report);
1153                         enable_irq(gpio_to_irq(gpio->gpio));
1154                 }
1155
1156                 if (!machine->clock_enabled) {
1157                         machine->clock_enabled = 1;
1158                         tegra_asoc_utils_clk_enable(&machine->util_data);
1159                 }
1160
1161                 if (machine->avdd_aud_reg)
1162                         ret = regulator_enable(machine->avdd_aud_reg);
1163                 if (machine->vdd_sw_1v8_reg)
1164                         ret = regulator_enable(machine->vdd_sw_1v8_reg);
1165         }
1166
1167         return 0;
1168 }
1169
1170 static int tegra_max98090_set_bias_level(struct snd_soc_card *card,
1171                                         struct snd_soc_dapm_context *dapm,
1172                                         enum snd_soc_bias_level level)
1173 {
1174         struct tegra_max98090 *machine = snd_soc_card_get_drvdata(card);
1175
1176         if (machine->bias_level == SND_SOC_BIAS_OFF &&
1177                 level != SND_SOC_BIAS_OFF && (!machine->clock_enabled)) {
1178                 machine->clock_enabled = 1;
1179                 machine->bias_level = level;
1180         }
1181
1182         return 0;
1183 }
1184
1185 static int tegra_max98090_set_bias_level_post(struct snd_soc_card *card,
1186                                         struct snd_soc_dapm_context *dapm,
1187                                         enum snd_soc_bias_level level)
1188 {
1189         struct tegra_max98090 *machine = snd_soc_card_get_drvdata(card);
1190
1191         if (machine->bias_level != SND_SOC_BIAS_OFF &&
1192                 level == SND_SOC_BIAS_OFF && (machine->clock_enabled)) {
1193                 machine->clock_enabled = 0;
1194         }
1195
1196         machine->bias_level = level;
1197
1198         return 0 ;
1199 }
1200
1201 static int tegra_late_probe(struct snd_soc_card *card)
1202 {
1203         struct snd_soc_codec *codec236 =
1204                                 card->rtd[DAI_LINK_HIFI_MAX97236].codec;
1205         int ret;
1206
1207         ret = snd_soc_jack_new(codec236,
1208                         "Headphone Jack",
1209                         SND_JACK_HEADSET | SND_JACK_LINEOUT | 0x7E00,
1210                         &tegra_max98090_hp_jack);
1211         if (ret) {
1212                 dev_err(codec236->dev, "snd_soc_jack_new returned %d\n", ret);
1213                 return ret;
1214         }
1215
1216 #ifdef CONFIG_SWITCH
1217         snd_soc_jack_notifier_register(&tegra_max98090_hp_jack,
1218                         &tegra_max98090_jack_detect_nb);
1219 #else /*gpio based headset detection*/
1220         snd_soc_jack_add_pins(&tegra_max98090_hp_jack,
1221                         ARRAY_SIZE(tegra_max98090_hs_jack_pins),
1222                         tegra_max98090_hs_jack_pins);
1223 #endif
1224
1225         max97236_mic_detect(codec236, &tegra_max98090_hp_jack);
1226
1227         return 0;
1228 }
1229
1230 static struct snd_soc_card snd_soc_tegra_max98090 = {
1231         .name = "tegra-max98090",
1232         .owner = THIS_MODULE,
1233         .dai_link = tegra_max98090_dai,
1234         .num_links = ARRAY_SIZE(tegra_max98090_dai),
1235         .suspend_post = tegra_max98090_suspend_post,
1236         .resume_pre = tegra_max98090_resume_pre,
1237         .set_bias_level = tegra_max98090_set_bias_level,
1238         .set_bias_level_post = tegra_max98090_set_bias_level_post,
1239
1240         .controls = tegra_max98090_controls,
1241         .num_controls = ARRAY_SIZE(tegra_max98090_controls),
1242         .dapm_widgets = tegra_max98090_dapm_widgets,
1243         .num_dapm_widgets = ARRAY_SIZE(tegra_max98090_dapm_widgets),
1244         .dapm_routes = tegra_max98090_audio_map,
1245         .num_dapm_routes = ARRAY_SIZE(tegra_max98090_audio_map),
1246         .fully_routed = true,
1247
1248         .late_probe     = tegra_late_probe,
1249 };
1250
1251 static __devinit int tegra_max98090_driver_probe(struct platform_device *pdev)
1252 {
1253         struct snd_soc_card *card = &snd_soc_tegra_max98090;
1254         struct tegra_max98090 *machine;
1255         struct tegra_asoc_platform_data *pdata;
1256         int ret, i;
1257
1258         pdata = pdev->dev.platform_data;
1259         if (!pdata) {
1260                 dev_err(&pdev->dev, "No platform data supplied\n");
1261                 return -EINVAL;
1262         }
1263
1264         if (pdata->codec_name)
1265                 card->dai_link->codec_name = pdata->codec_name;
1266
1267         if (pdata->codec_dai_name)
1268                 card->dai_link->codec_dai_name = pdata->codec_dai_name;
1269
1270         machine = kzalloc(sizeof(struct tegra_max98090), GFP_KERNEL);
1271         if (!machine) {
1272                 dev_err(&pdev->dev, "Can't allocate tegra_max98090 struct\n");
1273                 return -ENOMEM;
1274         }
1275
1276         machine->pdata = pdata;
1277         machine->pcard = card;
1278         machine->bias_level = SND_SOC_BIAS_STANDBY;
1279         machine->clock_enabled = 1;
1280
1281         ret = tegra_asoc_utils_init(&machine->util_data, &pdev->dev, card);
1282         if (ret)
1283                 goto err_free_machine;
1284
1285         machine->avdd_aud_reg = regulator_get(&pdev->dev, "avdd_aud");
1286         if (IS_ERR(machine->avdd_aud_reg)) {
1287                 dev_info(&pdev->dev, "avdd_aud regulator not found\n");
1288                 machine->avdd_aud_reg = 0;
1289         }
1290
1291         machine->vdd_sw_1v8_reg = regulator_get(&pdev->dev, "vdd_aud_dgtl");
1292         if (IS_ERR(machine->vdd_sw_1v8_reg)) {
1293                 dev_info(&pdev->dev, "vdd_sw_1v8_reg regulator not found\n");
1294                 machine->vdd_sw_1v8_reg = 0;
1295         }
1296
1297         if (machine->vdd_sw_1v8_reg)
1298                 ret = regulator_enable(machine->vdd_sw_1v8_reg);
1299         if (machine->avdd_aud_reg)
1300                 ret = regulator_enable(machine->avdd_aud_reg);
1301
1302
1303 #ifdef CONFIG_SWITCH
1304         /* Add h2w switch class support */
1305         ret = tegra_asoc_switch_register(&tegra_max98090_headset_switch);
1306         if (ret < 0) {
1307                 dev_err(&pdev->dev, "not able to register switch device\n");
1308                 goto err_fini_utils;
1309         }
1310 #endif
1311
1312         card->dev = &pdev->dev;
1313         platform_set_drvdata(pdev, card);
1314         snd_soc_card_set_drvdata(card, machine);
1315
1316         for (i = 0; i < NUM_I2S_DEVICES ; i++) {
1317                 machine->codec_info[i].i2s_id =
1318                         pdata->i2s_param[i].audio_port_id;
1319                 machine->codec_info[i].bitsize =
1320                         pdata->i2s_param[i].sample_size;
1321                 machine->codec_info[i].is_i2smaster =
1322                         pdata->i2s_param[i].is_i2s_master;
1323                 machine->codec_info[i].rate =
1324                         pdata->i2s_param[i].rate;
1325                 machine->codec_info[i].channels =
1326                         pdata->i2s_param[i].channels;
1327                 machine->codec_info[i].i2s_mode =
1328                         pdata->i2s_param[i].i2s_mode;
1329                 machine->codec_info[i].bit_clk =
1330                         pdata->i2s_param[i].bit_clk;
1331         }
1332
1333         if (pdata->ahub_bbc1_param) {
1334                 machine->ahub_bbc1_info.port_id =
1335                         pdata->ahub_bbc1_param->port_id;
1336                 machine->ahub_bbc1_info.sample_size =
1337                         pdata->ahub_bbc1_param->sample_size;
1338                 machine->ahub_bbc1_info.rate =
1339                         pdata->ahub_bbc1_param->rate;
1340                 machine->ahub_bbc1_info.channels =
1341                         pdata->ahub_bbc1_param->channels;
1342                 machine->ahub_bbc1_info.bit_clk =
1343                         pdata->ahub_bbc1_param->bit_clk;
1344         }
1345
1346         tegra_max98090_dai[DAI_LINK_HIFI].cpu_dai_name =
1347         tegra_max98090_i2s_dai_name[machine->codec_info[HIFI_CODEC].i2s_id];
1348         tegra_max98090_dai[DAI_LINK_HIFI].platform_name =
1349         tegra_max98090_i2s_dai_name[machine->codec_info[HIFI_CODEC].i2s_id];
1350
1351         tegra_max98090_dai[DAI_LINK_HIFI_MAX97236].cpu_dai_name =
1352         tegra_max98090_i2s_dai_name[machine->codec_info[HIFI_CODEC].i2s_id];
1353         tegra_max98090_dai[DAI_LINK_HIFI_MAX97236].platform_name =
1354         tegra_max98090_i2s_dai_name[machine->codec_info[HIFI_CODEC].i2s_id];
1355
1356         tegra_max98090_dai[DAI_LINK_BTSCO].cpu_dai_name =
1357         tegra_max98090_i2s_dai_name[machine->codec_info[BT_SCO].i2s_id];
1358         tegra_max98090_dai[DAI_LINK_BTSCO].platform_name =
1359         tegra_max98090_i2s_dai_name[machine->codec_info[BT_SCO].i2s_id];
1360
1361         card->dapm.idle_bias_off = 1;
1362         ret = snd_soc_register_card(card);
1363         if (ret) {
1364                 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
1365                         ret);
1366                 goto err_switch_unregister;
1367         }
1368
1369         if (!card->instantiated) {
1370                 dev_err(&pdev->dev, "No MAX98090 codec\n");
1371                 goto err_unregister_card;
1372         }
1373
1374         ret = tegra_asoc_utils_set_parent(&machine->util_data,
1375                                 pdata->i2s_param[HIFI_CODEC].is_i2s_master);
1376         if (ret) {
1377                 dev_err(&pdev->dev,
1378                                 "tegra_asoc_utils_set_parent failed (%d)\n",
1379                                 ret);
1380                 goto err_unregister_card;
1381         }
1382
1383         return 0;
1384
1385 err_unregister_card:
1386         snd_soc_unregister_card(card);
1387 err_switch_unregister:
1388 #ifdef CONFIG_SWITCH
1389         switch_dev_unregister(&tegra_max98090_headset_switch);
1390 #endif
1391 err_fini_utils:
1392         tegra_asoc_utils_fini(&machine->util_data);
1393 err_free_machine:
1394         kfree(machine);
1395         return ret;
1396 }
1397
1398 static int __devexit tegra_max98090_driver_remove(struct platform_device *pdev)
1399 {
1400         struct snd_soc_card *card = platform_get_drvdata(pdev);
1401         struct tegra_max98090 *machine = snd_soc_card_get_drvdata(card);
1402         struct tegra_asoc_platform_data *pdata = machine->pdata;
1403
1404 #ifdef CONFIG_SWITCH
1405         switch_dev_unregister(&tegra_max98090_headset_switch);
1406 #endif
1407
1408         if (machine->gpio_requested & GPIO_HP_MUTE)
1409                 gpio_free(pdata->gpio_hp_mute);
1410         if (machine->gpio_requested & GPIO_HP_DET)
1411                 snd_soc_jack_free_gpios(&tegra_max98090_hp_jack,
1412                         1,
1413                         &tegra_max98090_hp_jack_gpio);
1414
1415         machine->gpio_requested = 0;
1416
1417         if (machine->avdd_aud_reg)
1418                 regulator_put(machine->avdd_aud_reg);
1419
1420         if (machine->vdd_sw_1v8_reg)
1421                 regulator_put(machine->vdd_sw_1v8_reg);
1422
1423         snd_soc_unregister_card(card);
1424
1425         tegra_asoc_utils_fini(&machine->util_data);
1426
1427         kfree(machine);
1428
1429         return 0;
1430 }
1431
1432 static struct platform_driver tegra_max98090_driver = {
1433         .driver = {
1434                 .name = DRV_NAME,
1435                 .owner = THIS_MODULE,
1436                 .pm = &snd_soc_pm_ops,
1437         },
1438         .probe = tegra_max98090_driver_probe,
1439         .remove = __devexit_p(tegra_max98090_driver_remove),
1440 };
1441
1442 static int __init tegra_max98090_modinit(void)
1443 {
1444         return platform_driver_register(&tegra_max98090_driver);
1445 }
1446 module_init(tegra_max98090_modinit);
1447
1448 static void __exit tegra_max98090_modexit(void)
1449 {
1450         platform_driver_unregister(&tegra_max98090_driver);
1451 }
1452 module_exit(tegra_max98090_modexit);
1453
1454 MODULE_AUTHOR("Kamal Kannan Balagopalan <kbalagopalan@nvidia.com>");
1455 MODULE_DESCRIPTION("Tegra+MAX98090 machine ASoC driver");
1456 MODULE_LICENSE("GPL");
1457 MODULE_ALIAS("platform:" DRV_NAME);