4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
20 /* Include the pci register defines */
21 #include <linux/pci_regs.h>
24 * The PCI interface treats multi-function devices as independent
25 * devices. The slot/function address of each device is encoded
26 * in a single byte as follows:
31 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
32 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
33 #define PCI_FUNC(devfn) ((devfn) & 0x07)
35 /* Ioctls for /proc/bus/pci/X/Y nodes. */
36 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
37 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
38 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
39 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
40 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
44 #include <linux/mod_devicetable.h>
46 #include <linux/types.h>
47 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/compiler.h>
50 #include <linux/errno.h>
51 #include <asm/atomic.h>
52 #include <linux/device.h>
54 /* Include the ID list */
55 #include <linux/pci_ids.h>
57 /* File state for mmap()s on /proc/bus/pci/X/Y */
63 /* This defines the direction arg to the DMA mapping routines. */
64 #define PCI_DMA_BIDIRECTIONAL 0
65 #define PCI_DMA_TODEVICE 1
66 #define PCI_DMA_FROMDEVICE 2
67 #define PCI_DMA_NONE 3
69 #define DEVICE_COUNT_RESOURCE 12
71 typedef int __bitwise pci_power_t;
73 #define PCI_D0 ((pci_power_t __force) 0)
74 #define PCI_D1 ((pci_power_t __force) 1)
75 #define PCI_D2 ((pci_power_t __force) 2)
76 #define PCI_D3hot ((pci_power_t __force) 3)
77 #define PCI_D3cold ((pci_power_t __force) 4)
78 #define PCI_UNKNOWN ((pci_power_t __force) 5)
79 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
81 /** The pci_channel state describes connectivity between the CPU and
82 * the pci device. If some PCI bus between here and the pci device
83 * has crashed or locked up, this info is reflected here.
85 typedef unsigned int __bitwise pci_channel_state_t;
87 enum pci_channel_state {
88 /* I/O channel is in normal state */
89 pci_channel_io_normal = (__force pci_channel_state_t) 1,
91 /* I/O to channel is blocked */
92 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
94 /* PCI card is dead */
95 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
98 typedef unsigned int __bitwise pcie_reset_state_t;
100 enum pcie_reset_state {
101 /* Reset is NOT asserted (Use to deassert reset) */
102 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
104 /* Use #PERST to reset PCI-E device */
105 pcie_warm_reset = (__force pcie_reset_state_t) 2,
107 /* Use PCI-E Hot Reset to reset device */
108 pcie_hot_reset = (__force pcie_reset_state_t) 3
111 typedef unsigned short __bitwise pci_dev_flags_t;
113 /* INTX_DISABLE in PCI_COMMAND register disables MSI
116 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
119 typedef unsigned short __bitwise pci_bus_flags_t;
121 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
122 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
125 struct pci_cap_saved_state {
126 struct hlist_node next;
131 struct pcie_link_state;
133 * The pci_dev structure is used to describe PCI devices.
136 struct list_head bus_list; /* node in per-bus list */
137 struct pci_bus *bus; /* bus this device is on */
138 struct pci_bus *subordinate; /* bus this device bridges to */
140 void *sysdata; /* hook for sys-specific extension */
141 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
143 unsigned int devfn; /* encoded device & function index */
144 unsigned short vendor;
145 unsigned short device;
146 unsigned short subsystem_vendor;
147 unsigned short subsystem_device;
148 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
149 u8 revision; /* PCI revision, low byte of class word */
150 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
151 u8 pcie_type; /* PCI-E device/port type */
152 u8 rom_base_reg; /* which config register controls the ROM */
153 u8 pin; /* which interrupt pin this device uses */
155 struct pci_driver *driver; /* which driver has allocated this device */
156 u64 dma_mask; /* Mask of the bits of bus address this
157 device implements. Normally this is
158 0xffffffff. You only need to change
159 this if your device has broken DMA
160 or supports 64-bit transfers. */
162 struct device_dma_parameters dma_parms;
164 pci_power_t current_state; /* Current operating state. In ACPI-speak,
165 this is D0-D3, D0 being fully functional,
168 #ifdef CONFIG_PCIEASPM
169 struct pcie_link_state *link_state; /* ASPM link state. */
172 pci_channel_state_t error_state; /* current connectivity state */
173 struct device dev; /* Generic device interface */
175 int cfg_size; /* Size of configuration space */
178 * Instead of touching interrupt line and base address registers
179 * directly, use the values stored here. They might be different!
182 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
184 /* These fields are used by common fixups */
185 unsigned int transparent:1; /* Transparent PCI bridge */
186 unsigned int multifunction:1;/* Part of multi-function device */
187 /* keep track of device state */
188 unsigned int is_added:1;
189 unsigned int is_busmaster:1; /* device is busmaster */
190 unsigned int no_msi:1; /* device may not use msi */
191 unsigned int no_d1d2:1; /* only allow d0 or d3 */
192 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
193 unsigned int broken_parity_status:1; /* Device generates false positive parity */
194 unsigned int msi_enabled:1;
195 unsigned int msix_enabled:1;
196 unsigned int is_managed:1;
197 unsigned int is_pcie:1;
198 pci_dev_flags_t dev_flags;
199 atomic_t enable_cnt; /* pci_enable_device has been called */
201 u32 saved_config_space[16]; /* config space saved at suspend time */
202 struct hlist_head saved_cap_space;
203 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
204 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
205 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
206 #ifdef CONFIG_PCI_MSI
207 struct list_head msi_list;
211 extern struct pci_dev *alloc_pci_dev(void);
213 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
214 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
215 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
217 static inline int pci_channel_offline(struct pci_dev *pdev)
219 return (pdev->error_state != pci_channel_io_normal);
222 static inline struct pci_cap_saved_state *pci_find_saved_cap(
223 struct pci_dev *pci_dev, char cap)
225 struct pci_cap_saved_state *tmp;
226 struct hlist_node *pos;
228 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
229 if (tmp->cap_nr == cap)
235 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
236 struct pci_cap_saved_state *new_cap)
238 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
242 * For PCI devices, the region numbers are assigned this way:
244 * 0-5 standard PCI regions
246 * 7-10 bridges: address space assigned to buses behind the bridge
249 #define PCI_ROM_RESOURCE 6
250 #define PCI_BRIDGE_RESOURCES 7
251 #define PCI_NUM_RESOURCES 11
253 #ifndef PCI_BUS_NUM_RESOURCES
254 #define PCI_BUS_NUM_RESOURCES 8
257 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
260 struct list_head node; /* node in list of buses */
261 struct pci_bus *parent; /* parent bus this bridge is on */
262 struct list_head children; /* list of child buses */
263 struct list_head devices; /* list of devices on this bus */
264 struct pci_dev *self; /* bridge device as seen by parent */
265 struct resource *resource[PCI_BUS_NUM_RESOURCES];
266 /* address space routed to this bus */
268 struct pci_ops *ops; /* configuration access functions */
269 void *sysdata; /* hook for sys-specific extension */
270 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
272 unsigned char number; /* bus number */
273 unsigned char primary; /* number of primary bridge */
274 unsigned char secondary; /* number of secondary bridge */
275 unsigned char subordinate; /* max number of subordinate buses */
279 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
280 pci_bus_flags_t bus_flags; /* Inherited by child busses */
281 struct device *bridge;
283 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
284 struct bin_attribute *legacy_mem; /* legacy mem */
285 unsigned int is_added:1;
288 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
289 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
292 * Error values that may be returned by PCI functions.
294 #define PCIBIOS_SUCCESSFUL 0x00
295 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
296 #define PCIBIOS_BAD_VENDOR_ID 0x83
297 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
298 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
299 #define PCIBIOS_SET_FAILED 0x88
300 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
302 /* Low-level architecture-dependent routines */
305 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
306 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
310 * ACPI needs to be able to access PCI config space before we've done a
311 * PCI bus scan and created pci_bus structures.
313 extern int raw_pci_read(unsigned int domain, unsigned int bus,
314 unsigned int devfn, int reg, int len, u32 *val);
315 extern int raw_pci_write(unsigned int domain, unsigned int bus,
316 unsigned int devfn, int reg, int len, u32 val);
318 struct pci_bus_region {
319 resource_size_t start;
324 spinlock_t lock; /* protects list, index */
325 struct list_head list; /* for IDs added at runtime */
326 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
329 /* ---------------------------------------------------------------- */
330 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
331 * a set of callbacks in struct pci_error_handlers, then that device driver
332 * will be notified of PCI bus errors, and will be driven to recovery
333 * when an error occurs.
336 typedef unsigned int __bitwise pci_ers_result_t;
338 enum pci_ers_result {
339 /* no result/none/not supported in device driver */
340 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
342 /* Device driver can recover without slot reset */
343 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
345 /* Device driver wants slot to be reset. */
346 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
348 /* Device has completely failed, is unrecoverable */
349 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
351 /* Device driver is fully recovered and operational */
352 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
355 /* PCI bus error event callbacks */
356 struct pci_error_handlers {
357 /* PCI bus error detected on this device */
358 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
359 enum pci_channel_state error);
361 /* MMIO has been re-enabled, but not DMA */
362 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
364 /* PCI Express link has been reset */
365 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
367 /* PCI slot has been reset */
368 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
370 /* Device driver may resume normal operations */
371 void (*resume)(struct pci_dev *dev);
374 /* ---------------------------------------------------------------- */
378 struct list_head node;
380 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
381 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
382 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
383 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
384 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
385 int (*resume_early) (struct pci_dev *dev);
386 int (*resume) (struct pci_dev *dev); /* Device woken up */
387 void (*shutdown) (struct pci_dev *dev);
389 struct pci_error_handlers *err_handler;
390 struct device_driver driver;
391 struct pci_dynids dynids;
394 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
397 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
398 * @_table: device table name
400 * This macro is used to create a struct pci_device_id array (a device table)
401 * in a generic manner.
403 #define DEFINE_PCI_DEVICE_TABLE(_table) \
404 const struct pci_device_id _table[] __devinitconst
407 * PCI_DEVICE - macro used to describe a specific pci device
408 * @vend: the 16 bit PCI Vendor ID
409 * @dev: the 16 bit PCI Device ID
411 * This macro is used to create a struct pci_device_id that matches a
412 * specific device. The subvendor and subdevice fields will be set to
415 #define PCI_DEVICE(vend,dev) \
416 .vendor = (vend), .device = (dev), \
417 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
420 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
421 * @dev_class: the class, subclass, prog-if triple for this device
422 * @dev_class_mask: the class mask for this device
424 * This macro is used to create a struct pci_device_id that matches a
425 * specific PCI class. The vendor, device, subvendor, and subdevice
426 * fields will be set to PCI_ANY_ID.
428 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
429 .class = (dev_class), .class_mask = (dev_class_mask), \
430 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
431 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
434 * PCI_VDEVICE - macro used to describe a specific pci device in short form
435 * @vend: the vendor name
436 * @dev: the 16 bit PCI Device ID
438 * This macro is used to create a struct pci_device_id that matches a
439 * specific PCI device. The subvendor, and subdevice fields will be set
440 * to PCI_ANY_ID. The macro allows the next field to follow as the device
444 #define PCI_VDEVICE(vendor, device) \
445 PCI_VENDOR_ID_##vendor, (device), \
446 PCI_ANY_ID, PCI_ANY_ID, 0, 0
448 /* these external functions are only available when PCI support is enabled */
451 extern struct bus_type pci_bus_type;
453 /* Do NOT directly access these two variables, unless you are arch specific pci
454 * code, or pci core code. */
455 extern struct list_head pci_root_buses; /* list of all known PCI buses */
456 /* Some device drivers need know if pci is initiated */
457 extern int no_pci_devices(void);
459 void pcibios_fixup_bus(struct pci_bus *);
460 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
461 char *pcibios_setup(char *str);
463 /* Used only when drivers/pci/setup.c is used */
464 void pcibios_align_resource(void *, struct resource *, resource_size_t,
466 void pcibios_update_irq(struct pci_dev *, int irq);
468 /* Generic PCI functions used internally */
470 extern struct pci_bus *pci_find_bus(int domain, int busnr);
471 void pci_bus_add_devices(struct pci_bus *bus);
472 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
473 struct pci_ops *ops, void *sysdata);
474 static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops,
477 struct pci_bus *root_bus;
478 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
480 pci_bus_add_devices(root_bus);
483 struct pci_bus *pci_create_bus(struct device *parent, int bus,
484 struct pci_ops *ops, void *sysdata);
485 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
487 int pci_scan_slot(struct pci_bus *bus, int devfn);
488 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
489 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
490 unsigned int pci_scan_child_bus(struct pci_bus *bus);
491 int __must_check pci_bus_add_device(struct pci_dev *dev);
492 void pci_read_bridge_bases(struct pci_bus *child);
493 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
494 struct resource *res);
495 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
496 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
497 extern void pci_dev_put(struct pci_dev *dev);
498 extern void pci_remove_bus(struct pci_bus *b);
499 extern void pci_remove_bus_device(struct pci_dev *dev);
500 extern void pci_stop_bus_device(struct pci_dev *dev);
501 void pci_setup_cardbus(struct pci_bus *bus);
502 extern void pci_sort_breadthfirst(void);
504 /* Generic PCI functions exported to card drivers */
506 #ifdef CONFIG_PCI_LEGACY
507 struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
509 const struct pci_dev *from);
510 struct pci_dev __deprecated *pci_find_slot(unsigned int bus,
512 #endif /* CONFIG_PCI_LEGACY */
514 int pci_find_capability(struct pci_dev *dev, int cap);
515 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
516 int pci_find_ext_capability(struct pci_dev *dev, int cap);
517 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
518 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
519 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
521 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
522 struct pci_dev *from);
523 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
524 unsigned int ss_vendor, unsigned int ss_device,
525 const struct pci_dev *from);
526 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
527 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
528 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
529 int pci_dev_present(const struct pci_device_id *ids);
531 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
533 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
534 int where, u16 *val);
535 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
536 int where, u32 *val);
537 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
539 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
541 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
544 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
546 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
548 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
550 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
552 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
555 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
557 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
559 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
561 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
563 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
565 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
568 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
571 int __must_check pci_enable_device(struct pci_dev *dev);
572 int __must_check pci_enable_device_io(struct pci_dev *dev);
573 int __must_check pci_enable_device_mem(struct pci_dev *dev);
574 int __must_check pci_reenable_device(struct pci_dev *);
575 int __must_check pcim_enable_device(struct pci_dev *pdev);
576 void pcim_pin_device(struct pci_dev *pdev);
578 static inline int pci_is_managed(struct pci_dev *pdev)
580 return pdev->is_managed;
583 void pci_disable_device(struct pci_dev *dev);
584 void pci_set_master(struct pci_dev *dev);
585 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
586 #define HAVE_PCI_SET_MWI
587 int __must_check pci_set_mwi(struct pci_dev *dev);
588 int pci_try_set_mwi(struct pci_dev *dev);
589 void pci_clear_mwi(struct pci_dev *dev);
590 void pci_intx(struct pci_dev *dev, int enable);
591 void pci_msi_off(struct pci_dev *dev);
592 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
593 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
594 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
595 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
596 int pcix_get_max_mmrbc(struct pci_dev *dev);
597 int pcix_get_mmrbc(struct pci_dev *dev);
598 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
599 int pcie_get_readrq(struct pci_dev *dev);
600 int pcie_set_readrq(struct pci_dev *dev, int rq);
601 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
602 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
603 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
605 /* ROM control related routines */
606 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
607 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
608 size_t pci_get_rom_size(void __iomem *rom, size_t size);
610 /* Power management related routines */
611 int pci_save_state(struct pci_dev *dev);
612 int pci_restore_state(struct pci_dev *dev);
613 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
614 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
615 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
617 /* Functions for PCI Hotplug drivers to use */
618 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
620 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
621 void pci_bus_assign_resources(struct pci_bus *bus);
622 void pci_bus_size_bridges(struct pci_bus *bus);
623 int pci_claim_resource(struct pci_dev *, int);
624 void pci_assign_unassigned_resources(void);
625 void pdev_enable_device(struct pci_dev *);
626 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
627 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
628 int (*)(struct pci_dev *, u8, u8));
629 #define HAVE_PCI_REQ_REGIONS 2
630 int __must_check pci_request_regions(struct pci_dev *, const char *);
631 void pci_release_regions(struct pci_dev *);
632 int __must_check pci_request_region(struct pci_dev *, int, const char *);
633 void pci_release_region(struct pci_dev *, int);
634 int pci_request_selected_regions(struct pci_dev *, int, const char *);
635 void pci_release_selected_regions(struct pci_dev *, int);
637 /* drivers/pci/bus.c */
638 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
639 struct resource *res, resource_size_t size,
640 resource_size_t align, resource_size_t min,
641 unsigned int type_mask,
642 void (*alignf)(void *, struct resource *,
643 resource_size_t, resource_size_t),
645 void pci_enable_bridges(struct pci_bus *bus);
647 /* Proper probing supporting hot-pluggable devices */
648 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
649 const char *mod_name);
650 static inline int __must_check pci_register_driver(struct pci_driver *driver)
652 return __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME);
655 void pci_unregister_driver(struct pci_driver *dev);
656 void pci_remove_behind_bridge(struct pci_dev *dev);
657 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
658 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
659 struct pci_dev *dev);
660 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
663 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
665 int pci_cfg_space_size(struct pci_dev *dev);
666 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
668 /* kmem_cache style wrapper around pci_alloc_consistent() */
670 #include <linux/dmapool.h>
672 #define pci_pool dma_pool
673 #define pci_pool_create(name, pdev, size, align, allocation) \
674 dma_pool_create(name, &pdev->dev, size, align, allocation)
675 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
676 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
677 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
679 enum pci_dma_burst_strategy {
680 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
681 strategy_parameter is N/A */
682 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
684 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
685 strategy_parameter byte boundaries */
689 u16 vector; /* kernel uses to write allocated vector */
690 u16 entry; /* driver uses to specify entry, OS writes */
694 #ifndef CONFIG_PCI_MSI
695 static inline int pci_enable_msi(struct pci_dev *dev)
700 static inline void pci_disable_msi(struct pci_dev *dev)
703 static inline int pci_enable_msix(struct pci_dev *dev,
704 struct msix_entry *entries, int nvec)
709 static inline void pci_disable_msix(struct pci_dev *dev)
712 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
715 static inline void pci_restore_msi_state(struct pci_dev *dev)
718 extern int pci_enable_msi(struct pci_dev *dev);
719 extern void pci_disable_msi(struct pci_dev *dev);
720 extern int pci_enable_msix(struct pci_dev *dev,
721 struct msix_entry *entries, int nvec);
722 extern void pci_disable_msix(struct pci_dev *dev);
723 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
724 extern void pci_restore_msi_state(struct pci_dev *dev);
728 /* The functions a driver should call */
729 int ht_create_irq(struct pci_dev *dev, int idx);
730 void ht_destroy_irq(unsigned int irq);
731 #endif /* CONFIG_HT_IRQ */
733 extern void pci_block_user_cfg_access(struct pci_dev *dev);
734 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
737 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
738 * a PCI domain is defined to be a set of PCI busses which share
739 * configuration space.
741 #ifdef CONFIG_PCI_DOMAINS
742 extern int pci_domains_supported;
744 enum { pci_domains_supported = 0 };
745 static inline int pci_domain_nr(struct pci_bus *bus)
750 static inline int pci_proc_domain(struct pci_bus *bus)
754 #endif /* CONFIG_PCI_DOMAINS */
756 #else /* CONFIG_PCI is not enabled */
759 * If the system does not have PCI, clearly these return errors. Define
760 * these as simple inline functions to avoid hair in drivers.
763 #define _PCI_NOP(o, s, t) \
764 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
766 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
768 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
769 _PCI_NOP(o, word, u16 x) \
770 _PCI_NOP(o, dword, u32 x)
771 _PCI_NOP_ALL(read, *)
774 static inline struct pci_dev *pci_find_device(unsigned int vendor,
776 const struct pci_dev *from)
781 static inline struct pci_dev *pci_find_slot(unsigned int bus,
787 static inline struct pci_dev *pci_get_device(unsigned int vendor,
789 struct pci_dev *from)
794 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
796 unsigned int ss_vendor,
797 unsigned int ss_device,
798 const struct pci_dev *from)
803 static inline struct pci_dev *pci_get_class(unsigned int class,
804 struct pci_dev *from)
809 #define pci_dev_present(ids) (0)
810 #define no_pci_devices() (1)
811 #define pci_dev_put(dev) do { } while (0)
813 static inline void pci_set_master(struct pci_dev *dev)
816 static inline int pci_enable_device(struct pci_dev *dev)
821 static inline void pci_disable_device(struct pci_dev *dev)
824 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
829 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
835 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
841 static inline int pci_assign_resource(struct pci_dev *dev, int i)
846 static inline int __pci_register_driver(struct pci_driver *drv,
847 struct module *owner)
852 static inline int pci_register_driver(struct pci_driver *drv)
857 static inline void pci_unregister_driver(struct pci_driver *drv)
860 static inline int pci_find_capability(struct pci_dev *dev, int cap)
865 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
871 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
876 /* Power management related routines */
877 static inline int pci_save_state(struct pci_dev *dev)
882 static inline int pci_restore_state(struct pci_dev *dev)
887 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
892 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
898 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
904 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
909 static inline void pci_release_regions(struct pci_dev *dev)
912 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
914 static inline void pci_block_user_cfg_access(struct pci_dev *dev)
917 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
920 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
923 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
927 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
931 #endif /* CONFIG_PCI */
933 /* Include architecture-dependent settings and functions */
937 /* these helpers provide future and backwards compatibility
938 * for accessing popular PCI BAR info */
939 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
940 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
941 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
942 #define pci_resource_len(dev,bar) \
943 ((pci_resource_start((dev), (bar)) == 0 && \
944 pci_resource_end((dev), (bar)) == \
945 pci_resource_start((dev), (bar))) ? 0 : \
947 (pci_resource_end((dev), (bar)) - \
948 pci_resource_start((dev), (bar)) + 1))
950 /* Similar to the helpers above, these manipulate per-pci_dev
951 * driver-specific data. They are really just a wrapper around
952 * the generic device structure functions of these calls.
954 static inline void *pci_get_drvdata(struct pci_dev *pdev)
956 return dev_get_drvdata(&pdev->dev);
959 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
961 dev_set_drvdata(&pdev->dev, data);
964 /* If you want to know what to call your pci_dev, ask this function.
965 * Again, it's a wrapper around the generic device.
967 static inline char *pci_name(struct pci_dev *pdev)
969 return pdev->dev.bus_id;
973 /* Some archs don't want to expose struct resource to userland as-is
976 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
977 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
978 const struct resource *rsrc, resource_size_t *start,
979 resource_size_t *end)
981 *start = rsrc->start;
984 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
988 * The world is not perfect and supplies us with broken PCI devices.
989 * For at least a part of these bugs we need a work-around, so both
990 * generic (drivers/pci/quirks.c) and per-architecture code can define
991 * fixup hooks to be called for particular buggy devices.
995 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
996 void (*hook)(struct pci_dev *dev);
999 enum pci_fixup_pass {
1000 pci_fixup_early, /* Before probing BARs */
1001 pci_fixup_header, /* After reading configuration header */
1002 pci_fixup_final, /* Final phase of device fixups */
1003 pci_fixup_enable, /* pci_enable_device() time */
1004 pci_fixup_resume, /* pci_enable_device() time */
1007 /* Anonymous variables would be nice... */
1008 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1009 static const struct pci_fixup __pci_fixup_##name __used \
1010 __attribute__((__section__(#section))) = { vendor, device, hook };
1011 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1012 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1013 vendor##device##hook, vendor, device, hook)
1014 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1015 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1016 vendor##device##hook, vendor, device, hook)
1017 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1018 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1019 vendor##device##hook, vendor, device, hook)
1020 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1021 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1022 vendor##device##hook, vendor, device, hook)
1023 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1024 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1025 resume##vendor##device##hook, vendor, device, hook)
1028 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1030 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1031 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1032 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1033 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1034 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1036 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1038 extern int pci_pci_problems;
1039 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1040 #define PCIPCI_TRITON 2
1041 #define PCIPCI_NATOMA 4
1042 #define PCIPCI_VIAETBF 8
1043 #define PCIPCI_VSFX 16
1044 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1045 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1047 extern unsigned long pci_cardbus_io_size;
1048 extern unsigned long pci_cardbus_mem_size;
1050 extern int pcibios_add_platform_entries(struct pci_dev *dev);
1052 #endif /* __KERNEL__ */
1053 #endif /* LINUX_PCI_H */